mirror of https://gitee.com/openkylin/linux.git
592 lines
15 KiB
C
592 lines
15 KiB
C
/*
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Vineetg: March 2009 (Supporting 2 levels of Interrupts)
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* Stack switching code can no longer reliably rely on the fact that
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* if we are NOT in user mode, stack is switched to kernel mode.
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* e.g. L2 IRQ interrupted a L1 ISR which had not yet completed
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* it's prologue including stack switching from user mode
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*
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* Vineetg: Aug 28th 2008: Bug #94984
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* -Zero Overhead Loop Context shd be cleared when entering IRQ/EXcp/Trap
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* Normally CPU does this automatically, however when doing FAKE rtie,
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* we also need to explicitly do this. The problem in macros
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* FAKE_RET_FROM_EXCPN and FAKE_RET_FROM_EXCPN_LOCK_IRQ was that this bit
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* was being "CLEARED" rather then "SET". Actually "SET" clears ZOL context
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*
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* Vineetg: May 5th 2008
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* -Modified CALLEE_REG save/restore macros to handle the fact that
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* r25 contains the kernel current task ptr
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* - Defined Stack Switching Macro to be reused in all intr/excp hdlrs
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* - Shaved off 11 instructions from RESTORE_ALL_INT1 by using the
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* address Write back load ld.ab instead of seperate ld/add instn
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*
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* Amit Bhor, Sameer Dhavale: Codito Technologies 2004
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*/
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#ifndef __ASM_ARC_ENTRY_H
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#define __ASM_ARC_ENTRY_H
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#ifdef __ASSEMBLY__
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#include <asm/unistd.h> /* For NR_syscalls defination */
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#include <asm/asm-offsets.h>
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#include <asm/arcregs.h>
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#include <asm/ptrace.h>
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#include <asm/processor.h> /* For VMALLOC_START */
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#include <asm/thread_info.h> /* For THREAD_SIZE */
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#include <asm/mmu.h>
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/* Note on the LD/ST addr modes with addr reg wback
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*
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* LD.a same as LD.aw
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*
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* LD.a reg1, [reg2, x] => Pre Incr
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* Eff Addr for load = [reg2 + x]
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*
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* LD.ab reg1, [reg2, x] => Post Incr
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* Eff Addr for load = [reg2]
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*/
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.macro PUSH reg
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st.a \reg, [sp, -4]
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.endm
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.macro PUSHAX aux
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lr r9, [\aux]
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PUSH r9
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.endm
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.macro POP reg
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ld.ab \reg, [sp, 4]
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.endm
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.macro POPAX aux
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POP r9
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sr r9, [\aux]
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.endm
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/*--------------------------------------------------------------
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* Helpers to save/restore Scratch Regs:
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* used by Interrupt/Exception Prologue/Epilogue
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*-------------------------------------------------------------*/
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.macro SAVE_R0_TO_R12
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PUSH r0
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PUSH r1
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PUSH r2
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PUSH r3
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PUSH r4
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PUSH r5
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PUSH r6
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PUSH r7
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PUSH r8
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PUSH r9
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PUSH r10
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PUSH r11
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PUSH r12
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.endm
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.macro RESTORE_R12_TO_R0
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POP r12
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POP r11
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POP r10
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POP r9
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POP r8
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POP r7
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POP r6
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POP r5
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POP r4
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POP r3
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POP r2
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POP r1
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POP r0
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#ifdef CONFIG_ARC_CURR_IN_REG
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ld r25, [sp, 12]
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#endif
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.endm
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/*--------------------------------------------------------------
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* Helpers to save/restore callee-saved regs:
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* used by several macros below
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*-------------------------------------------------------------*/
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.macro SAVE_R13_TO_R24
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PUSH r13
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PUSH r14
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PUSH r15
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PUSH r16
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PUSH r17
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PUSH r18
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PUSH r19
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PUSH r20
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PUSH r21
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PUSH r22
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PUSH r23
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PUSH r24
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.endm
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.macro RESTORE_R24_TO_R13
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POP r24
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POP r23
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POP r22
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POP r21
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POP r20
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POP r19
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POP r18
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POP r17
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POP r16
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POP r15
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POP r14
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POP r13
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.endm
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#define OFF_USER_R25_FROM_R24 (SZ_CALLEE_REGS + SZ_PT_REGS - 8)/4
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/*--------------------------------------------------------------
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* Collect User Mode callee regs as struct callee_regs - needed by
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* fork/do_signal/unaligned-access-emulation.
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* (By default only scratch regs are saved on entry to kernel)
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*
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* Special handling for r25 if used for caching Task Pointer.
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* It would have been saved in task->thread.user_r25 already, but to keep
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* the interface same it is copied into regular r25 placeholder in
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* struct callee_regs.
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*-------------------------------------------------------------*/
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.macro SAVE_CALLEE_SAVED_USER
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SAVE_R13_TO_R24
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#ifdef CONFIG_ARC_CURR_IN_REG
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; Retrieve orig r25 and save it on stack
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ld.as r12, [sp, OFF_USER_R25_FROM_R24]
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st.a r12, [sp, -4]
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#else
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PUSH r25
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#endif
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.endm
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/*--------------------------------------------------------------
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* Save kernel Mode callee regs at the time of Contect Switch.
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*
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* Special handling for r25 if used for caching Task Pointer.
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* Kernel simply skips saving it since it will be loaded with
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* incoming task pointer anyways
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*-------------------------------------------------------------*/
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.macro SAVE_CALLEE_SAVED_KERNEL
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SAVE_R13_TO_R24
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#ifdef CONFIG_ARC_CURR_IN_REG
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sub sp, sp, 4
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#else
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PUSH r25
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#endif
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.endm
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/*--------------------------------------------------------------
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* Opposite of SAVE_CALLEE_SAVED_KERNEL
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*-------------------------------------------------------------*/
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.macro RESTORE_CALLEE_SAVED_KERNEL
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#ifdef CONFIG_ARC_CURR_IN_REG
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add sp, sp, 4 /* skip usual r25 placeholder */
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#else
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POP r25
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#endif
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RESTORE_R24_TO_R13
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.endm
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/*--------------------------------------------------------------
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* Opposite of SAVE_CALLEE_SAVED_USER
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*
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* ptrace tracer or unaligned-access fixup might have changed a user mode
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* callee reg which is saved back to usual r25 storage location
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*-------------------------------------------------------------*/
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.macro RESTORE_CALLEE_SAVED_USER
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#ifdef CONFIG_ARC_CURR_IN_REG
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ld.ab r12, [sp, 4]
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st.as r12, [sp, OFF_USER_R25_FROM_R24]
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#else
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POP r25
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#endif
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RESTORE_R24_TO_R13
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.endm
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/*--------------------------------------------------------------
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* Super FAST Restore callee saved regs by simply re-adjusting SP
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*-------------------------------------------------------------*/
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.macro DISCARD_CALLEE_SAVED_USER
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add sp, sp, SZ_CALLEE_REGS
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.endm
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/*-------------------------------------------------------------
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* given a tsk struct, get to the base of it's kernel mode stack
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* tsk->thread_info is really a PAGE, whose bottom hoists stack
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* which grows upwards towards thread_info
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*------------------------------------------------------------*/
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.macro GET_TSK_STACK_BASE tsk, out
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/* Get task->thread_info (this is essentially start of a PAGE) */
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ld \out, [\tsk, TASK_THREAD_INFO]
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/* Go to end of page where stack begins (grows upwards) */
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add2 \out, \out, (THREAD_SIZE)/4
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.endm
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/*--------------------------------------------------------------
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* Switch to Kernel Mode stack if SP points to User Mode stack
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*
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* Entry : r9 contains pre-IRQ/exception/trap status32
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* Exit : SP is set to kernel mode stack pointer
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* If CURR_IN_REG, r25 set to "current" task pointer
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* Clobbers: r9
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*-------------------------------------------------------------*/
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.macro SWITCH_TO_KERNEL_STK
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/* User Mode when this happened ? Yes: Proceed to switch stack */
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bbit1 r9, STATUS_U_BIT, 88f
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/* OK we were already in kernel mode when this event happened, thus can
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* assume SP is kernel mode SP. _NO_ need to do any stack switching
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*/
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#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
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/* However....
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* If Level 2 Interrupts enabled, we may end up with a corner case:
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* 1. User Task executing
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* 2. L1 IRQ taken, ISR starts (CPU auto-switched to KERNEL mode)
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* 3. But before it could switch SP from USER to KERNEL stack
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* a L2 IRQ "Interrupts" L1
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* Thay way although L2 IRQ happened in Kernel mode, stack is still
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* not switched.
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* To handle this, we may need to switch stack even if in kernel mode
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* provided SP has values in range of USER mode stack ( < 0x7000_0000 )
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*/
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brlo sp, VMALLOC_START, 88f
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/* TODO: vineetg:
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* We need to be a bit more cautious here. What if a kernel bug in
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* L1 ISR, caused SP to go whaco (some small value which looks like
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* USER stk) and then we take L2 ISR.
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* Above brlo alone would treat it as a valid L1-L2 sceanrio
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* instead of shouting alound
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* The only feasible way is to make sure this L2 happened in
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* L1 prelogue ONLY i.e. ilink2 is less than a pre-set marker in
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* L1 ISR before it switches stack
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*/
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#endif
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/* Save Pre Intr/Exception KERNEL MODE SP on kernel stack
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* safe-keeping not really needed, but it keeps the epilogue code
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* (SP restore) simpler/uniform.
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*/
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b.d 66f
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mov r9, sp
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88: /*------Intr/Ecxp happened in user mode, "switch" stack ------ */
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GET_CURR_TASK_ON_CPU r9
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/* With current tsk in r9, get it's kernel mode stack base */
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GET_TSK_STACK_BASE r9, r9
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66:
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#ifdef CONFIG_ARC_CURR_IN_REG
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/*
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* Treat r25 as scratch reg, save it on stack first
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* Load it with current task pointer
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*/
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st r25, [r9, -4]
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GET_CURR_TASK_ON_CPU r25
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#endif
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/* Save Pre Intr/Exception User SP on kernel stack */
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st.a sp, [r9, -16] ; Make room for orig_r0, ECR, user_r25
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/* CAUTION:
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* SP should be set at the very end when we are done with everything
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* In case of 2 levels of interrupt we depend on value of SP to assume
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* that everything else is done (loading r25 etc)
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*/
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/* set SP to point to kernel mode stack */
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mov sp, r9
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/* ----- Stack Switched to kernel Mode, Now save REG FILE ----- */
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.endm
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/*------------------------------------------------------------
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* "FAKE" a rtie to return from CPU Exception context
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* This is to re-enable Exceptions within exception
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* Look at EV_ProtV to see how this is actually used
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*-------------------------------------------------------------*/
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.macro FAKE_RET_FROM_EXCPN
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ld r9, [sp, PT_status32]
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bic r9, r9, (STATUS_U_MASK|STATUS_DE_MASK)
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bset r9, r9, STATUS_L_BIT
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sr r9, [erstatus]
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mov r9, 55f
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sr r9, [eret]
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rtie
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55:
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.endm
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/*
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* @reg [OUT] &thread_info of "current"
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*/
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.macro GET_CURR_THR_INFO_FROM_SP reg
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bic \reg, sp, (THREAD_SIZE - 1)
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.endm
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/*
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* @reg [OUT] thread_info->flags of "current"
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*/
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.macro GET_CURR_THR_INFO_FLAGS reg
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GET_CURR_THR_INFO_FROM_SP \reg
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ld \reg, [\reg, THREAD_INFO_FLAGS]
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.endm
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/*--------------------------------------------------------------
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* For early Exception/ISR Prologue, a core reg is temporarily needed to
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* code the rest of prolog (stack switching). This is done by stashing
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* it to memory (non-SMP case) or SCRATCH0 Aux Reg (SMP).
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*
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* Before saving the full regfile - this reg is restored back, only
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* to be saved again on kernel mode stack, as part of pt_regs.
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*-------------------------------------------------------------*/
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.macro PROLOG_FREEUP_REG reg, mem
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#ifdef CONFIG_SMP
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sr \reg, [ARC_REG_SCRATCH_DATA0]
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#else
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st \reg, [\mem]
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#endif
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.endm
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.macro PROLOG_RESTORE_REG reg, mem
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#ifdef CONFIG_SMP
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lr \reg, [ARC_REG_SCRATCH_DATA0]
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#else
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ld \reg, [\mem]
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#endif
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.endm
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/*--------------------------------------------------------------
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* Exception Entry prologue
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* -Switches stack to K mode (if not already)
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* -Saves the register file
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*
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* After this it is safe to call the "C" handlers
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*-------------------------------------------------------------*/
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.macro EXCEPTION_PROLOGUE
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/* Need at least 1 reg to code the early exception prologue */
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PROLOG_FREEUP_REG r9, @ex_saved_reg1
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/* U/K mode at time of exception (stack not switched if already K) */
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lr r9, [erstatus]
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/* ARC700 doesn't provide auto-stack switching */
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SWITCH_TO_KERNEL_STK
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lr r9, [ecr]
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st r9, [sp, 8] /* ECR */
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st r0, [sp, 4] /* orig_r0, needed only for sys calls */
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/* Restore r9 used to code the early prologue */
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PROLOG_RESTORE_REG r9, @ex_saved_reg1
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SAVE_R0_TO_R12
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PUSH gp
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PUSH fp
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PUSH blink
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PUSHAX eret
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PUSHAX erstatus
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PUSH lp_count
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PUSHAX lp_end
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PUSHAX lp_start
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PUSHAX erbta
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.endm
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/*--------------------------------------------------------------
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* Restore all registers used by system call or Exceptions
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* SP should always be pointing to the next free stack element
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* when entering this macro.
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*
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* NOTE:
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*
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* It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg
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* for memory load operations. If used in that way interrupts are deffered
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* by hardware and that is not good.
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*-------------------------------------------------------------*/
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.macro EXCEPTION_EPILOGUE
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POPAX erbta
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POPAX lp_start
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POPAX lp_end
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POP r9
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mov lp_count, r9 ;LD to lp_count is not allowed
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POPAX erstatus
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POPAX eret
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POP blink
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POP fp
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POP gp
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RESTORE_R12_TO_R0
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ld sp, [sp] /* restore original sp */
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/* orig_r0, ECR, user_r25 skipped automatically */
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.endm
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/* Dummy ECR values for Interrupts */
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#define event_IRQ1 0x0031abcd
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#define event_IRQ2 0x0032abcd
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.macro INTERRUPT_PROLOGUE LVL
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/* free up r9 as scratchpad */
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PROLOG_FREEUP_REG r9, @int\LVL\()_saved_reg
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/* Which mode (user/kernel) was the system in when intr occurred */
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lr r9, [status32_l\LVL\()]
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SWITCH_TO_KERNEL_STK
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/* restore original r9 */
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PROLOG_RESTORE_REG r9, @int\LVL\()_saved_reg
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/* now we are ready to save the remaining context */
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st 0x003\LVL\()abcd, [sp, 8] /* Dummy ECR */
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st 0, [sp, 4] /* orig_r0 , N/A for IRQ */
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SAVE_R0_TO_R12
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PUSH gp
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PUSH fp
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PUSH blink
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PUSH ilink\LVL\()
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PUSHAX status32_l\LVL\()
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PUSH lp_count
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PUSHAX lp_end
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PUSHAX lp_start
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PUSHAX bta_l\LVL\()
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.endm
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/*--------------------------------------------------------------
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* Restore all registers used by interrupt handlers.
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*
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* NOTE:
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*
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* It is recommended that lp_count/ilink1/ilink2 not be used as a dest reg
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* for memory load operations. If used in that way interrupts are deffered
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* by hardware and that is not good.
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*-------------------------------------------------------------*/
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.macro INTERRUPT_EPILOGUE LVL
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POPAX bta_l\LVL\()
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POPAX lp_start
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POPAX lp_end
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POP r9
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mov lp_count, r9 ;LD to lp_count is not allowed
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POPAX status32_l\LVL\()
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POP ilink\LVL\()
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POP blink
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POP fp
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POP gp
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RESTORE_R12_TO_R0
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ld sp, [sp] /* restore original sp */
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/* orig_r0, ECR, user_r25 skipped automatically */
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.endm
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/* Get CPU-ID of this core */
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.macro GET_CPU_ID reg
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lr \reg, [identity]
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lsr \reg, \reg, 8
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bmsk \reg, \reg, 7
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.endm
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#ifdef CONFIG_SMP
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/*-------------------------------------------------
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* Retrieve the current running task on this CPU
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* 1. Determine curr CPU id.
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* 2. Use it to index into _current_task[ ]
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*/
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.macro GET_CURR_TASK_ON_CPU reg
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GET_CPU_ID \reg
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ld.as \reg, [@_current_task, \reg]
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.endm
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/*-------------------------------------------------
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* Save a new task as the "current" task on this CPU
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* 1. Determine curr CPU id.
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* 2. Use it to index into _current_task[ ]
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*
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* Coded differently than GET_CURR_TASK_ON_CPU (which uses LD.AS)
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* because ST r0, [r1, offset] can ONLY have s9 @offset
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* while LD can take s9 (4 byte insn) or LIMM (8 byte insn)
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*/
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.macro SET_CURR_TASK_ON_CPU tsk, tmp
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|
GET_CPU_ID \tmp
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add2 \tmp, @_current_task, \tmp
|
|
st \tsk, [\tmp]
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|
#ifdef CONFIG_ARC_CURR_IN_REG
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mov r25, \tsk
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#endif
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|
|
|
.endm
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|
|
|
|
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#else /* Uniprocessor implementation of macros */
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|
|
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.macro GET_CURR_TASK_ON_CPU reg
|
|
ld \reg, [@_current_task]
|
|
.endm
|
|
|
|
.macro SET_CURR_TASK_ON_CPU tsk, tmp
|
|
st \tsk, [@_current_task]
|
|
#ifdef CONFIG_ARC_CURR_IN_REG
|
|
mov r25, \tsk
|
|
#endif
|
|
.endm
|
|
|
|
#endif /* SMP / UNI */
|
|
|
|
/* ------------------------------------------------------------------
|
|
* Get the ptr to some field of Current Task at @off in task struct
|
|
* -Uses r25 for Current task ptr if that is enabled
|
|
*/
|
|
|
|
#ifdef CONFIG_ARC_CURR_IN_REG
|
|
|
|
.macro GET_CURR_TASK_FIELD_PTR off, reg
|
|
add \reg, r25, \off
|
|
.endm
|
|
|
|
#else
|
|
|
|
.macro GET_CURR_TASK_FIELD_PTR off, reg
|
|
GET_CURR_TASK_ON_CPU \reg
|
|
add \reg, \reg, \off
|
|
.endm
|
|
|
|
#endif /* CONFIG_ARC_CURR_IN_REG */
|
|
|
|
#endif /* __ASSEMBLY__ */
|
|
|
|
#endif /* __ASM_ARC_ENTRY_H */
|