mirror of https://gitee.com/openkylin/linux.git
591 lines
14 KiB
C
591 lines
14 KiB
C
/*
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* SH7760/SH7763 LCDC Framebuffer driver.
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*
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* (c) 2006-2008 MSC Vertriebsges.m.b.H.,
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* Manuel Lauss <mano@roarinelk.homelinux.net>
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* (c) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of this
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* archive for more details.
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*
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* PLEASE HAVE A LOOK AT Documentation/fb/sh7760fb.txt!
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*
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* Thanks to Siegfried Schaefer <s.schaefer at schaefer-edv.de>
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* for his original source and testing!
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*
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* sh7760_setcolreg get from drivers/video/sh_mobile_lcdcfb.c
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*/
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#include <linux/completion.h>
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/fb.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <asm/sh7760fb.h>
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struct sh7760fb_par {
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void __iomem *base;
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int irq;
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struct sh7760fb_platdata *pd; /* display information */
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dma_addr_t fbdma; /* physical address */
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int rot; /* rotation enabled? */
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u32 pseudo_palette[16];
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struct platform_device *dev;
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struct resource *ioarea;
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struct completion vsync; /* vsync irq event */
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};
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static irqreturn_t sh7760fb_irq(int irq, void *data)
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{
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struct completion *c = data;
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complete(c);
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return IRQ_HANDLED;
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}
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/* wait_for_lps - wait until power supply has reached a certain state. */
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static int wait_for_lps(struct sh7760fb_par *par, int val)
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{
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int i = 100;
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while (--i && ((ioread16(par->base + LDPMMR) & 3) != val))
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msleep(1);
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if (i <= 0)
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return -ETIMEDOUT;
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return 0;
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}
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/* en/disable the LCDC */
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static int sh7760fb_blank(int blank, struct fb_info *info)
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{
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struct sh7760fb_par *par = info->par;
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struct sh7760fb_platdata *pd = par->pd;
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unsigned short cntr = ioread16(par->base + LDCNTR);
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unsigned short intr = ioread16(par->base + LDINTR);
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int lps;
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if (blank == FB_BLANK_UNBLANK) {
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intr |= VINT_START;
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cntr = LDCNTR_DON2 | LDCNTR_DON;
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lps = 3;
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} else {
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intr &= ~VINT_START;
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cntr = LDCNTR_DON2;
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lps = 0;
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}
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if (pd->blank)
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pd->blank(blank);
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iowrite16(intr, par->base + LDINTR);
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iowrite16(cntr, par->base + LDCNTR);
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return wait_for_lps(par, lps);
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}
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static int sh7760_setcolreg (u_int regno,
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u_int red, u_int green, u_int blue,
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u_int transp, struct fb_info *info)
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{
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u32 *palette = info->pseudo_palette;
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if (regno >= 16)
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return -EINVAL;
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/* only FB_VISUAL_TRUECOLOR supported */
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red >>= 16 - info->var.red.length;
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green >>= 16 - info->var.green.length;
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blue >>= 16 - info->var.blue.length;
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transp >>= 16 - info->var.transp.length;
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palette[regno] = (red << info->var.red.offset) |
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(green << info->var.green.offset) |
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(blue << info->var.blue.offset) |
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(transp << info->var.transp.offset);
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return 0;
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}
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static int sh7760fb_get_color_info(struct device *dev,
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u16 lddfr, int *bpp, int *gray)
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{
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int lbpp, lgray;
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lgray = lbpp = 0;
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switch (lddfr & LDDFR_COLOR_MASK) {
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case LDDFR_1BPP_MONO:
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lgray = 1;
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lbpp = 1;
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break;
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case LDDFR_2BPP_MONO:
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lgray = 1;
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lbpp = 2;
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break;
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case LDDFR_4BPP_MONO:
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lgray = 1;
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case LDDFR_4BPP:
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lbpp = 4;
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break;
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case LDDFR_6BPP_MONO:
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lgray = 1;
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case LDDFR_8BPP:
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lbpp = 8;
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break;
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case LDDFR_16BPP_RGB555:
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case LDDFR_16BPP_RGB565:
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lbpp = 16;
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lgray = 0;
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break;
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default:
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dev_dbg(dev, "unsupported LDDFR bit depth.\n");
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return -EINVAL;
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}
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if (bpp)
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*bpp = lbpp;
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if (gray)
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*gray = lgray;
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return 0;
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}
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static int sh7760fb_check_var(struct fb_var_screeninfo *var,
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struct fb_info *info)
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{
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struct fb_fix_screeninfo *fix = &info->fix;
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struct sh7760fb_par *par = info->par;
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int ret, bpp;
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/* get color info from register value */
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ret = sh7760fb_get_color_info(info->dev, par->pd->lddfr, &bpp, NULL);
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if (ret)
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return ret;
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var->bits_per_pixel = bpp;
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if ((var->grayscale) && (var->bits_per_pixel == 1))
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fix->visual = FB_VISUAL_MONO10;
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else if (var->bits_per_pixel >= 15)
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fix->visual = FB_VISUAL_TRUECOLOR;
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else
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fix->visual = FB_VISUAL_PSEUDOCOLOR;
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/* TODO: add some more validation here */
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return 0;
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}
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/*
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* sh7760fb_set_par - set videomode.
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*
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* NOTE: The rotation, grayscale and DSTN codepaths are
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* totally untested!
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*/
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static int sh7760fb_set_par(struct fb_info *info)
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{
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struct sh7760fb_par *par = info->par;
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struct fb_videomode *vm = par->pd->def_mode;
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unsigned long sbase, dstn_off, ldsarl, stride;
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unsigned short hsynp, hsynw, htcn, hdcn;
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unsigned short vsynp, vsynw, vtln, vdln;
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unsigned short lddfr, ldmtr;
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int ret, bpp, gray;
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par->rot = par->pd->rotate;
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/* rotate only works with xres <= 320 */
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if (par->rot && (vm->xres > 320)) {
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dev_dbg(info->dev, "rotation disabled due to display size\n");
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par->rot = 0;
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}
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/* calculate LCDC reg vals from display parameters */
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hsynp = vm->right_margin + vm->xres;
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hsynw = vm->hsync_len;
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htcn = vm->left_margin + hsynp + hsynw;
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hdcn = vm->xres;
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vsynp = vm->lower_margin + vm->yres;
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vsynw = vm->vsync_len;
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vtln = vm->upper_margin + vsynp + vsynw;
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vdln = vm->yres;
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/* get color info from register value */
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ret = sh7760fb_get_color_info(info->dev, par->pd->lddfr, &bpp, &gray);
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if (ret)
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return ret;
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dev_dbg(info->dev, "%dx%d %dbpp %s (orientation %s)\n", hdcn,
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vdln, bpp, gray ? "grayscale" : "color",
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par->rot ? "rotated" : "normal");
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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lddfr = par->pd->lddfr | (1 << 8);
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#else
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lddfr = par->pd->lddfr & ~(1 << 8);
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#endif
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ldmtr = par->pd->ldmtr;
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if (!(vm->sync & FB_SYNC_HOR_HIGH_ACT))
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ldmtr |= LDMTR_CL1POL;
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if (!(vm->sync & FB_SYNC_VERT_HIGH_ACT))
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ldmtr |= LDMTR_FLMPOL;
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/* shut down LCDC before changing display parameters */
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sh7760fb_blank(FB_BLANK_POWERDOWN, info);
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iowrite16(par->pd->ldickr, par->base + LDICKR); /* pixclock */
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iowrite16(ldmtr, par->base + LDMTR); /* polarities */
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iowrite16(lddfr, par->base + LDDFR); /* color/depth */
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iowrite16((par->rot ? 1 << 13 : 0), par->base + LDSMR); /* rotate */
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iowrite16(par->pd->ldpmmr, par->base + LDPMMR); /* Power Management */
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iowrite16(par->pd->ldpspr, par->base + LDPSPR); /* Power Supply Ctrl */
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/* display resolution */
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iowrite16(((htcn >> 3) - 1) | (((hdcn >> 3) - 1) << 8),
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par->base + LDHCNR);
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iowrite16(vdln - 1, par->base + LDVDLNR);
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iowrite16(vtln - 1, par->base + LDVTLNR);
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/* h/v sync signals */
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iowrite16((vsynp - 1) | ((vsynw - 1) << 12), par->base + LDVSYNR);
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iowrite16(((hsynp >> 3) - 1) | (((hsynw >> 3) - 1) << 12),
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par->base + LDHSYNR);
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/* AC modulation sig */
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iowrite16(par->pd->ldaclnr, par->base + LDACLNR);
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stride = (par->rot) ? vtln : hdcn;
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if (!gray)
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stride *= (bpp + 7) >> 3;
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else {
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if (bpp == 1)
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stride >>= 3;
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else if (bpp == 2)
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stride >>= 2;
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else if (bpp == 4)
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stride >>= 1;
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/* 6 bpp == 8 bpp */
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}
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/* if rotated, stride must be power of 2 */
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if (par->rot) {
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unsigned long bit = 1 << 31;
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while (bit) {
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if (stride & bit)
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break;
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bit >>= 1;
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}
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if (stride & ~bit)
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stride = bit << 1; /* not P-o-2, round up */
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}
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iowrite16(stride, par->base + LDLAOR);
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/* set display mem start address */
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sbase = (unsigned long)par->fbdma;
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if (par->rot)
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sbase += (hdcn - 1) * stride;
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iowrite32(sbase, par->base + LDSARU);
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/*
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* for DSTN need to set address for lower half.
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* I (mlau) don't know which address to set it to,
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* so I guessed at (stride * yres/2).
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*/
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if (((ldmtr & 0x003f) >= LDMTR_DSTN_MONO_8) &&
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((ldmtr & 0x003f) <= LDMTR_DSTN_COLOR_16)) {
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dev_dbg(info->dev, " ***** DSTN untested! *****\n");
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dstn_off = stride;
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if (par->rot)
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dstn_off *= hdcn >> 1;
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else
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dstn_off *= vdln >> 1;
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ldsarl = sbase + dstn_off;
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} else
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ldsarl = 0;
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iowrite32(ldsarl, par->base + LDSARL); /* mem for lower half of DSTN */
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info->fix.line_length = stride;
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sh7760fb_check_var(&info->var, info);
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sh7760fb_blank(FB_BLANK_UNBLANK, info); /* panel on! */
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dev_dbg(info->dev, "hdcn : %6d htcn : %6d\n", hdcn, htcn);
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dev_dbg(info->dev, "hsynw : %6d hsynp : %6d\n", hsynw, hsynp);
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dev_dbg(info->dev, "vdln : %6d vtln : %6d\n", vdln, vtln);
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dev_dbg(info->dev, "vsynw : %6d vsynp : %6d\n", vsynw, vsynp);
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dev_dbg(info->dev, "clksrc: %6d clkdiv: %6d\n",
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(par->pd->ldickr >> 12) & 3, par->pd->ldickr & 0x1f);
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dev_dbg(info->dev, "ldpmmr: 0x%04x ldpspr: 0x%04x\n", par->pd->ldpmmr,
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par->pd->ldpspr);
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dev_dbg(info->dev, "ldmtr : 0x%04x lddfr : 0x%04x\n", ldmtr, lddfr);
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dev_dbg(info->dev, "ldlaor: %ld\n", stride);
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dev_dbg(info->dev, "ldsaru: 0x%08lx ldsarl: 0x%08lx\n", sbase, ldsarl);
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return 0;
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}
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static struct fb_ops sh7760fb_ops = {
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.owner = THIS_MODULE,
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.fb_blank = sh7760fb_blank,
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.fb_check_var = sh7760fb_check_var,
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.fb_setcolreg = sh7760_setcolreg,
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.fb_set_par = sh7760fb_set_par,
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.fb_fillrect = cfb_fillrect,
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.fb_copyarea = cfb_copyarea,
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.fb_imageblit = cfb_imageblit,
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};
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static void sh7760fb_free_mem(struct fb_info *info)
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{
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struct sh7760fb_par *par = info->par;
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if (!info->screen_base)
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return;
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dma_free_coherent(info->dev, info->screen_size,
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info->screen_base, par->fbdma);
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par->fbdma = 0;
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info->screen_base = NULL;
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info->screen_size = 0;
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}
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/* allocate the framebuffer memory. This memory must be in Area3,
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* (dictated by the DMA engine) and contiguous, at a 512 byte boundary.
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*/
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static int sh7760fb_alloc_mem(struct fb_info *info)
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{
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struct sh7760fb_par *par = info->par;
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void *fbmem;
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unsigned long vram;
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int ret, bpp;
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if (info->screen_base)
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return 0;
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/* get color info from register value */
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ret = sh7760fb_get_color_info(info->dev, par->pd->lddfr, &bpp, NULL);
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if (ret) {
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printk(KERN_ERR "colinfo\n");
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return ret;
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}
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/* min VRAM: xres_min = 16, yres_min = 1, bpp = 1: 2byte -> 1 page
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max VRAM: xres_max = 1024, yres_max = 1024, bpp = 16: 2MB */
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vram = info->var.xres * info->var.yres;
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if (info->var.grayscale) {
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if (bpp == 1)
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vram >>= 3;
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else if (bpp == 2)
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vram >>= 2;
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else if (bpp == 4)
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vram >>= 1;
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} else if (bpp > 8)
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vram *= 2;
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if ((vram < 1) || (vram > 1024 * 2048)) {
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dev_dbg(info->dev, "too much VRAM required. Check settings\n");
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return -ENODEV;
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}
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if (vram < PAGE_SIZE)
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vram = PAGE_SIZE;
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fbmem = dma_alloc_coherent(info->dev, vram, &par->fbdma, GFP_KERNEL);
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if (!fbmem)
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return -ENOMEM;
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if ((par->fbdma & SH7760FB_DMA_MASK) != SH7760FB_DMA_MASK) {
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sh7760fb_free_mem(info);
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dev_err(info->dev, "kernel gave me memory at 0x%08lx, which is"
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"unusable for the LCDC\n", (unsigned long)par->fbdma);
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return -ENOMEM;
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}
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info->screen_base = fbmem;
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info->screen_size = vram;
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info->fix.smem_start = (unsigned long)info->screen_base;
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info->fix.smem_len = info->screen_size;
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return 0;
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}
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static int sh7760fb_probe(struct platform_device *pdev)
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{
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struct fb_info *info;
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struct resource *res;
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struct sh7760fb_par *par;
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int ret;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (unlikely(res == NULL)) {
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dev_err(&pdev->dev, "invalid resource\n");
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return -EINVAL;
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}
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info = framebuffer_alloc(sizeof(struct sh7760fb_par), &pdev->dev);
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if (!info)
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return -ENOMEM;
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par = info->par;
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par->dev = pdev;
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par->pd = pdev->dev.platform_data;
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if (!par->pd) {
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dev_dbg(info->dev, "no display setup data!\n");
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ret = -ENODEV;
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goto out_fb;
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}
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par->ioarea = request_mem_region(res->start,
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resource_size(res), pdev->name);
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if (!par->ioarea) {
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dev_err(&pdev->dev, "mmio area busy\n");
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ret = -EBUSY;
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goto out_fb;
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}
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par->base = ioremap_nocache(res->start, resource_size(res));
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if (!par->base) {
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dev_err(&pdev->dev, "cannot remap\n");
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ret = -ENODEV;
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goto out_res;
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}
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iowrite16(0, par->base + LDINTR); /* disable vsync irq */
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par->irq = platform_get_irq(pdev, 0);
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if (par->irq >= 0) {
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ret = request_irq(par->irq, sh7760fb_irq, 0,
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"sh7760-lcdc", &par->vsync);
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if (ret) {
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dev_err(&pdev->dev, "cannot grab IRQ\n");
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par->irq = -ENXIO;
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} else
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disable_irq_nosync(par->irq);
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}
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fb_videomode_to_var(&info->var, par->pd->def_mode);
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ret = sh7760fb_alloc_mem(info);
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if (ret) {
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dev_dbg(info->dev, "framebuffer memory allocation failed!\n");
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goto out_unmap;
|
|
}
|
|
|
|
info->pseudo_palette = par->pseudo_palette;
|
|
|
|
/* fixup color register bitpositions. These are fixed by hardware */
|
|
info->var.red.offset = 11;
|
|
info->var.red.length = 5;
|
|
info->var.red.msb_right = 0;
|
|
|
|
info->var.green.offset = 5;
|
|
info->var.green.length = 6;
|
|
info->var.green.msb_right = 0;
|
|
|
|
info->var.blue.offset = 0;
|
|
info->var.blue.length = 5;
|
|
info->var.blue.msb_right = 0;
|
|
|
|
info->var.transp.offset = 0;
|
|
info->var.transp.length = 0;
|
|
info->var.transp.msb_right = 0;
|
|
|
|
strcpy(info->fix.id, "sh7760-lcdc");
|
|
|
|
/* set the DON2 bit now, before cmap allocation, as it will randomize
|
|
* palette memory.
|
|
*/
|
|
iowrite16(LDCNTR_DON2, par->base + LDCNTR);
|
|
info->fbops = &sh7760fb_ops;
|
|
|
|
ret = fb_alloc_cmap(&info->cmap, 256, 0);
|
|
if (ret) {
|
|
dev_dbg(info->dev, "Unable to allocate cmap memory\n");
|
|
goto out_mem;
|
|
}
|
|
|
|
ret = register_framebuffer(info);
|
|
if (ret < 0) {
|
|
dev_dbg(info->dev, "cannot register fb!\n");
|
|
goto out_cmap;
|
|
}
|
|
platform_set_drvdata(pdev, info);
|
|
|
|
printk(KERN_INFO "%s: memory at phys 0x%08lx-0x%08lx, size %ld KiB\n",
|
|
pdev->name,
|
|
(unsigned long)par->fbdma,
|
|
(unsigned long)(par->fbdma + info->screen_size - 1),
|
|
info->screen_size >> 10);
|
|
|
|
return 0;
|
|
|
|
out_cmap:
|
|
sh7760fb_blank(FB_BLANK_POWERDOWN, info);
|
|
fb_dealloc_cmap(&info->cmap);
|
|
out_mem:
|
|
sh7760fb_free_mem(info);
|
|
out_unmap:
|
|
if (par->irq >= 0)
|
|
free_irq(par->irq, &par->vsync);
|
|
iounmap(par->base);
|
|
out_res:
|
|
release_mem_region(res->start, resource_size(res));
|
|
out_fb:
|
|
framebuffer_release(info);
|
|
return ret;
|
|
}
|
|
|
|
static int sh7760fb_remove(struct platform_device *dev)
|
|
{
|
|
struct fb_info *info = platform_get_drvdata(dev);
|
|
struct sh7760fb_par *par = info->par;
|
|
|
|
sh7760fb_blank(FB_BLANK_POWERDOWN, info);
|
|
unregister_framebuffer(info);
|
|
fb_dealloc_cmap(&info->cmap);
|
|
sh7760fb_free_mem(info);
|
|
if (par->irq >= 0)
|
|
free_irq(par->irq, &par->vsync);
|
|
iounmap(par->base);
|
|
release_mem_region(par->ioarea->start, resource_size(par->ioarea));
|
|
framebuffer_release(info);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver sh7760_lcdc_driver = {
|
|
.driver = {
|
|
.name = "sh7760-lcdc",
|
|
},
|
|
.probe = sh7760fb_probe,
|
|
.remove = sh7760fb_remove,
|
|
};
|
|
|
|
module_platform_driver(sh7760_lcdc_driver);
|
|
|
|
MODULE_AUTHOR("Nobuhiro Iwamatsu, Manuel Lauss");
|
|
MODULE_DESCRIPTION("FBdev for SH7760/63 integrated LCD Controller");
|
|
MODULE_LICENSE("GPL");
|