mirror of https://gitee.com/openkylin/linux.git
502 lines
14 KiB
C
502 lines
14 KiB
C
/*
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* Re-map IO memory to kernel address space so that we can access it.
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* This is needed for high PCI addresses that aren't mapped in the
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* 640k-1MB IO memory area on PC's
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*
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* (C) Copyright 1995 1996 Linus Torvalds
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*/
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#include <linux/bootmem.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/vmalloc.h>
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#include <linux/mmiotrace.h>
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#include <asm/cacheflush.h>
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#include <asm/e820.h>
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#include <asm/fixmap.h>
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#include <asm/pgtable.h>
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#include <asm/tlbflush.h>
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#include <asm/pgalloc.h>
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#include <asm/pat.h>
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#include "physaddr.h"
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/*
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* Fix up the linear direct mapping of the kernel to avoid cache attribute
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* conflicts.
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*/
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int ioremap_change_attr(unsigned long vaddr, unsigned long size,
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enum page_cache_mode pcm)
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{
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unsigned long nrpages = size >> PAGE_SHIFT;
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int err;
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switch (pcm) {
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case _PAGE_CACHE_MODE_UC:
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default:
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err = _set_memory_uc(vaddr, nrpages);
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break;
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case _PAGE_CACHE_MODE_WC:
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err = _set_memory_wc(vaddr, nrpages);
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break;
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case _PAGE_CACHE_MODE_WT:
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err = _set_memory_wt(vaddr, nrpages);
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break;
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case _PAGE_CACHE_MODE_WB:
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err = _set_memory_wb(vaddr, nrpages);
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break;
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}
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return err;
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}
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static int __ioremap_check_ram(unsigned long start_pfn, unsigned long nr_pages,
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void *arg)
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{
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unsigned long i;
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for (i = 0; i < nr_pages; ++i)
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if (pfn_valid(start_pfn + i) &&
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!PageReserved(pfn_to_page(start_pfn + i)))
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return 1;
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return 0;
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}
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/*
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* Remap an arbitrary physical address space into the kernel virtual
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* address space. It transparently creates kernel huge I/O mapping when
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* the physical address is aligned by a huge page size (1GB or 2MB) and
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* the requested size is at least the huge page size.
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*
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* NOTE: MTRRs can override PAT memory types with a 4KB granularity.
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* Therefore, the mapping code falls back to use a smaller page toward 4KB
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* when a mapping range is covered by non-WB type of MTRRs.
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*
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* NOTE! We need to allow non-page-aligned mappings too: we will obviously
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* have to convert them into an offset in a page-aligned mapping, but the
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* caller shouldn't need to know that small detail.
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*/
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static void __iomem *__ioremap_caller(resource_size_t phys_addr,
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unsigned long size, enum page_cache_mode pcm, void *caller)
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{
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unsigned long offset, vaddr;
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resource_size_t pfn, last_pfn, last_addr;
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const resource_size_t unaligned_phys_addr = phys_addr;
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const unsigned long unaligned_size = size;
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struct vm_struct *area;
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enum page_cache_mode new_pcm;
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pgprot_t prot;
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int retval;
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void __iomem *ret_addr;
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/* Don't allow wraparound or zero size */
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last_addr = phys_addr + size - 1;
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if (!size || last_addr < phys_addr)
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return NULL;
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if (!phys_addr_valid(phys_addr)) {
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printk(KERN_WARNING "ioremap: invalid physical address %llx\n",
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(unsigned long long)phys_addr);
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WARN_ON_ONCE(1);
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return NULL;
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}
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/*
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* Don't remap the low PCI/ISA area, it's always mapped..
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*/
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if (is_ISA_range(phys_addr, last_addr))
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return (__force void __iomem *)phys_to_virt(phys_addr);
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/*
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* Don't allow anybody to remap normal RAM that we're using..
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*/
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pfn = phys_addr >> PAGE_SHIFT;
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last_pfn = last_addr >> PAGE_SHIFT;
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if (walk_system_ram_range(pfn, last_pfn - pfn + 1, NULL,
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__ioremap_check_ram) == 1) {
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WARN_ONCE(1, "ioremap on RAM at %pa - %pa\n",
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&phys_addr, &last_addr);
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return NULL;
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}
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/*
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* Mappings have to be page-aligned
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*/
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offset = phys_addr & ~PAGE_MASK;
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phys_addr &= PHYSICAL_PAGE_MASK;
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size = PAGE_ALIGN(last_addr+1) - phys_addr;
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retval = reserve_memtype(phys_addr, (u64)phys_addr + size,
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pcm, &new_pcm);
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if (retval) {
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printk(KERN_ERR "ioremap reserve_memtype failed %d\n", retval);
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return NULL;
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}
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if (pcm != new_pcm) {
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if (!is_new_memtype_allowed(phys_addr, size, pcm, new_pcm)) {
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printk(KERN_ERR
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"ioremap error for 0x%llx-0x%llx, requested 0x%x, got 0x%x\n",
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(unsigned long long)phys_addr,
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(unsigned long long)(phys_addr + size),
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pcm, new_pcm);
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goto err_free_memtype;
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}
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pcm = new_pcm;
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}
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prot = PAGE_KERNEL_IO;
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switch (pcm) {
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case _PAGE_CACHE_MODE_UC:
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default:
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prot = __pgprot(pgprot_val(prot) |
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cachemode2protval(_PAGE_CACHE_MODE_UC));
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break;
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case _PAGE_CACHE_MODE_UC_MINUS:
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prot = __pgprot(pgprot_val(prot) |
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cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS));
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break;
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case _PAGE_CACHE_MODE_WC:
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prot = __pgprot(pgprot_val(prot) |
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cachemode2protval(_PAGE_CACHE_MODE_WC));
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break;
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case _PAGE_CACHE_MODE_WT:
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prot = __pgprot(pgprot_val(prot) |
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cachemode2protval(_PAGE_CACHE_MODE_WT));
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break;
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case _PAGE_CACHE_MODE_WB:
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break;
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}
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/*
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* Ok, go for it..
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*/
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area = get_vm_area_caller(size, VM_IOREMAP, caller);
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if (!area)
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goto err_free_memtype;
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area->phys_addr = phys_addr;
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vaddr = (unsigned long) area->addr;
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if (kernel_map_sync_memtype(phys_addr, size, pcm))
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goto err_free_area;
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if (ioremap_page_range(vaddr, vaddr + size, phys_addr, prot))
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goto err_free_area;
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ret_addr = (void __iomem *) (vaddr + offset);
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mmiotrace_ioremap(unaligned_phys_addr, unaligned_size, ret_addr);
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/*
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* Check if the request spans more than any BAR in the iomem resource
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* tree.
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*/
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if (iomem_map_sanity_check(unaligned_phys_addr, unaligned_size))
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pr_warn("caller %pS mapping multiple BARs\n", caller);
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return ret_addr;
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err_free_area:
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free_vm_area(area);
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err_free_memtype:
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free_memtype(phys_addr, phys_addr + size);
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return NULL;
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}
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/**
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* ioremap_nocache - map bus memory into CPU space
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* @phys_addr: bus address of the memory
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* @size: size of the resource to map
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*
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* ioremap_nocache performs a platform specific sequence of operations to
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* make bus memory CPU accessible via the readb/readw/readl/writeb/
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* writew/writel functions and the other mmio helpers. The returned
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* address is not guaranteed to be usable directly as a virtual
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* address.
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*
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* This version of ioremap ensures that the memory is marked uncachable
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* on the CPU as well as honouring existing caching rules from things like
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* the PCI bus. Note that there are other caches and buffers on many
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* busses. In particular driver authors should read up on PCI writes
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*
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* It's useful if some control registers are in such an area and
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* write combining or read caching is not desirable:
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*
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* Must be freed with iounmap.
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*/
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void __iomem *ioremap_nocache(resource_size_t phys_addr, unsigned long size)
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{
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/*
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* Ideally, this should be:
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* pat_enabled() ? _PAGE_CACHE_MODE_UC : _PAGE_CACHE_MODE_UC_MINUS;
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*
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* Till we fix all X drivers to use ioremap_wc(), we will use
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* UC MINUS. Drivers that are certain they need or can already
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* be converted over to strong UC can use ioremap_uc().
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*/
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enum page_cache_mode pcm = _PAGE_CACHE_MODE_UC_MINUS;
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return __ioremap_caller(phys_addr, size, pcm,
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__builtin_return_address(0));
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}
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EXPORT_SYMBOL(ioremap_nocache);
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/**
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* ioremap_uc - map bus memory into CPU space as strongly uncachable
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* @phys_addr: bus address of the memory
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* @size: size of the resource to map
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*
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* ioremap_uc performs a platform specific sequence of operations to
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* make bus memory CPU accessible via the readb/readw/readl/writeb/
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* writew/writel functions and the other mmio helpers. The returned
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* address is not guaranteed to be usable directly as a virtual
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* address.
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*
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* This version of ioremap ensures that the memory is marked with a strong
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* preference as completely uncachable on the CPU when possible. For non-PAT
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* systems this ends up setting page-attribute flags PCD=1, PWT=1. For PAT
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* systems this will set the PAT entry for the pages as strong UC. This call
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* will honor existing caching rules from things like the PCI bus. Note that
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* there are other caches and buffers on many busses. In particular driver
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* authors should read up on PCI writes.
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*
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* It's useful if some control registers are in such an area and
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* write combining or read caching is not desirable:
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*
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* Must be freed with iounmap.
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*/
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void __iomem *ioremap_uc(resource_size_t phys_addr, unsigned long size)
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{
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enum page_cache_mode pcm = _PAGE_CACHE_MODE_UC;
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return __ioremap_caller(phys_addr, size, pcm,
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__builtin_return_address(0));
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}
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EXPORT_SYMBOL_GPL(ioremap_uc);
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/**
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* ioremap_wc - map memory into CPU space write combined
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* @phys_addr: bus address of the memory
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* @size: size of the resource to map
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*
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* This version of ioremap ensures that the memory is marked write combining.
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* Write combining allows faster writes to some hardware devices.
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*
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* Must be freed with iounmap.
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*/
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void __iomem *ioremap_wc(resource_size_t phys_addr, unsigned long size)
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{
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return __ioremap_caller(phys_addr, size, _PAGE_CACHE_MODE_WC,
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__builtin_return_address(0));
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}
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EXPORT_SYMBOL(ioremap_wc);
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/**
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* ioremap_wt - map memory into CPU space write through
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* @phys_addr: bus address of the memory
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* @size: size of the resource to map
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*
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* This version of ioremap ensures that the memory is marked write through.
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* Write through stores data into memory while keeping the cache up-to-date.
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*
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* Must be freed with iounmap.
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*/
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void __iomem *ioremap_wt(resource_size_t phys_addr, unsigned long size)
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{
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return __ioremap_caller(phys_addr, size, _PAGE_CACHE_MODE_WT,
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__builtin_return_address(0));
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}
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EXPORT_SYMBOL(ioremap_wt);
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void __iomem *ioremap_cache(resource_size_t phys_addr, unsigned long size)
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{
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return __ioremap_caller(phys_addr, size, _PAGE_CACHE_MODE_WB,
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__builtin_return_address(0));
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}
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EXPORT_SYMBOL(ioremap_cache);
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void __iomem *ioremap_prot(resource_size_t phys_addr, unsigned long size,
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unsigned long prot_val)
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{
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return __ioremap_caller(phys_addr, size,
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pgprot2cachemode(__pgprot(prot_val)),
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__builtin_return_address(0));
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}
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EXPORT_SYMBOL(ioremap_prot);
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/**
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* iounmap - Free a IO remapping
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* @addr: virtual address from ioremap_*
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*
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* Caller must ensure there is only one unmapping for the same pointer.
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*/
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void iounmap(volatile void __iomem *addr)
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{
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struct vm_struct *p, *o;
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if ((void __force *)addr <= high_memory)
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return;
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/*
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* __ioremap special-cases the PCI/ISA range by not instantiating a
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* vm_area and by simply returning an address into the kernel mapping
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* of ISA space. So handle that here.
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*/
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if ((void __force *)addr >= phys_to_virt(ISA_START_ADDRESS) &&
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(void __force *)addr < phys_to_virt(ISA_END_ADDRESS))
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return;
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addr = (volatile void __iomem *)
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(PAGE_MASK & (unsigned long __force)addr);
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mmiotrace_iounmap(addr);
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/* Use the vm area unlocked, assuming the caller
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ensures there isn't another iounmap for the same address
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in parallel. Reuse of the virtual address is prevented by
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leaving it in the global lists until we're done with it.
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cpa takes care of the direct mappings. */
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p = find_vm_area((void __force *)addr);
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if (!p) {
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printk(KERN_ERR "iounmap: bad address %p\n", addr);
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dump_stack();
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return;
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}
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free_memtype(p->phys_addr, p->phys_addr + get_vm_area_size(p));
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/* Finally remove it */
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o = remove_vm_area((void __force *)addr);
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BUG_ON(p != o || o == NULL);
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kfree(p);
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}
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EXPORT_SYMBOL(iounmap);
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int __init arch_ioremap_pud_supported(void)
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{
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#ifdef CONFIG_X86_64
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return cpu_has_gbpages;
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#else
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return 0;
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#endif
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}
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int __init arch_ioremap_pmd_supported(void)
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{
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return cpu_has_pse;
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}
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/*
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* Convert a physical pointer to a virtual kernel pointer for /dev/mem
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* access
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*/
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void *xlate_dev_mem_ptr(phys_addr_t phys)
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{
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unsigned long start = phys & PAGE_MASK;
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unsigned long offset = phys & ~PAGE_MASK;
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void *vaddr;
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/* If page is RAM, we can use __va. Otherwise ioremap and unmap. */
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if (page_is_ram(start >> PAGE_SHIFT))
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return __va(phys);
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vaddr = ioremap_cache(start, PAGE_SIZE);
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/* Only add the offset on success and return NULL if the ioremap() failed: */
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if (vaddr)
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vaddr += offset;
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return vaddr;
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}
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void unxlate_dev_mem_ptr(phys_addr_t phys, void *addr)
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{
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if (page_is_ram(phys >> PAGE_SHIFT))
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return;
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iounmap((void __iomem *)((unsigned long)addr & PAGE_MASK));
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}
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static pte_t bm_pte[PAGE_SIZE/sizeof(pte_t)] __page_aligned_bss;
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static inline pmd_t * __init early_ioremap_pmd(unsigned long addr)
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{
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/* Don't assume we're using swapper_pg_dir at this point */
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pgd_t *base = __va(read_cr3());
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pgd_t *pgd = &base[pgd_index(addr)];
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pud_t *pud = pud_offset(pgd, addr);
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pmd_t *pmd = pmd_offset(pud, addr);
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return pmd;
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}
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static inline pte_t * __init early_ioremap_pte(unsigned long addr)
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{
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return &bm_pte[pte_index(addr)];
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}
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bool __init is_early_ioremap_ptep(pte_t *ptep)
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{
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return ptep >= &bm_pte[0] && ptep < &bm_pte[PAGE_SIZE/sizeof(pte_t)];
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}
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void __init early_ioremap_init(void)
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{
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pmd_t *pmd;
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#ifdef CONFIG_X86_64
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BUILD_BUG_ON((fix_to_virt(0) + PAGE_SIZE) & ((1 << PMD_SHIFT) - 1));
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#else
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WARN_ON((fix_to_virt(0) + PAGE_SIZE) & ((1 << PMD_SHIFT) - 1));
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#endif
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early_ioremap_setup();
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pmd = early_ioremap_pmd(fix_to_virt(FIX_BTMAP_BEGIN));
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memset(bm_pte, 0, sizeof(bm_pte));
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pmd_populate_kernel(&init_mm, pmd, bm_pte);
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/*
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* The boot-ioremap range spans multiple pmds, for which
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* we are not prepared:
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*/
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#define __FIXADDR_TOP (-PAGE_SIZE)
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BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
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!= (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
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#undef __FIXADDR_TOP
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if (pmd != early_ioremap_pmd(fix_to_virt(FIX_BTMAP_END))) {
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WARN_ON(1);
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printk(KERN_WARNING "pmd %p != %p\n",
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pmd, early_ioremap_pmd(fix_to_virt(FIX_BTMAP_END)));
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printk(KERN_WARNING "fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
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fix_to_virt(FIX_BTMAP_BEGIN));
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printk(KERN_WARNING "fix_to_virt(FIX_BTMAP_END): %08lx\n",
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fix_to_virt(FIX_BTMAP_END));
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printk(KERN_WARNING "FIX_BTMAP_END: %d\n", FIX_BTMAP_END);
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printk(KERN_WARNING "FIX_BTMAP_BEGIN: %d\n",
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FIX_BTMAP_BEGIN);
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}
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}
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void __init __early_set_fixmap(enum fixed_addresses idx,
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phys_addr_t phys, pgprot_t flags)
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{
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unsigned long addr = __fix_to_virt(idx);
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pte_t *pte;
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if (idx >= __end_of_fixed_addresses) {
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BUG();
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return;
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}
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pte = early_ioremap_pte(addr);
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if (pgprot_val(flags))
|
|
set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, flags));
|
|
else
|
|
pte_clear(&init_mm, addr, pte);
|
|
__flush_tlb_one(addr);
|
|
}
|