mirror of https://gitee.com/openkylin/linux.git
135 lines
3.3 KiB
C
135 lines
3.3 KiB
C
/*
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* cros_ec_lpc_reg - LPC access to the Chrome OS Embedded Controller
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*
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* Copyright (C) 2016 Google, Inc
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* This driver uses the Chrome OS EC byte-level message-based protocol for
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* communicating the keyboard state (which keys are pressed) from a keyboard EC
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* to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing,
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* but everything else (including deghosting) is done here. The main
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* motivation for this is to keep the EC firmware as simple as possible, since
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* it cannot be easily upgraded and EC flash/IRAM space is relatively
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* expensive.
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*/
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#include <linux/io.h>
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#include <linux/mfd/cros_ec.h>
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#include <linux/mfd/cros_ec_commands.h>
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#include "cros_ec_lpc_mec.h"
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static u8 lpc_read_bytes(unsigned int offset, unsigned int length, u8 *dest)
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{
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int i;
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int sum = 0;
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for (i = 0; i < length; ++i) {
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dest[i] = inb(offset + i);
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sum += dest[i];
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}
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/* Return checksum of all bytes read */
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return sum;
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}
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static u8 lpc_write_bytes(unsigned int offset, unsigned int length, u8 *msg)
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{
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int i;
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int sum = 0;
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for (i = 0; i < length; ++i) {
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outb(msg[i], offset + i);
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sum += msg[i];
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}
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/* Return checksum of all bytes written */
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return sum;
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}
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#ifdef CONFIG_CROS_EC_LPC_MEC
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u8 cros_ec_lpc_read_bytes(unsigned int offset, unsigned int length, u8 *dest)
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{
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if (length == 0)
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return 0;
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/* Access desired range through EMI interface */
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if (offset >= MEC_EMI_RANGE_START && offset <= MEC_EMI_RANGE_END) {
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/* Ensure we don't straddle EMI region */
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if (WARN_ON(offset + length - 1 > MEC_EMI_RANGE_END))
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return 0;
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return cros_ec_lpc_io_bytes_mec(MEC_IO_READ, offset, length,
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dest);
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}
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if (WARN_ON(offset + length > MEC_EMI_RANGE_START &&
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offset < MEC_EMI_RANGE_START))
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return 0;
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return lpc_read_bytes(offset, length, dest);
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}
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u8 cros_ec_lpc_write_bytes(unsigned int offset, unsigned int length, u8 *msg)
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{
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if (length == 0)
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return 0;
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/* Access desired range through EMI interface */
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if (offset >= MEC_EMI_RANGE_START && offset <= MEC_EMI_RANGE_END) {
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/* Ensure we don't straddle EMI region */
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if (WARN_ON(offset + length - 1 > MEC_EMI_RANGE_END))
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return 0;
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return cros_ec_lpc_io_bytes_mec(MEC_IO_WRITE, offset, length,
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msg);
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}
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if (WARN_ON(offset + length > MEC_EMI_RANGE_START &&
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offset < MEC_EMI_RANGE_START))
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return 0;
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return lpc_write_bytes(offset, length, msg);
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}
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void cros_ec_lpc_reg_init(void)
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{
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cros_ec_lpc_mec_init();
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}
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void cros_ec_lpc_reg_destroy(void)
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{
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cros_ec_lpc_mec_destroy();
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}
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#else /* CONFIG_CROS_EC_LPC_MEC */
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u8 cros_ec_lpc_read_bytes(unsigned int offset, unsigned int length, u8 *dest)
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{
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return lpc_read_bytes(offset, length, dest);
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}
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u8 cros_ec_lpc_write_bytes(unsigned int offset, unsigned int length, u8 *msg)
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{
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return lpc_write_bytes(offset, length, msg);
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}
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void cros_ec_lpc_reg_init(void)
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{
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}
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void cros_ec_lpc_reg_destroy(void)
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{
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}
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#endif /* CONFIG_CROS_EC_LPC_MEC */
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