mirror of https://gitee.com/openkylin/linux.git
422 lines
13 KiB
C
422 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright (c) 2016 MediaTek Inc.
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// Author: Chen Zhong <chen.zhong@mediatek.com>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/mfd/mt6397/core.h>
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#include <linux/mfd/mt6323/registers.h>
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#include <linux/regulator/driver.h>
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#include <linux/regulator/machine.h>
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#include <linux/regulator/mt6323-regulator.h>
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#include <linux/regulator/of_regulator.h>
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#define MT6323_LDO_MODE_NORMAL 0
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#define MT6323_LDO_MODE_LP 1
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/*
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* MT6323 regulators' information
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*
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* @desc: standard fields of regulator description.
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* @qi: Mask for query enable signal status of regulators
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* @vselon_reg: Register sections for hardware control mode of bucks
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* @vselctrl_reg: Register for controlling the buck control mode.
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* @vselctrl_mask: Mask for query buck's voltage control mode.
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*/
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struct mt6323_regulator_info {
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struct regulator_desc desc;
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u32 qi;
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u32 vselon_reg;
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u32 vselctrl_reg;
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u32 vselctrl_mask;
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u32 modeset_reg;
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u32 modeset_mask;
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};
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#define MT6323_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \
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vosel, vosel_mask, voselon, vosel_ctrl) \
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[MT6323_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6323_volt_range_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6323_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = (max - min)/step + 1, \
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.linear_ranges = volt_ranges, \
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.n_linear_ranges = ARRAY_SIZE(volt_ranges), \
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.vsel_reg = vosel, \
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.vsel_mask = vosel_mask, \
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.enable_reg = enreg, \
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.enable_mask = BIT(0), \
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}, \
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.qi = BIT(13), \
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.vselon_reg = voselon, \
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.vselctrl_reg = vosel_ctrl, \
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.vselctrl_mask = BIT(1), \
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}
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#define MT6323_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \
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vosel_mask, _modeset_reg, _modeset_mask) \
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[MT6323_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6323_volt_table_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6323_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = ARRAY_SIZE(ldo_volt_table), \
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.volt_table = ldo_volt_table, \
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.vsel_reg = vosel, \
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.vsel_mask = vosel_mask, \
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.enable_reg = enreg, \
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.enable_mask = BIT(enbit), \
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}, \
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.qi = BIT(15), \
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.modeset_reg = _modeset_reg, \
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.modeset_mask = _modeset_mask, \
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}
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#define MT6323_REG_FIXED(match, vreg, enreg, enbit, volt, \
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_modeset_reg, _modeset_mask) \
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[MT6323_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6323_volt_fixed_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6323_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = 1, \
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.enable_reg = enreg, \
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.enable_mask = BIT(enbit), \
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.min_uV = volt, \
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}, \
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.qi = BIT(15), \
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.modeset_reg = _modeset_reg, \
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.modeset_mask = _modeset_mask, \
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}
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static const struct regulator_linear_range buck_volt_range1[] = {
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REGULATOR_LINEAR_RANGE(700000, 0, 0x7f, 6250),
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};
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static const struct regulator_linear_range buck_volt_range2[] = {
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REGULATOR_LINEAR_RANGE(1400000, 0, 0x7f, 12500),
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};
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static const struct regulator_linear_range buck_volt_range3[] = {
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REGULATOR_LINEAR_RANGE(500000, 0, 0x3f, 50000),
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};
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static const unsigned int ldo_volt_table1[] = {
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3300000, 3400000, 3500000, 3600000,
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};
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static const unsigned int ldo_volt_table2[] = {
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1500000, 1800000, 2500000, 2800000,
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};
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static const unsigned int ldo_volt_table3[] = {
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1800000, 3300000,
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};
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static const unsigned int ldo_volt_table4[] = {
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3000000, 3300000,
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};
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static const unsigned int ldo_volt_table5[] = {
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1200000, 1300000, 1500000, 1800000, 2000000, 2800000, 3000000, 3300000,
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};
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static const unsigned int ldo_volt_table6[] = {
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1200000, 1300000, 1500000, 1800000, 2500000, 2800000, 3000000, 2000000,
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};
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static const unsigned int ldo_volt_table7[] = {
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1200000, 1300000, 1500000, 1800000,
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};
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static const unsigned int ldo_volt_table8[] = {
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1800000, 3000000,
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};
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static const unsigned int ldo_volt_table9[] = {
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1200000, 1350000, 1500000, 1800000,
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};
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static const unsigned int ldo_volt_table10[] = {
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1200000, 1300000, 1500000, 1800000,
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};
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static int mt6323_get_status(struct regulator_dev *rdev)
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{
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int ret;
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u32 regval;
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struct mt6323_regulator_info *info = rdev_get_drvdata(rdev);
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ret = regmap_read(rdev->regmap, info->desc.enable_reg, ®val);
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if (ret != 0) {
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dev_err(&rdev->dev, "Failed to get enable reg: %d\n", ret);
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return ret;
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}
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return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF;
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}
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static int mt6323_ldo_set_mode(struct regulator_dev *rdev, unsigned int mode)
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{
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int ret, val = 0;
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struct mt6323_regulator_info *info = rdev_get_drvdata(rdev);
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if (!info->modeset_mask) {
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dev_err(&rdev->dev, "regulator %s doesn't support set_mode\n",
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info->desc.name);
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return -EINVAL;
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}
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switch (mode) {
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case REGULATOR_MODE_STANDBY:
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val = MT6323_LDO_MODE_LP;
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break;
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case REGULATOR_MODE_NORMAL:
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val = MT6323_LDO_MODE_NORMAL;
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break;
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default:
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return -EINVAL;
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}
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val <<= ffs(info->modeset_mask) - 1;
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ret = regmap_update_bits(rdev->regmap, info->modeset_reg,
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info->modeset_mask, val);
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return ret;
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}
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static unsigned int mt6323_ldo_get_mode(struct regulator_dev *rdev)
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{
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unsigned int val;
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unsigned int mode;
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int ret;
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struct mt6323_regulator_info *info = rdev_get_drvdata(rdev);
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if (!info->modeset_mask) {
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dev_err(&rdev->dev, "regulator %s doesn't support get_mode\n",
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info->desc.name);
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return -EINVAL;
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}
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ret = regmap_read(rdev->regmap, info->modeset_reg, &val);
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if (ret < 0)
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return ret;
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val &= info->modeset_mask;
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val >>= ffs(info->modeset_mask) - 1;
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if (val & 0x1)
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mode = REGULATOR_MODE_STANDBY;
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else
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mode = REGULATOR_MODE_NORMAL;
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return mode;
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}
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static const struct regulator_ops mt6323_volt_range_ops = {
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.list_voltage = regulator_list_voltage_linear_range,
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.map_voltage = regulator_map_voltage_linear_range,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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.set_voltage_time_sel = regulator_set_voltage_time_sel,
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.get_status = mt6323_get_status,
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};
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static const struct regulator_ops mt6323_volt_table_ops = {
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.list_voltage = regulator_list_voltage_table,
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.map_voltage = regulator_map_voltage_iterate,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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.set_voltage_time_sel = regulator_set_voltage_time_sel,
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.get_status = mt6323_get_status,
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.set_mode = mt6323_ldo_set_mode,
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.get_mode = mt6323_ldo_get_mode,
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};
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static const struct regulator_ops mt6323_volt_fixed_ops = {
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.list_voltage = regulator_list_voltage_linear,
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.get_status = mt6323_get_status,
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.set_mode = mt6323_ldo_set_mode,
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.get_mode = mt6323_ldo_get_mode,
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};
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/* The array is indexed by id(MT6323_ID_XXX) */
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static struct mt6323_regulator_info mt6323_regulators[] = {
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MT6323_BUCK("buck_vproc", VPROC, 700000, 1493750, 6250,
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buck_volt_range1, MT6323_VPROC_CON7, MT6323_VPROC_CON9, 0x7f,
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MT6323_VPROC_CON10, MT6323_VPROC_CON5),
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MT6323_BUCK("buck_vsys", VSYS, 1400000, 2987500, 12500,
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buck_volt_range2, MT6323_VSYS_CON7, MT6323_VSYS_CON9, 0x7f,
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MT6323_VSYS_CON10, MT6323_VSYS_CON5),
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MT6323_BUCK("buck_vpa", VPA, 500000, 3650000, 50000,
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buck_volt_range3, MT6323_VPA_CON7, MT6323_VPA_CON9,
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0x3f, MT6323_VPA_CON10, MT6323_VPA_CON5),
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MT6323_REG_FIXED("ldo_vtcxo", VTCXO, MT6323_ANALDO_CON1, 10, 2800000,
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MT6323_ANALDO_CON1, 0x2),
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MT6323_REG_FIXED("ldo_vcn28", VCN28, MT6323_ANALDO_CON19, 12, 2800000,
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MT6323_ANALDO_CON20, 0x2),
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MT6323_LDO("ldo_vcn33_bt", VCN33_BT, ldo_volt_table1,
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MT6323_ANALDO_CON16, 7, MT6323_ANALDO_CON16, 0xC,
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MT6323_ANALDO_CON21, 0x2),
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MT6323_LDO("ldo_vcn33_wifi", VCN33_WIFI, ldo_volt_table1,
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MT6323_ANALDO_CON17, 12, MT6323_ANALDO_CON16, 0xC,
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MT6323_ANALDO_CON21, 0x2),
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MT6323_REG_FIXED("ldo_va", VA, MT6323_ANALDO_CON2, 14, 2800000,
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MT6323_ANALDO_CON2, 0x2),
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MT6323_LDO("ldo_vcama", VCAMA, ldo_volt_table2,
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MT6323_ANALDO_CON4, 15, MT6323_ANALDO_CON10, 0x60, -1, 0),
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MT6323_REG_FIXED("ldo_vio28", VIO28, MT6323_DIGLDO_CON0, 14, 2800000,
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MT6323_DIGLDO_CON0, 0x2),
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MT6323_REG_FIXED("ldo_vusb", VUSB, MT6323_DIGLDO_CON2, 14, 3300000,
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MT6323_DIGLDO_CON2, 0x2),
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MT6323_LDO("ldo_vmc", VMC, ldo_volt_table3,
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MT6323_DIGLDO_CON3, 12, MT6323_DIGLDO_CON24, 0x10,
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MT6323_DIGLDO_CON3, 0x2),
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MT6323_LDO("ldo_vmch", VMCH, ldo_volt_table4,
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MT6323_DIGLDO_CON5, 14, MT6323_DIGLDO_CON26, 0x80,
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MT6323_DIGLDO_CON5, 0x2),
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MT6323_LDO("ldo_vemc3v3", VEMC3V3, ldo_volt_table4,
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MT6323_DIGLDO_CON6, 14, MT6323_DIGLDO_CON27, 0x80,
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MT6323_DIGLDO_CON6, 0x2),
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MT6323_LDO("ldo_vgp1", VGP1, ldo_volt_table5,
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MT6323_DIGLDO_CON7, 15, MT6323_DIGLDO_CON28, 0xE0,
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MT6323_DIGLDO_CON7, 0x2),
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MT6323_LDO("ldo_vgp2", VGP2, ldo_volt_table6,
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MT6323_DIGLDO_CON8, 15, MT6323_DIGLDO_CON29, 0xE0,
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MT6323_DIGLDO_CON8, 0x2),
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MT6323_LDO("ldo_vgp3", VGP3, ldo_volt_table7,
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MT6323_DIGLDO_CON9, 15, MT6323_DIGLDO_CON30, 0x60,
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MT6323_DIGLDO_CON9, 0x2),
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MT6323_REG_FIXED("ldo_vcn18", VCN18, MT6323_DIGLDO_CON11, 14, 1800000,
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MT6323_DIGLDO_CON11, 0x2),
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MT6323_LDO("ldo_vsim1", VSIM1, ldo_volt_table8,
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MT6323_DIGLDO_CON13, 15, MT6323_DIGLDO_CON34, 0x20,
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MT6323_DIGLDO_CON13, 0x2),
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MT6323_LDO("ldo_vsim2", VSIM2, ldo_volt_table8,
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MT6323_DIGLDO_CON14, 15, MT6323_DIGLDO_CON35, 0x20,
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MT6323_DIGLDO_CON14, 0x2),
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MT6323_REG_FIXED("ldo_vrtc", VRTC, MT6323_DIGLDO_CON15, 8, 2800000,
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-1, 0),
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MT6323_LDO("ldo_vcamaf", VCAMAF, ldo_volt_table5,
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MT6323_DIGLDO_CON31, 15, MT6323_DIGLDO_CON32, 0xE0,
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MT6323_DIGLDO_CON31, 0x2),
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MT6323_LDO("ldo_vibr", VIBR, ldo_volt_table5,
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MT6323_DIGLDO_CON39, 15, MT6323_DIGLDO_CON40, 0xE0,
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MT6323_DIGLDO_CON39, 0x2),
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MT6323_REG_FIXED("ldo_vrf18", VRF18, MT6323_DIGLDO_CON45, 15, 1825000,
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MT6323_DIGLDO_CON45, 0x2),
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MT6323_LDO("ldo_vm", VM, ldo_volt_table9,
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MT6323_DIGLDO_CON47, 14, MT6323_DIGLDO_CON48, 0x30,
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MT6323_DIGLDO_CON47, 0x2),
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MT6323_REG_FIXED("ldo_vio18", VIO18, MT6323_DIGLDO_CON49, 14, 1800000,
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MT6323_DIGLDO_CON49, 0x2),
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MT6323_LDO("ldo_vcamd", VCAMD, ldo_volt_table10,
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MT6323_DIGLDO_CON51, 14, MT6323_DIGLDO_CON52, 0x60,
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MT6323_DIGLDO_CON51, 0x2),
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MT6323_REG_FIXED("ldo_vcamio", VCAMIO, MT6323_DIGLDO_CON53, 14, 1800000,
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MT6323_DIGLDO_CON53, 0x2),
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};
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static int mt6323_set_buck_vosel_reg(struct platform_device *pdev)
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{
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struct mt6397_chip *mt6323 = dev_get_drvdata(pdev->dev.parent);
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int i;
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u32 regval;
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for (i = 0; i < MT6323_MAX_REGULATOR; i++) {
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if (mt6323_regulators[i].vselctrl_reg) {
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if (regmap_read(mt6323->regmap,
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mt6323_regulators[i].vselctrl_reg,
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®val) < 0) {
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dev_err(&pdev->dev,
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"Failed to read buck ctrl\n");
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return -EIO;
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}
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if (regval & mt6323_regulators[i].vselctrl_mask) {
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mt6323_regulators[i].desc.vsel_reg =
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mt6323_regulators[i].vselon_reg;
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}
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}
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}
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return 0;
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}
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static int mt6323_regulator_probe(struct platform_device *pdev)
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{
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struct mt6397_chip *mt6323 = dev_get_drvdata(pdev->dev.parent);
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struct regulator_config config = {};
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struct regulator_dev *rdev;
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int i;
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u32 reg_value;
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/* Query buck controller to select activated voltage register part */
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if (mt6323_set_buck_vosel_reg(pdev))
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return -EIO;
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/* Read PMIC chip revision to update constraints and voltage table */
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if (regmap_read(mt6323->regmap, MT6323_CID, ®_value) < 0) {
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dev_err(&pdev->dev, "Failed to read Chip ID\n");
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return -EIO;
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}
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dev_info(&pdev->dev, "Chip ID = 0x%x\n", reg_value);
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for (i = 0; i < MT6323_MAX_REGULATOR; i++) {
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config.dev = &pdev->dev;
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config.driver_data = &mt6323_regulators[i];
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config.regmap = mt6323->regmap;
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rdev = devm_regulator_register(&pdev->dev,
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&mt6323_regulators[i].desc, &config);
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if (IS_ERR(rdev)) {
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dev_err(&pdev->dev, "failed to register %s\n",
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mt6323_regulators[i].desc.name);
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return PTR_ERR(rdev);
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}
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}
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return 0;
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}
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static const struct platform_device_id mt6323_platform_ids[] = {
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{"mt6323-regulator", 0},
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{ /* sentinel */ },
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};
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MODULE_DEVICE_TABLE(platform, mt6323_platform_ids);
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static struct platform_driver mt6323_regulator_driver = {
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.driver = {
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.name = "mt6323-regulator",
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},
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.probe = mt6323_regulator_probe,
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.id_table = mt6323_platform_ids,
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};
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module_platform_driver(mt6323_regulator_driver);
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MODULE_AUTHOR("Chen Zhong <chen.zhong@mediatek.com>");
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MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6323 PMIC");
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MODULE_LICENSE("GPL v2");
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