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62 lines
2.2 KiB
Plaintext
62 lines
2.2 KiB
Plaintext
Device tree configuration for Renesas RSPI/QSPI driver
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Required properties:
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- compatible : For Renesas Serial Peripheral Interface on legacy SH:
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"renesas,rspi-<soctype>", "renesas,rspi" as fallback.
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For Renesas Serial Peripheral Interface on RZ/A1H:
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"renesas,rspi-<soctype>", "renesas,rspi-rz" as fallback.
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For Quad Serial Peripheral Interface on R-Car Gen2:
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"renesas,qspi-<soctype>", "renesas,qspi" as fallback.
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Examples with soctypes are:
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- "renesas,rspi-sh7757" (SH)
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- "renesas,rspi-r7s72100" (RZ/A1H)
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- "renesas,qspi-r8a7790" (R-Car H2)
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- "renesas,qspi-r8a7791" (R-Car M2)
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- reg : Address start and address range size of the device
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- interrupts : A list of interrupt-specifiers, one for each entry in
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interrupt-names.
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If interrupt-names is not present, an interrupt specifier
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for a single muxed interrupt.
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- interrupt-names : A list of interrupt names. Should contain (if present):
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- "error" for SPEI,
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- "rx" for SPRI,
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- "tx" to SPTI,
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- "mux" for a single muxed interrupt.
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- interrupt-parent : The phandle for the interrupt controller that
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services interrupts for this device.
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- num-cs : Number of chip selects. Some RSPI cores have more than 1.
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- #address-cells : Must be <1>
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- #size-cells : Must be <0>
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Optional properties:
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- clocks : Must contain a reference to the functional clock.
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Pinctrl properties might be needed, too. See
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Documentation/devicetree/bindings/pinctrl/renesas,*.
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Examples:
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spi0: spi@e800c800 {
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compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
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reg = <0xe800c800 0x24>;
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interrupts = <0 238 IRQ_TYPE_LEVEL_HIGH>,
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<0 239 IRQ_TYPE_LEVEL_HIGH>,
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<0 240 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error", "rx", "tx";
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interrupt-parent = <&gic>;
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num-cs = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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spi: spi@e6b10000 {
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compatible = "renesas,qspi-r8a7791", "renesas,qspi";
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reg = <0 0xe6b10000 0 0x2c>;
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interrupt-parent = <&gic>;
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interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R8A7791_CLK_QSPI_MOD>;
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num-cs = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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