mirror of https://gitee.com/openkylin/linux.git
248 lines
5.9 KiB
C
248 lines
5.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2004 Richard Purdie
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* Copyright (C) 2008 Dmitry Baryshkov
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*
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* Based on Sharp's NAND driver sharp_sl.c
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*/
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#include <linux/genhd.h>
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/rawnand.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/sharpsl.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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struct sharpsl_nand {
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struct nand_controller controller;
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struct nand_chip chip;
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void __iomem *io;
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};
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static inline struct sharpsl_nand *mtd_to_sharpsl(struct mtd_info *mtd)
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{
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return container_of(mtd_to_nand(mtd), struct sharpsl_nand, chip);
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}
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/* register offset */
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#define ECCLPLB 0x00 /* line parity 7 - 0 bit */
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#define ECCLPUB 0x04 /* line parity 15 - 8 bit */
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#define ECCCP 0x08 /* column parity 5 - 0 bit */
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#define ECCCNTR 0x0C /* ECC byte counter */
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#define ECCCLRR 0x10 /* cleare ECC */
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#define FLASHIO 0x14 /* Flash I/O */
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#define FLASHCTL 0x18 /* Flash Control */
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/* Flash control bit */
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#define FLRYBY (1 << 5)
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#define FLCE1 (1 << 4)
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#define FLWP (1 << 3)
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#define FLALE (1 << 2)
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#define FLCLE (1 << 1)
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#define FLCE0 (1 << 0)
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/*
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* hardware specific access to control-lines
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* ctrl:
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* NAND_CNE: bit 0 -> ! bit 0 & 4
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* NAND_CLE: bit 1 -> bit 1
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* NAND_ALE: bit 2 -> bit 2
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*
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*/
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static void sharpsl_nand_hwcontrol(struct nand_chip *chip, int cmd,
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unsigned int ctrl)
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{
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struct sharpsl_nand *sharpsl = mtd_to_sharpsl(nand_to_mtd(chip));
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if (ctrl & NAND_CTRL_CHANGE) {
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unsigned char bits = ctrl & 0x07;
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bits |= (ctrl & 0x01) << 4;
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bits ^= 0x11;
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writeb((readb(sharpsl->io + FLASHCTL) & ~0x17) | bits, sharpsl->io + FLASHCTL);
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}
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if (cmd != NAND_CMD_NONE)
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writeb(cmd, chip->legacy.IO_ADDR_W);
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}
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static int sharpsl_nand_dev_ready(struct nand_chip *chip)
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{
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struct sharpsl_nand *sharpsl = mtd_to_sharpsl(nand_to_mtd(chip));
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return !((readb(sharpsl->io + FLASHCTL) & FLRYBY) == 0);
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}
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static void sharpsl_nand_enable_hwecc(struct nand_chip *chip, int mode)
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{
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struct sharpsl_nand *sharpsl = mtd_to_sharpsl(nand_to_mtd(chip));
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writeb(0, sharpsl->io + ECCCLRR);
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}
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static int sharpsl_nand_calculate_ecc(struct nand_chip *chip,
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const u_char * dat, u_char * ecc_code)
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{
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struct sharpsl_nand *sharpsl = mtd_to_sharpsl(nand_to_mtd(chip));
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ecc_code[0] = ~readb(sharpsl->io + ECCLPUB);
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ecc_code[1] = ~readb(sharpsl->io + ECCLPLB);
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ecc_code[2] = (~readb(sharpsl->io + ECCCP) << 2) | 0x03;
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return readb(sharpsl->io + ECCCNTR) != 0;
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}
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static int sharpsl_attach_chip(struct nand_chip *chip)
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{
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if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
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return 0;
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chip->ecc.size = 256;
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chip->ecc.bytes = 3;
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chip->ecc.strength = 1;
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chip->ecc.hwctl = sharpsl_nand_enable_hwecc;
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chip->ecc.calculate = sharpsl_nand_calculate_ecc;
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chip->ecc.correct = rawnand_sw_hamming_correct;
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return 0;
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}
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static const struct nand_controller_ops sharpsl_ops = {
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.attach_chip = sharpsl_attach_chip,
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};
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/*
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* Main initialization routine
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*/
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static int sharpsl_nand_probe(struct platform_device *pdev)
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{
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struct nand_chip *this;
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struct mtd_info *mtd;
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struct resource *r;
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int err = 0;
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struct sharpsl_nand *sharpsl;
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struct sharpsl_nand_platform_data *data = dev_get_platdata(&pdev->dev);
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if (!data) {
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dev_err(&pdev->dev, "no platform data!\n");
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return -EINVAL;
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}
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/* Allocate memory for MTD device structure and private data */
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sharpsl = kzalloc(sizeof(struct sharpsl_nand), GFP_KERNEL);
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if (!sharpsl)
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return -ENOMEM;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!r) {
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dev_err(&pdev->dev, "no io memory resource defined!\n");
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err = -ENODEV;
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goto err_get_res;
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}
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/* map physical address */
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sharpsl->io = ioremap(r->start, resource_size(r));
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if (!sharpsl->io) {
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dev_err(&pdev->dev, "ioremap to access Sharp SL NAND chip failed\n");
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err = -EIO;
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goto err_ioremap;
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}
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/* Get pointer to private data */
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this = (struct nand_chip *)(&sharpsl->chip);
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nand_controller_init(&sharpsl->controller);
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sharpsl->controller.ops = &sharpsl_ops;
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this->controller = &sharpsl->controller;
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/* Link the private data with the MTD structure */
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mtd = nand_to_mtd(this);
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mtd->dev.parent = &pdev->dev;
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mtd_set_ooblayout(mtd, data->ecc_layout);
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platform_set_drvdata(pdev, sharpsl);
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/*
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* PXA initialize
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*/
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writeb(readb(sharpsl->io + FLASHCTL) | FLWP, sharpsl->io + FLASHCTL);
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/* Set address of NAND IO lines */
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this->legacy.IO_ADDR_R = sharpsl->io + FLASHIO;
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this->legacy.IO_ADDR_W = sharpsl->io + FLASHIO;
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/* Set address of hardware control function */
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this->legacy.cmd_ctrl = sharpsl_nand_hwcontrol;
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this->legacy.dev_ready = sharpsl_nand_dev_ready;
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/* 15 us command delay time */
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this->legacy.chip_delay = 15;
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this->badblock_pattern = data->badblock_pattern;
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/* Scan to find existence of the device */
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err = nand_scan(this, 1);
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if (err)
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goto err_scan;
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/* Register the partitions */
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mtd->name = "sharpsl-nand";
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err = mtd_device_parse_register(mtd, data->part_parsers, NULL,
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data->partitions, data->nr_partitions);
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if (err)
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goto err_add;
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/* Return happy */
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return 0;
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err_add:
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nand_cleanup(this);
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err_scan:
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iounmap(sharpsl->io);
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err_ioremap:
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err_get_res:
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kfree(sharpsl);
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return err;
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}
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/*
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* Clean up routine
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*/
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static int sharpsl_nand_remove(struct platform_device *pdev)
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{
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struct sharpsl_nand *sharpsl = platform_get_drvdata(pdev);
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struct nand_chip *chip = &sharpsl->chip;
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int ret;
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/* Unregister device */
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ret = mtd_device_unregister(nand_to_mtd(chip));
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WARN_ON(ret);
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/* Release resources */
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nand_cleanup(chip);
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iounmap(sharpsl->io);
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/* Free the driver's structure */
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kfree(sharpsl);
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return 0;
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}
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static struct platform_driver sharpsl_nand_driver = {
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.driver = {
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.name = "sharpsl-nand",
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},
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.probe = sharpsl_nand_probe,
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.remove = sharpsl_nand_remove,
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};
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module_platform_driver(sharpsl_nand_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
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MODULE_DESCRIPTION("Device specific logic for NAND flash on Sharp SL-C7xx Series");
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