mirror of https://gitee.com/openkylin/linux.git
403 lines
11 KiB
C
403 lines
11 KiB
C
/*******************************************************************************
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This contains the functions to handle the enhanced descriptors.
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Copyright (C) 2007-2009 STMicroelectronics Ltd
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
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*******************************************************************************/
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#include <linux/stmmac.h>
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#include "common.h"
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#include "descs_com.h"
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static int enh_desc_get_tx_status(void *data, struct stmmac_extra_stats *x,
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struct dma_desc *p, void __iomem *ioaddr)
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{
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int ret = 0;
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struct net_device_stats *stats = (struct net_device_stats *)data;
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if (unlikely(p->des01.etx.error_summary)) {
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if (unlikely(p->des01.etx.jabber_timeout))
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x->tx_jabber++;
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if (unlikely(p->des01.etx.frame_flushed)) {
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x->tx_frame_flushed++;
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dwmac_dma_flush_tx_fifo(ioaddr);
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}
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if (unlikely(p->des01.etx.loss_carrier)) {
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x->tx_losscarrier++;
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stats->tx_carrier_errors++;
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}
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if (unlikely(p->des01.etx.no_carrier)) {
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x->tx_carrier++;
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stats->tx_carrier_errors++;
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}
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if (unlikely(p->des01.etx.late_collision))
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stats->collisions += p->des01.etx.collision_count;
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if (unlikely(p->des01.etx.excessive_collisions))
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stats->collisions += p->des01.etx.collision_count;
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if (unlikely(p->des01.etx.excessive_deferral))
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x->tx_deferred++;
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if (unlikely(p->des01.etx.underflow_error)) {
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dwmac_dma_flush_tx_fifo(ioaddr);
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x->tx_underflow++;
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}
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if (unlikely(p->des01.etx.ip_header_error))
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x->tx_ip_header_error++;
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if (unlikely(p->des01.etx.payload_error)) {
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x->tx_payload_error++;
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dwmac_dma_flush_tx_fifo(ioaddr);
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}
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ret = -1;
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}
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if (unlikely(p->des01.etx.deferred))
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x->tx_deferred++;
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#ifdef STMMAC_VLAN_TAG_USED
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if (p->des01.etx.vlan_frame)
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x->tx_vlan++;
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#endif
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return ret;
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}
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static int enh_desc_get_tx_len(struct dma_desc *p)
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{
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return p->des01.etx.buffer1_size;
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}
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static int enh_desc_coe_rdes0(int ipc_err, int type, int payload_err)
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{
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int ret = good_frame;
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u32 status = (type << 2 | ipc_err << 1 | payload_err) & 0x7;
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/* bits 5 7 0 | Frame status
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* ----------------------------------------------------------
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* 0 0 0 | IEEE 802.3 Type frame (length < 1536 octects)
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* 1 0 0 | IPv4/6 No CSUM errorS.
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* 1 0 1 | IPv4/6 CSUM PAYLOAD error
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* 1 1 0 | IPv4/6 CSUM IP HR error
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* 1 1 1 | IPv4/6 IP PAYLOAD AND HEADER errorS
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* 0 0 1 | IPv4/6 unsupported IP PAYLOAD
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* 0 1 1 | COE bypassed.. no IPv4/6 frame
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* 0 1 0 | Reserved.
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*/
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if (status == 0x0)
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ret = llc_snap;
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else if (status == 0x4)
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ret = good_frame;
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else if (status == 0x5)
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ret = csum_none;
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else if (status == 0x6)
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ret = csum_none;
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else if (status == 0x7)
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ret = csum_none;
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else if (status == 0x1)
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ret = discard_frame;
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else if (status == 0x3)
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ret = discard_frame;
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return ret;
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}
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static void enh_desc_get_ext_status(void *data, struct stmmac_extra_stats *x,
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struct dma_extended_desc *p)
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{
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if (unlikely(p->basic.des01.erx.rx_mac_addr)) {
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if (p->des4.erx.ip_hdr_err)
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x->ip_hdr_err++;
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if (p->des4.erx.ip_payload_err)
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x->ip_payload_err++;
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if (p->des4.erx.ip_csum_bypassed)
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x->ip_csum_bypassed++;
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if (p->des4.erx.ipv4_pkt_rcvd)
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x->ipv4_pkt_rcvd++;
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if (p->des4.erx.ipv6_pkt_rcvd)
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x->ipv6_pkt_rcvd++;
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if (p->des4.erx.msg_type == RDES_EXT_SYNC)
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x->rx_msg_type_sync++;
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else if (p->des4.erx.msg_type == RDES_EXT_FOLLOW_UP)
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x->rx_msg_type_follow_up++;
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else if (p->des4.erx.msg_type == RDES_EXT_DELAY_REQ)
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x->rx_msg_type_delay_req++;
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else if (p->des4.erx.msg_type == RDES_EXT_DELAY_RESP)
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x->rx_msg_type_delay_resp++;
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else if (p->des4.erx.msg_type == RDES_EXT_DELAY_REQ)
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x->rx_msg_type_pdelay_req++;
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else if (p->des4.erx.msg_type == RDES_EXT_PDELAY_RESP)
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x->rx_msg_type_pdelay_resp++;
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else if (p->des4.erx.msg_type == RDES_EXT_PDELAY_FOLLOW_UP)
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x->rx_msg_type_pdelay_follow_up++;
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else
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x->rx_msg_type_ext_no_ptp++;
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if (p->des4.erx.ptp_frame_type)
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x->ptp_frame_type++;
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if (p->des4.erx.ptp_ver)
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x->ptp_ver++;
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if (p->des4.erx.timestamp_dropped)
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x->timestamp_dropped++;
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if (p->des4.erx.av_pkt_rcvd)
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x->av_pkt_rcvd++;
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if (p->des4.erx.av_tagged_pkt_rcvd)
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x->av_tagged_pkt_rcvd++;
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if (p->des4.erx.vlan_tag_priority_val)
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x->vlan_tag_priority_val++;
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if (p->des4.erx.l3_filter_match)
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x->l3_filter_match++;
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if (p->des4.erx.l4_filter_match)
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x->l4_filter_match++;
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if (p->des4.erx.l3_l4_filter_no_match)
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x->l3_l4_filter_no_match++;
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}
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}
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static int enh_desc_get_rx_status(void *data, struct stmmac_extra_stats *x,
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struct dma_desc *p)
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{
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int ret = good_frame;
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struct net_device_stats *stats = (struct net_device_stats *)data;
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if (unlikely(p->des01.erx.error_summary)) {
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if (unlikely(p->des01.erx.descriptor_error)) {
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x->rx_desc++;
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stats->rx_length_errors++;
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}
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if (unlikely(p->des01.erx.overflow_error))
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x->rx_gmac_overflow++;
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if (unlikely(p->des01.erx.ipc_csum_error))
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pr_err("\tIPC Csum Error/Giant frame\n");
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if (unlikely(p->des01.erx.late_collision)) {
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stats->collisions++;
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}
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if (unlikely(p->des01.erx.receive_watchdog))
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x->rx_watchdog++;
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if (unlikely(p->des01.erx.error_gmii))
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x->rx_mii++;
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if (unlikely(p->des01.erx.crc_error)) {
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x->rx_crc++;
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stats->rx_crc_errors++;
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}
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ret = discard_frame;
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}
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/* After a payload csum error, the ES bit is set.
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* It doesn't match with the information reported into the databook.
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* At any rate, we need to understand if the CSUM hw computation is ok
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* and report this info to the upper layers. */
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ret = enh_desc_coe_rdes0(p->des01.erx.ipc_csum_error,
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p->des01.erx.frame_type, p->des01.erx.rx_mac_addr);
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if (unlikely(p->des01.erx.dribbling))
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x->dribbling_bit++;
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if (unlikely(p->des01.erx.sa_filter_fail)) {
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x->sa_rx_filter_fail++;
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ret = discard_frame;
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}
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if (unlikely(p->des01.erx.da_filter_fail)) {
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x->da_rx_filter_fail++;
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ret = discard_frame;
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}
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if (unlikely(p->des01.erx.length_error)) {
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x->rx_length++;
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ret = discard_frame;
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}
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#ifdef STMMAC_VLAN_TAG_USED
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if (p->des01.erx.vlan_tag)
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x->rx_vlan++;
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#endif
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return ret;
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}
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static void enh_desc_init_rx_desc(struct dma_desc *p, int disable_rx_ic,
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int mode, int end)
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{
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p->des01.erx.own = 1;
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p->des01.erx.buffer1_size = BUF_SIZE_8KiB - 1;
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if (mode == STMMAC_CHAIN_MODE)
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ehn_desc_rx_set_on_chain(p, end);
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else
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ehn_desc_rx_set_on_ring(p, end);
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if (disable_rx_ic)
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p->des01.erx.disable_ic = 1;
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}
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static void enh_desc_init_tx_desc(struct dma_desc *p, int mode, int end)
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{
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p->des01.etx.own = 0;
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if (mode == STMMAC_CHAIN_MODE)
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ehn_desc_tx_set_on_chain(p, end);
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else
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ehn_desc_tx_set_on_ring(p, end);
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}
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static int enh_desc_get_tx_owner(struct dma_desc *p)
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{
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return p->des01.etx.own;
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}
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static int enh_desc_get_rx_owner(struct dma_desc *p)
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{
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return p->des01.erx.own;
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}
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static void enh_desc_set_tx_owner(struct dma_desc *p)
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{
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p->des01.etx.own = 1;
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}
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static void enh_desc_set_rx_owner(struct dma_desc *p)
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{
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p->des01.erx.own = 1;
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}
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static int enh_desc_get_tx_ls(struct dma_desc *p)
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{
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return p->des01.etx.last_segment;
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}
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static void enh_desc_release_tx_desc(struct dma_desc *p, int mode)
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{
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int ter = p->des01.etx.end_ring;
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memset(p, 0, offsetof(struct dma_desc, des2));
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if (mode == STMMAC_CHAIN_MODE)
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enh_desc_end_tx_desc_on_chain(p, ter);
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else
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enh_desc_end_tx_desc_on_ring(p, ter);
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}
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static void enh_desc_prepare_tx_desc(struct dma_desc *p, int is_fs, int len,
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int csum_flag, int mode)
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{
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p->des01.etx.first_segment = is_fs;
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if (mode == STMMAC_CHAIN_MODE)
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enh_set_tx_desc_len_on_chain(p, len);
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else
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enh_set_tx_desc_len_on_ring(p, len);
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if (likely(csum_flag))
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p->des01.etx.checksum_insertion = cic_full;
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}
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static void enh_desc_clear_tx_ic(struct dma_desc *p)
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{
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p->des01.etx.interrupt = 0;
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}
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static void enh_desc_close_tx_desc(struct dma_desc *p)
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{
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p->des01.etx.last_segment = 1;
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p->des01.etx.interrupt = 1;
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}
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static int enh_desc_get_rx_frame_len(struct dma_desc *p, int rx_coe_type)
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{
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/* The type-1 checksum offload engines append the checksum at
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* the end of frame and the two bytes of checksum are added in
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* the length.
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* Adjust for that in the framelen for type-1 checksum offload
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* engines. */
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if (rx_coe_type == STMMAC_RX_COE_TYPE1)
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return p->des01.erx.frame_length - 2;
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else
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return p->des01.erx.frame_length;
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}
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static void enh_desc_enable_tx_timestamp(struct dma_desc *p)
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{
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p->des01.etx.time_stamp_enable = 1;
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}
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static int enh_desc_get_tx_timestamp_status(struct dma_desc *p)
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{
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return p->des01.etx.time_stamp_status;
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}
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static u64 enh_desc_get_timestamp(void *desc, u32 ats)
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{
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u64 ns;
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if (ats) {
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struct dma_extended_desc *p = (struct dma_extended_desc *)desc;
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ns = p->des6;
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/* convert high/sec time stamp value to nanosecond */
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ns += p->des7 * 1000000000ULL;
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} else {
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struct dma_desc *p = (struct dma_desc *)desc;
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ns = p->des2;
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ns += p->des3 * 1000000000ULL;
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}
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return ns;
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}
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static int enh_desc_get_rx_timestamp_status(void *desc, u32 ats)
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{
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if (ats) {
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struct dma_extended_desc *p = (struct dma_extended_desc *)desc;
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return p->basic.des01.erx.ipc_csum_error;
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} else {
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struct dma_desc *p = (struct dma_desc *)desc;
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if ((p->des2 == 0xffffffff) && (p->des3 == 0xffffffff))
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/* timestamp is corrupted, hence don't store it */
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return 0;
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else
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return 1;
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}
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}
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const struct stmmac_desc_ops enh_desc_ops = {
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.tx_status = enh_desc_get_tx_status,
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.rx_status = enh_desc_get_rx_status,
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.get_tx_len = enh_desc_get_tx_len,
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.init_rx_desc = enh_desc_init_rx_desc,
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.init_tx_desc = enh_desc_init_tx_desc,
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.get_tx_owner = enh_desc_get_tx_owner,
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.get_rx_owner = enh_desc_get_rx_owner,
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.release_tx_desc = enh_desc_release_tx_desc,
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.prepare_tx_desc = enh_desc_prepare_tx_desc,
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.clear_tx_ic = enh_desc_clear_tx_ic,
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.close_tx_desc = enh_desc_close_tx_desc,
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.get_tx_ls = enh_desc_get_tx_ls,
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.set_tx_owner = enh_desc_set_tx_owner,
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.set_rx_owner = enh_desc_set_rx_owner,
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.get_rx_frame_len = enh_desc_get_rx_frame_len,
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.rx_extended_status = enh_desc_get_ext_status,
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.enable_tx_timestamp = enh_desc_enable_tx_timestamp,
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.get_tx_timestamp_status = enh_desc_get_tx_timestamp_status,
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.get_timestamp = enh_desc_get_timestamp,
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.get_rx_timestamp_status = enh_desc_get_rx_timestamp_status,
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};
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