mirror of https://gitee.com/openkylin/linux.git
d838ff33ec
This commit adds gating support to PLL1 on the clock driver. This makes the PLL1 implementation fully compatible with PLL4 as well. Signed-off-by: Emilio López <emilio@elopez.com.ar> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Mike Turquette <mturquette@linaro.org> |
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| .. | ||
| Makefile | ||
| clk-factors.c | ||
| clk-factors.h | ||
| clk-sunxi.c | ||