mirror of https://gitee.com/openkylin/linux.git
438 lines
11 KiB
C
438 lines
11 KiB
C
/*
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* SWIOTLB-based DMA API implementation
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*
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* Copyright (C) 2012 ARM Ltd.
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* Author: Catalin Marinas <catalin.marinas@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/gfp.h>
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#include <linux/export.h>
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#include <linux/slab.h>
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#include <linux/genalloc.h>
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#include <linux/dma-mapping.h>
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#include <linux/dma-contiguous.h>
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#include <linux/vmalloc.h>
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#include <linux/swiotlb.h>
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#include <asm/cacheflush.h>
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struct dma_map_ops *dma_ops;
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EXPORT_SYMBOL(dma_ops);
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static pgprot_t __get_dma_pgprot(struct dma_attrs *attrs, pgprot_t prot,
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bool coherent)
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{
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if (!coherent || dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs))
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return pgprot_writecombine(prot);
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return prot;
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}
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static struct gen_pool *atomic_pool;
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#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
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static size_t atomic_pool_size = DEFAULT_DMA_COHERENT_POOL_SIZE;
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static int __init early_coherent_pool(char *p)
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{
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atomic_pool_size = memparse(p, &p);
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return 0;
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}
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early_param("coherent_pool", early_coherent_pool);
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static void *__alloc_from_pool(size_t size, struct page **ret_page, gfp_t flags)
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{
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unsigned long val;
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void *ptr = NULL;
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if (!atomic_pool) {
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WARN(1, "coherent pool not initialised!\n");
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return NULL;
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}
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val = gen_pool_alloc(atomic_pool, size);
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if (val) {
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phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);
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*ret_page = phys_to_page(phys);
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ptr = (void *)val;
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if (flags & __GFP_ZERO)
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memset(ptr, 0, size);
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}
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return ptr;
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}
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static bool __in_atomic_pool(void *start, size_t size)
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{
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return addr_in_gen_pool(atomic_pool, (unsigned long)start, size);
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}
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static int __free_from_pool(void *start, size_t size)
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{
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if (!__in_atomic_pool(start, size))
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return 0;
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gen_pool_free(atomic_pool, (unsigned long)start, size);
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return 1;
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}
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static void *__dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flags,
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struct dma_attrs *attrs)
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{
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if (dev == NULL) {
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WARN_ONCE(1, "Use an actual device structure for DMA allocation\n");
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return NULL;
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}
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if (IS_ENABLED(CONFIG_ZONE_DMA) &&
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dev->coherent_dma_mask <= DMA_BIT_MASK(32))
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flags |= GFP_DMA;
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if (IS_ENABLED(CONFIG_DMA_CMA) && (flags & __GFP_WAIT)) {
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struct page *page;
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void *addr;
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size = PAGE_ALIGN(size);
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page = dma_alloc_from_contiguous(dev, size >> PAGE_SHIFT,
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get_order(size));
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if (!page)
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return NULL;
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*dma_handle = phys_to_dma(dev, page_to_phys(page));
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addr = page_address(page);
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if (flags & __GFP_ZERO)
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memset(addr, 0, size);
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return addr;
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} else {
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return swiotlb_alloc_coherent(dev, size, dma_handle, flags);
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}
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}
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static void __dma_free_coherent(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle,
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struct dma_attrs *attrs)
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{
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bool freed;
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phys_addr_t paddr = dma_to_phys(dev, dma_handle);
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if (dev == NULL) {
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WARN_ONCE(1, "Use an actual device structure for DMA allocation\n");
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return;
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}
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freed = dma_release_from_contiguous(dev,
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phys_to_page(paddr),
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size >> PAGE_SHIFT);
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if (!freed)
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swiotlb_free_coherent(dev, size, vaddr, dma_handle);
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}
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static void *__dma_alloc(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flags,
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struct dma_attrs *attrs)
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{
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struct page *page;
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void *ptr, *coherent_ptr;
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bool coherent = is_device_dma_coherent(dev);
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size = PAGE_ALIGN(size);
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if (!coherent && !(flags & __GFP_WAIT)) {
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struct page *page = NULL;
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void *addr = __alloc_from_pool(size, &page, flags);
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if (addr)
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*dma_handle = phys_to_dma(dev, page_to_phys(page));
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return addr;
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}
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ptr = __dma_alloc_coherent(dev, size, dma_handle, flags, attrs);
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if (!ptr)
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goto no_mem;
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/* no need for non-cacheable mapping if coherent */
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if (coherent)
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return ptr;
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/* remove any dirty cache lines on the kernel alias */
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__dma_flush_range(ptr, ptr + size);
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/* create a coherent mapping */
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page = virt_to_page(ptr);
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coherent_ptr = dma_common_contiguous_remap(page, size, VM_USERMAP,
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__get_dma_pgprot(attrs,
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__pgprot(PROT_NORMAL_NC), false),
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NULL);
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if (!coherent_ptr)
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goto no_map;
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return coherent_ptr;
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no_map:
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__dma_free_coherent(dev, size, ptr, *dma_handle, attrs);
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no_mem:
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*dma_handle = DMA_ERROR_CODE;
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return NULL;
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}
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static void __dma_free(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle,
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struct dma_attrs *attrs)
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{
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void *swiotlb_addr = phys_to_virt(dma_to_phys(dev, dma_handle));
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if (!is_device_dma_coherent(dev)) {
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if (__free_from_pool(vaddr, size))
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return;
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vunmap(vaddr);
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}
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__dma_free_coherent(dev, size, swiotlb_addr, dma_handle, attrs);
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}
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static dma_addr_t __swiotlb_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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dma_addr_t dev_addr;
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dev_addr = swiotlb_map_page(dev, page, offset, size, dir, attrs);
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if (!is_device_dma_coherent(dev))
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__dma_map_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
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return dev_addr;
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}
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static void __swiotlb_unmap_page(struct device *dev, dma_addr_t dev_addr,
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size_t size, enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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if (!is_device_dma_coherent(dev))
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__dma_unmap_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
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swiotlb_unmap_page(dev, dev_addr, size, dir, attrs);
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}
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static int __swiotlb_map_sg_attrs(struct device *dev, struct scatterlist *sgl,
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int nelems, enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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struct scatterlist *sg;
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int i, ret;
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ret = swiotlb_map_sg_attrs(dev, sgl, nelems, dir, attrs);
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if (!is_device_dma_coherent(dev))
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for_each_sg(sgl, sg, ret, i)
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__dma_map_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
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sg->length, dir);
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return ret;
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}
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static void __swiotlb_unmap_sg_attrs(struct device *dev,
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struct scatterlist *sgl, int nelems,
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enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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struct scatterlist *sg;
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int i;
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if (!is_device_dma_coherent(dev))
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for_each_sg(sgl, sg, nelems, i)
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__dma_unmap_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
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sg->length, dir);
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swiotlb_unmap_sg_attrs(dev, sgl, nelems, dir, attrs);
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}
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static void __swiotlb_sync_single_for_cpu(struct device *dev,
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dma_addr_t dev_addr, size_t size,
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enum dma_data_direction dir)
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{
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if (!is_device_dma_coherent(dev))
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__dma_unmap_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
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swiotlb_sync_single_for_cpu(dev, dev_addr, size, dir);
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}
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static void __swiotlb_sync_single_for_device(struct device *dev,
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dma_addr_t dev_addr, size_t size,
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enum dma_data_direction dir)
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{
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swiotlb_sync_single_for_device(dev, dev_addr, size, dir);
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if (!is_device_dma_coherent(dev))
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__dma_map_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
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}
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static void __swiotlb_sync_sg_for_cpu(struct device *dev,
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struct scatterlist *sgl, int nelems,
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enum dma_data_direction dir)
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{
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struct scatterlist *sg;
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int i;
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if (!is_device_dma_coherent(dev))
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for_each_sg(sgl, sg, nelems, i)
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__dma_unmap_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
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sg->length, dir);
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swiotlb_sync_sg_for_cpu(dev, sgl, nelems, dir);
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}
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static void __swiotlb_sync_sg_for_device(struct device *dev,
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struct scatterlist *sgl, int nelems,
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enum dma_data_direction dir)
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{
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struct scatterlist *sg;
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int i;
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swiotlb_sync_sg_for_device(dev, sgl, nelems, dir);
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if (!is_device_dma_coherent(dev))
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for_each_sg(sgl, sg, nelems, i)
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__dma_map_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
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sg->length, dir);
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}
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/* vma->vm_page_prot must be set appropriately before calling this function */
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static int __dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size)
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{
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int ret = -ENXIO;
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unsigned long nr_vma_pages = (vma->vm_end - vma->vm_start) >>
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PAGE_SHIFT;
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unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
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unsigned long pfn = dma_to_phys(dev, dma_addr) >> PAGE_SHIFT;
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unsigned long off = vma->vm_pgoff;
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if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
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return ret;
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if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
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ret = remap_pfn_range(vma, vma->vm_start,
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pfn + off,
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vma->vm_end - vma->vm_start,
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vma->vm_page_prot);
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}
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return ret;
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}
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static int __swiotlb_mmap(struct device *dev,
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struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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struct dma_attrs *attrs)
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{
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vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot,
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is_device_dma_coherent(dev));
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return __dma_common_mmap(dev, vma, cpu_addr, dma_addr, size);
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}
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static struct dma_map_ops swiotlb_dma_ops = {
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.alloc = __dma_alloc,
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.free = __dma_free,
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.mmap = __swiotlb_mmap,
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.map_page = __swiotlb_map_page,
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.unmap_page = __swiotlb_unmap_page,
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.map_sg = __swiotlb_map_sg_attrs,
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.unmap_sg = __swiotlb_unmap_sg_attrs,
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.sync_single_for_cpu = __swiotlb_sync_single_for_cpu,
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.sync_single_for_device = __swiotlb_sync_single_for_device,
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.sync_sg_for_cpu = __swiotlb_sync_sg_for_cpu,
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.sync_sg_for_device = __swiotlb_sync_sg_for_device,
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.dma_supported = swiotlb_dma_supported,
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.mapping_error = swiotlb_dma_mapping_error,
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};
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static int __init atomic_pool_init(void)
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{
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pgprot_t prot = __pgprot(PROT_NORMAL_NC);
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unsigned long nr_pages = atomic_pool_size >> PAGE_SHIFT;
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struct page *page;
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void *addr;
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unsigned int pool_size_order = get_order(atomic_pool_size);
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if (dev_get_cma_area(NULL))
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page = dma_alloc_from_contiguous(NULL, nr_pages,
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pool_size_order);
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else
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page = alloc_pages(GFP_DMA, pool_size_order);
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if (page) {
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int ret;
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void *page_addr = page_address(page);
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memset(page_addr, 0, atomic_pool_size);
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__dma_flush_range(page_addr, page_addr + atomic_pool_size);
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atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
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if (!atomic_pool)
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goto free_page;
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addr = dma_common_contiguous_remap(page, atomic_pool_size,
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VM_USERMAP, prot, atomic_pool_init);
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if (!addr)
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goto destroy_genpool;
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ret = gen_pool_add_virt(atomic_pool, (unsigned long)addr,
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page_to_phys(page),
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atomic_pool_size, -1);
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if (ret)
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goto remove_mapping;
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gen_pool_set_algo(atomic_pool,
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gen_pool_first_fit_order_align,
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(void *)PAGE_SHIFT);
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pr_info("DMA: preallocated %zu KiB pool for atomic allocations\n",
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atomic_pool_size / 1024);
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return 0;
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}
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goto out;
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remove_mapping:
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dma_common_free_remap(addr, atomic_pool_size, VM_USERMAP);
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destroy_genpool:
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gen_pool_destroy(atomic_pool);
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atomic_pool = NULL;
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free_page:
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if (!dma_release_from_contiguous(NULL, page, nr_pages))
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__free_pages(page, pool_size_order);
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out:
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pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n",
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atomic_pool_size / 1024);
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return -ENOMEM;
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}
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static int __init arm64_dma_init(void)
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{
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int ret;
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dma_ops = &swiotlb_dma_ops;
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ret = atomic_pool_init();
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return ret;
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}
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arch_initcall(arm64_dma_init);
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#define PREALLOC_DMA_DEBUG_ENTRIES 4096
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static int __init dma_debug_do_init(void)
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{
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dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
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return 0;
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}
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fs_initcall(dma_debug_do_init);
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