mirror of https://gitee.com/openkylin/linux.git
189 lines
5.2 KiB
Plaintext
189 lines
5.2 KiB
Plaintext
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "omap443x.dtsi"
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/ {
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model = "Motorola Droid 4 XT894";
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compatible = "motorola,droid4", "ti,omap4430", "ti,omap4";
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chosen {
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stdout-path = &uart3;
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};
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/*
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* We seem to have only 1021 MB accessible, 1021 - 1022 is locked,
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* then 1023 - 1024 seems to contain mbm. For SRAM, see the notes
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* below about SRAM and L3_ICLK2 being unused by default,
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*/
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memory {
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device_type = "memory";
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reg = <0x80000000 0x3fd00000>; /* 1021 MB */
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};
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/* CPCAP really supports 1650000 to 3400000 range */
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vmmc: regulator-mmc {
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compatible = "regulator-fixed";
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regulator-name = "vmmc";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-always-on;
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};
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/* CPCAP really supports 3000000 to 3100000 range */
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vemmc: regulator-emmc {
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compatible = "regulator-fixed";
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regulator-name = "vemmc";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-always-on;
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};
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/* CPCAP really supports 1650000 to 1950000 range */
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wl12xx_vmmc: regulator-wl12xx {
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compatible = "regulator-fixed";
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regulator-name = "vwl1271";
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regulator-min-microvolt = <1650000>;
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regulator-max-microvolt = <1650000>;
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gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>; /* gpio94 */
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startup-delay-us = <70000>;
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enable-active-high;
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};
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};
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/* L3_2 interconnect is unused, SRAM, GPMC and L3_ICLK2 disabled */
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&gpmc {
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status = "disabled";
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};
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&mmc1 {
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vmmc-supply = <&vmmc>;
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bus-width = <4>;
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cd-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; /* gpio106 */
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};
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&mmc2 {
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vmmc-supply = <&vemmc>;
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bus-width = <8>;
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non-removable;
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};
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&mmc3 {
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vmmc-supply = <&wl12xx_vmmc>;
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interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH
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&omap4_pmx_core 0xde>;
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non-removable;
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bus-width = <4>;
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cap-power-off-card;
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#address-cells = <1>;
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#size-cells = <0>;
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wlcore: wlcore@2 {
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compatible = "ti,wl1283";
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reg = <2>;
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interrupt-parent = <&gpio4>;
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interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; /* gpio100 */
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ref-clock-frequency = <26000000>;
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tcxo-clock-frequency = <26000000>;
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};
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};
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/* L3_2 interconnect is unused, SRAM, GPMC and L3_ICLK2 disabled */
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&ocmcram {
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status = "disabled";
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};
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&omap4_pmx_core {
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usb_gpio_mux_sel1: pinmux_usb_gpio_mux_sel1_pins {
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/* gpio_60 */
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pinctrl-single,pins = <
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OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3)
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>;
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};
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usb_ulpi_pins: pinmux_usb_ulpi_pins {
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pinctrl-single,pins = <
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OMAP4_IOPAD(0x196, MUX_MODE7)
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OMAP4_IOPAD(0x198, MUX_MODE7)
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OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE0)
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OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE0)
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OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE0)
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OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE0)
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OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE0)
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OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE0)
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OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE0)
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OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE0)
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OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE0)
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OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE0)
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OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE0)
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OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE0)
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>;
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};
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/* usb0_otg_dp and usb0_otg_dm */
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usb_utmi_pins: pinmux_usb_utmi_pins {
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pinctrl-single,pins = <
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OMAP4_IOPAD(0x196, PIN_INPUT | MUX_MODE0)
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OMAP4_IOPAD(0x198, PIN_INPUT | MUX_MODE0)
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OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7)
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OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7)
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OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7)
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OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7)
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OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE7)
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OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE7)
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OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7)
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OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7)
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OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7)
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OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7)
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OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7)
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OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
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>;
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};
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/* uart3_tx_irtx and uart3_rx_irrx */
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uart3_pins: pinmux_uart3_pins {
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pinctrl-single,pins = <
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OMAP4_IOPAD(0x196, MUX_MODE7)
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OMAP4_IOPAD(0x198, MUX_MODE7)
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OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7)
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OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7)
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OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7)
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OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7)
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OMAP4_IOPAD(0x1ba, MUX_MODE2)
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OMAP4_IOPAD(0x1bc, PIN_INPUT | MUX_MODE2)
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OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7)
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OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7)
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OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7)
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OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7)
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OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7)
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OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
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>;
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};
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};
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&omap4_pmx_wkup {
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usb_gpio_mux_sel2: pinmux_usb_gpio_mux_sel2_pins {
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/* gpio_wk0 */
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pinctrl-single,pins = <
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OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
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>;
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};
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};
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&uart3 {
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interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
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&omap4_pmx_core 0x17c>;
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};
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/* Internal UTMI+ PHY used for OTG, CPCAP ULPI PHY for detection and charger */
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&usb_otg_hs {
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interface-type = <1>;
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mode = <3>;
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power = <50>;
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};
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