Aviv Heller 13eab21f92 IB/mlx5: LAG QP load balancing ... When LAG is active, QP tx affinity (the physical port to which a QP is affined, or the TIS in case of raw-eth) is set in a round robin fashion during state transition from RESET to INIT. Signed-off-by: Aviv Heller <avivh@mellanox.com> Signed-off-by: Leon Romanovsky <leon@kernel.org> Signed-off-by: Doug Ledford <dledford@redhat.com>		2016-10-07 16:54:22 -04:00
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cxgb3	Merge branches 'cxgb4' and 'mlx5' into k.o/for-4.8	2016-08-03 20:58:45 -04:00
cxgb4	Merge branches 'cxgb4' and 'mlx5' into k.o/for-4.8	2016-08-03 20:58:45 -04:00
hfi1	Second round of merge items for 4.8	2016-08-04 20:26:31 -04:00
hns	IB/hns: Add support of ACPI to the Hisilicon RoCE driver	2016-08-25 10:05:10 -04:00
i40iw	Round one of 4.8 code	2016-08-04 20:10:31 -04:00
mlx4	IB/mlx4: Add validation to flow specifications parsing	2016-10-07 16:54:16 -04:00
mlx5	IB/mlx5: LAG QP load balancing	2016-10-07 16:54:22 -04:00
mthca	Merge branches 'misc' and 'rxe' into k.o/for-4.8-1	2016-08-04 11:13:47 -04:00
nes	IB/nes: Support device FW version string	2016-06-23 12:08:34 -04:00
ocrdma	IB/ocrdma: Support device FW version string	2016-06-23 12:08:34 -04:00
qib	IB/qib, IB/hfi1: Fix grh creation in ud loopback	2016-08-02 16:00:58 -04:00
usnic	IB/usnic: Support device FW version string	2016-06-23 12:08:34 -04:00
Makefile	IB/hns: Kconfig and Makefile for RoCE module	2016-08-22 14:02:33 -04:00