mirror of https://gitee.com/openkylin/linux.git
ddf54503e2
The lock was an overkill, the same can be done with atomics. A mb() was added in kvm_pit_ack_irq, to pair with implicit barrier between pit_timer_fn and pit_do_work. The mb() prevents a race that could happen if pending == 0 and irq_ack == 0: kvm_pit_ack_irq: | pit_timer_fn: p = atomic_read(&ps->pending); | | atomic_inc(&ps->pending); | queue_work(pit_do_work); | pit_do_work: | atomic_xchg(&ps->irq_ack, 0); | return; atomic_set(&ps->irq_ack, 1); | if (p == 0) return; | where the interrupt would not be delivered in this tick of pit_timer_fn. PIT would have eventually delivered the interrupt, but we sacrifice perofmance to make sure that interrupts are not needlessly delayed. sfence isn't enough: atomic_dec_if_positive does atomic_read first and x86 can reorder loads before stores. lfence isn't enough: store can pass lfence, turning it into a nop. A compiler barrier would be more than enough as CPU needs to stall for unbelievably long to use fences. This patch doesn't do anything in kvm_pit_reset_reinject, because any order of resets can race, but the result differs by at most one interrupt, which is ok, because it's the same result as if the reset happened at a slightly different time. (Original code didn't protect the reset path with a proper lock, so users have to be robust.) Signed-off-by: Radim Krčmář <rkrcmar@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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.. | ||
Kconfig | ||
Makefile | ||
assigned-dev.c | ||
assigned-dev.h | ||
cpuid.c | ||
cpuid.h | ||
emulate.c | ||
hyperv.c | ||
hyperv.h | ||
i8254.c | ||
i8254.h | ||
i8259.c | ||
ioapic.c | ||
ioapic.h | ||
iommu.c | ||
irq.c | ||
irq.h | ||
irq_comm.c | ||
kvm_cache_regs.h | ||
lapic.c | ||
lapic.h | ||
mmu.c | ||
mmu.h | ||
mmu_audit.c | ||
mmutrace.h | ||
mtrr.c | ||
page_track.c | ||
paging_tmpl.h | ||
pmu.c | ||
pmu.h | ||
pmu_amd.c | ||
pmu_intel.c | ||
svm.c | ||
trace.h | ||
tss.h | ||
vmx.c | ||
x86.c | ||
x86.h |