Sonny Rao de7d6c3eeb clk: rockchip: fix parent for spdif_8ch_frac on rk3288 ... The parent should be spdif_8ch_pre not spdif_8ch_src, which doesn't exist and looks to be a typo. The TRM also confirms this. Signed-off-by: Sonny Rao <sonnyrao@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>		2014-10-20 12:00:55 +02:00
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Makefile	clk: rockchip: add new clock-type for the cpuclk	2014-09-27 17:57:41 +02:00
clk-cpu.c	clk: rockchip: add new clock-type for the cpuclk	2014-09-27 17:57:41 +02:00
clk-pll.c	clk: rockchip: change pll rate without a clk-notifier	2014-09-27 17:57:04 +02:00
clk-rk3188.c	clk: rockchip: add restart handler	2014-10-01 14:11:42 +02:00
clk-rk3288.c	clk: rockchip: fix parent for spdif_8ch_frac on rk3288	2014-10-20 12:00:55 +02:00
clk-rockchip.c	clk: rockchip: fix function type for CLK_OF_DECLARE	2014-05-20 14:25:22 -05:00
clk.c	clk: rockchip: add restart handler	2014-10-01 14:11:42 +02:00
clk.h	clk: rockchip: add restart handler	2014-10-01 14:11:42 +02:00
softrst.c	clk: rockchip: add reset controller	2014-07-13 12:17:07 -07:00