mirror of https://gitee.com/openkylin/linux.git
dfb09f9b7a
This patch provides performance tuning for the "Bulldozer" CPU. With its shared instruction cache there is a chance of generating an excessive number of cache cross-invalidates when running specific workloads on the cores of a compute module. This excessive amount of cross-invalidations can be observed if cache lines backed by shared physical memory alias in bits [14:12] of their virtual addresses, as those bits are used for the index generation. This patch addresses the issue by clearing all the bits in the [14:12] slice of the file mapping's virtual address at generation time, thus forcing those bits the same for all mappings of a single shared library across processes and, in doing so, avoids instruction cache aliases. It also adds the command line option "align_va_addr=(32|64|on|off)" with which virtual address alignment can be enabled for 32-bit or 64-bit x86 individually, or both, or be completely disabled. This change leaves virtual region address allocation on other families and/or vendors unaffected. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> Link: http://lkml.kernel.org/r/1312550110-24160-2-git-send-email-bp@amd64.org Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> |
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| .. | ||
| mcheck | ||
| mtrr | ||
| .gitignore | ||
| Makefile | ||
| amd.c | ||
| bugs.c | ||
| bugs_64.c | ||
| centaur.c | ||
| common.c | ||
| cpu.h | ||
| cyrix.c | ||
| hypervisor.c | ||
| intel.c | ||
| intel_cacheinfo.c | ||
| mkcapflags.pl | ||
| mshyperv.c | ||
| perf_event.c | ||
| perf_event_amd.c | ||
| perf_event_intel.c | ||
| perf_event_intel_ds.c | ||
| perf_event_intel_lbr.c | ||
| perf_event_p4.c | ||
| perf_event_p6.c | ||
| perfctr-watchdog.c | ||
| powerflags.c | ||
| proc.c | ||
| scattered.c | ||
| sched.c | ||
| topology.c | ||
| transmeta.c | ||
| umc.c | ||
| vmware.c | ||