mirror of https://gitee.com/openkylin/linux.git
565 lines
14 KiB
C
565 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2012 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*/
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#include <linux/arm-smccc.h>
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#include <linux/preempt.h>
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#include <linux/kvm_host.h>
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#include <linux/uaccess.h>
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#include <linux/wait.h>
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#include <asm/cputype.h>
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#include <asm/kvm_emulate.h>
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#include <kvm/arm_psci.h>
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#include <kvm/arm_hypercalls.h>
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/*
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* This is an implementation of the Power State Coordination Interface
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* as described in ARM document number ARM DEN 0022A.
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*/
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#define AFFINITY_MASK(level) ~((0x1UL << ((level) * MPIDR_LEVEL_BITS)) - 1)
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static unsigned long psci_affinity_mask(unsigned long affinity_level)
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{
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if (affinity_level <= 3)
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return MPIDR_HWID_BITMASK & AFFINITY_MASK(affinity_level);
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return 0;
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}
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static unsigned long kvm_psci_vcpu_suspend(struct kvm_vcpu *vcpu)
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{
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/*
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* NOTE: For simplicity, we make VCPU suspend emulation to be
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* same-as WFI (Wait-for-interrupt) emulation.
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*
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* This means for KVM the wakeup events are interrupts and
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* this is consistent with intended use of StateID as described
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* in section 5.4.1 of PSCI v0.2 specification (ARM DEN 0022A).
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*
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* Further, we also treat power-down request to be same as
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* stand-by request as-per section 5.4.2 clause 3 of PSCI v0.2
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* specification (ARM DEN 0022A). This means all suspend states
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* for KVM will preserve the register state.
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*/
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kvm_vcpu_block(vcpu);
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kvm_clear_request(KVM_REQ_UNHALT, vcpu);
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return PSCI_RET_SUCCESS;
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}
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static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.power_off = true;
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kvm_make_request(KVM_REQ_SLEEP, vcpu);
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kvm_vcpu_kick(vcpu);
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}
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static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
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{
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struct vcpu_reset_state *reset_state;
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struct kvm *kvm = source_vcpu->kvm;
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struct kvm_vcpu *vcpu = NULL;
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unsigned long cpu_id;
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cpu_id = smccc_get_arg1(source_vcpu) & MPIDR_HWID_BITMASK;
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if (vcpu_mode_is_32bit(source_vcpu))
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cpu_id &= ~((u32) 0);
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vcpu = kvm_mpidr_to_vcpu(kvm, cpu_id);
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/*
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* Make sure the caller requested a valid CPU and that the CPU is
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* turned off.
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*/
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if (!vcpu)
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return PSCI_RET_INVALID_PARAMS;
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if (!vcpu->arch.power_off) {
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if (kvm_psci_version(source_vcpu, kvm) != KVM_ARM_PSCI_0_1)
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return PSCI_RET_ALREADY_ON;
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else
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return PSCI_RET_INVALID_PARAMS;
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}
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reset_state = &vcpu->arch.reset_state;
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reset_state->pc = smccc_get_arg2(source_vcpu);
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/* Propagate caller endianness */
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reset_state->be = kvm_vcpu_is_be(source_vcpu);
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/*
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* NOTE: We always update r0 (or x0) because for PSCI v0.1
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* the general puspose registers are undefined upon CPU_ON.
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*/
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reset_state->r0 = smccc_get_arg3(source_vcpu);
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WRITE_ONCE(reset_state->reset, true);
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kvm_make_request(KVM_REQ_VCPU_RESET, vcpu);
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/*
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* Make sure the reset request is observed if the change to
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* power_state is observed.
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*/
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smp_wmb();
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vcpu->arch.power_off = false;
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kvm_vcpu_wake_up(vcpu);
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return PSCI_RET_SUCCESS;
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}
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static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
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{
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int i, matching_cpus = 0;
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unsigned long mpidr;
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unsigned long target_affinity;
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unsigned long target_affinity_mask;
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unsigned long lowest_affinity_level;
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struct kvm *kvm = vcpu->kvm;
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struct kvm_vcpu *tmp;
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target_affinity = smccc_get_arg1(vcpu);
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lowest_affinity_level = smccc_get_arg2(vcpu);
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/* Determine target affinity mask */
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target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
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if (!target_affinity_mask)
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return PSCI_RET_INVALID_PARAMS;
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/* Ignore other bits of target affinity */
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target_affinity &= target_affinity_mask;
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/*
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* If one or more VCPU matching target affinity are running
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* then ON else OFF
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*/
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kvm_for_each_vcpu(i, tmp, kvm) {
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mpidr = kvm_vcpu_get_mpidr_aff(tmp);
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if ((mpidr & target_affinity_mask) == target_affinity) {
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matching_cpus++;
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if (!tmp->arch.power_off)
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return PSCI_0_2_AFFINITY_LEVEL_ON;
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}
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}
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if (!matching_cpus)
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return PSCI_RET_INVALID_PARAMS;
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return PSCI_0_2_AFFINITY_LEVEL_OFF;
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}
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static void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type)
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{
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int i;
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struct kvm_vcpu *tmp;
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/*
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* The KVM ABI specifies that a system event exit may call KVM_RUN
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* again and may perform shutdown/reboot at a later time that when the
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* actual request is made. Since we are implementing PSCI and a
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* caller of PSCI reboot and shutdown expects that the system shuts
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* down or reboots immediately, let's make sure that VCPUs are not run
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* after this call is handled and before the VCPUs have been
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* re-initialized.
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*/
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kvm_for_each_vcpu(i, tmp, vcpu->kvm)
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tmp->arch.power_off = true;
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kvm_make_all_cpus_request(vcpu->kvm, KVM_REQ_SLEEP);
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memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event));
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vcpu->run->system_event.type = type;
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vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
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}
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static void kvm_psci_system_off(struct kvm_vcpu *vcpu)
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{
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kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_SHUTDOWN);
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}
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static void kvm_psci_system_reset(struct kvm_vcpu *vcpu)
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{
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kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_RESET);
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}
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static void kvm_psci_narrow_to_32bit(struct kvm_vcpu *vcpu)
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{
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int i;
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/*
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* Zero the input registers' upper 32 bits. They will be fully
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* zeroed on exit, so we're fine changing them in place.
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*/
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for (i = 1; i < 4; i++)
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vcpu_set_reg(vcpu, i, lower_32_bits(vcpu_get_reg(vcpu, i)));
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}
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static unsigned long kvm_psci_check_allowed_function(struct kvm_vcpu *vcpu, u32 fn)
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{
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switch(fn) {
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case PSCI_0_2_FN64_CPU_SUSPEND:
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case PSCI_0_2_FN64_CPU_ON:
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case PSCI_0_2_FN64_AFFINITY_INFO:
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/* Disallow these functions for 32bit guests */
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if (vcpu_mode_is_32bit(vcpu))
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return PSCI_RET_NOT_SUPPORTED;
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break;
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}
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return 0;
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}
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static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
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{
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struct kvm *kvm = vcpu->kvm;
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u32 psci_fn = smccc_get_function(vcpu);
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unsigned long val;
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int ret = 1;
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val = kvm_psci_check_allowed_function(vcpu, psci_fn);
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if (val)
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goto out;
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switch (psci_fn) {
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case PSCI_0_2_FN_PSCI_VERSION:
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/*
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* Bits[31:16] = Major Version = 0
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* Bits[15:0] = Minor Version = 2
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*/
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val = KVM_ARM_PSCI_0_2;
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break;
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case PSCI_0_2_FN_CPU_SUSPEND:
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case PSCI_0_2_FN64_CPU_SUSPEND:
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val = kvm_psci_vcpu_suspend(vcpu);
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break;
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case PSCI_0_2_FN_CPU_OFF:
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kvm_psci_vcpu_off(vcpu);
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val = PSCI_RET_SUCCESS;
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break;
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case PSCI_0_2_FN_CPU_ON:
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kvm_psci_narrow_to_32bit(vcpu);
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fallthrough;
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case PSCI_0_2_FN64_CPU_ON:
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mutex_lock(&kvm->lock);
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val = kvm_psci_vcpu_on(vcpu);
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mutex_unlock(&kvm->lock);
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break;
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case PSCI_0_2_FN_AFFINITY_INFO:
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kvm_psci_narrow_to_32bit(vcpu);
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fallthrough;
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case PSCI_0_2_FN64_AFFINITY_INFO:
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val = kvm_psci_vcpu_affinity_info(vcpu);
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break;
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case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
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/*
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* Trusted OS is MP hence does not require migration
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* or
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* Trusted OS is not present
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*/
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val = PSCI_0_2_TOS_MP;
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break;
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case PSCI_0_2_FN_SYSTEM_OFF:
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kvm_psci_system_off(vcpu);
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/*
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* We should'nt be going back to guest VCPU after
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* receiving SYSTEM_OFF request.
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*
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* If user space accidently/deliberately resumes
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* guest VCPU after SYSTEM_OFF request then guest
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* VCPU should see internal failure from PSCI return
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* value. To achieve this, we preload r0 (or x0) with
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* PSCI return value INTERNAL_FAILURE.
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*/
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val = PSCI_RET_INTERNAL_FAILURE;
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ret = 0;
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break;
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case PSCI_0_2_FN_SYSTEM_RESET:
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kvm_psci_system_reset(vcpu);
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/*
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* Same reason as SYSTEM_OFF for preloading r0 (or x0)
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* with PSCI return value INTERNAL_FAILURE.
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*/
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val = PSCI_RET_INTERNAL_FAILURE;
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ret = 0;
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break;
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default:
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val = PSCI_RET_NOT_SUPPORTED;
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break;
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}
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out:
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smccc_set_retval(vcpu, val, 0, 0, 0);
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return ret;
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}
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static int kvm_psci_1_0_call(struct kvm_vcpu *vcpu)
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{
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u32 psci_fn = smccc_get_function(vcpu);
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u32 feature;
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unsigned long val;
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int ret = 1;
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switch(psci_fn) {
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case PSCI_0_2_FN_PSCI_VERSION:
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val = KVM_ARM_PSCI_1_0;
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break;
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case PSCI_1_0_FN_PSCI_FEATURES:
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feature = smccc_get_arg1(vcpu);
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val = kvm_psci_check_allowed_function(vcpu, feature);
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if (val)
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break;
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switch(feature) {
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case PSCI_0_2_FN_PSCI_VERSION:
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case PSCI_0_2_FN_CPU_SUSPEND:
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case PSCI_0_2_FN64_CPU_SUSPEND:
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case PSCI_0_2_FN_CPU_OFF:
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case PSCI_0_2_FN_CPU_ON:
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case PSCI_0_2_FN64_CPU_ON:
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case PSCI_0_2_FN_AFFINITY_INFO:
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case PSCI_0_2_FN64_AFFINITY_INFO:
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case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
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case PSCI_0_2_FN_SYSTEM_OFF:
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case PSCI_0_2_FN_SYSTEM_RESET:
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case PSCI_1_0_FN_PSCI_FEATURES:
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case ARM_SMCCC_VERSION_FUNC_ID:
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val = 0;
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break;
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default:
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val = PSCI_RET_NOT_SUPPORTED;
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break;
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}
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break;
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default:
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return kvm_psci_0_2_call(vcpu);
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}
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smccc_set_retval(vcpu, val, 0, 0, 0);
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return ret;
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}
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static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
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{
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struct kvm *kvm = vcpu->kvm;
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u32 psci_fn = smccc_get_function(vcpu);
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unsigned long val;
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switch (psci_fn) {
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case KVM_PSCI_FN_CPU_OFF:
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kvm_psci_vcpu_off(vcpu);
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val = PSCI_RET_SUCCESS;
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break;
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case KVM_PSCI_FN_CPU_ON:
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mutex_lock(&kvm->lock);
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val = kvm_psci_vcpu_on(vcpu);
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mutex_unlock(&kvm->lock);
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break;
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default:
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val = PSCI_RET_NOT_SUPPORTED;
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break;
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}
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smccc_set_retval(vcpu, val, 0, 0, 0);
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return 1;
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}
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/**
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* kvm_psci_call - handle PSCI call if r0 value is in range
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* @vcpu: Pointer to the VCPU struct
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*
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* Handle PSCI calls from guests through traps from HVC instructions.
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* The calling convention is similar to SMC calls to the secure world
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* where the function number is placed in r0.
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*
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* This function returns: > 0 (success), 0 (success but exit to user
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* space), and < 0 (errors)
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*
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* Errors:
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* -EINVAL: Unrecognized PSCI function
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*/
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int kvm_psci_call(struct kvm_vcpu *vcpu)
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{
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switch (kvm_psci_version(vcpu, vcpu->kvm)) {
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case KVM_ARM_PSCI_1_0:
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return kvm_psci_1_0_call(vcpu);
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case KVM_ARM_PSCI_0_2:
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return kvm_psci_0_2_call(vcpu);
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case KVM_ARM_PSCI_0_1:
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return kvm_psci_0_1_call(vcpu);
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default:
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return -EINVAL;
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};
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}
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int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu)
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{
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return 3; /* PSCI version and two workaround registers */
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}
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int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
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{
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if (put_user(KVM_REG_ARM_PSCI_VERSION, uindices++))
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return -EFAULT;
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if (put_user(KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1, uindices++))
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return -EFAULT;
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if (put_user(KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2, uindices++))
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return -EFAULT;
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return 0;
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}
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#define KVM_REG_FEATURE_LEVEL_WIDTH 4
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#define KVM_REG_FEATURE_LEVEL_MASK (BIT(KVM_REG_FEATURE_LEVEL_WIDTH) - 1)
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/*
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* Convert the workaround level into an easy-to-compare number, where higher
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* values mean better protection.
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*/
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static int get_kernel_wa_level(u64 regid)
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{
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switch (regid) {
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
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switch (kvm_arm_harden_branch_predictor()) {
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case KVM_BP_HARDEN_UNKNOWN:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL;
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case KVM_BP_HARDEN_WA_NEEDED:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_AVAIL;
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case KVM_BP_HARDEN_NOT_REQUIRED:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_REQUIRED;
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}
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL;
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
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switch (kvm_arm_have_ssbd()) {
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case KVM_SSBD_FORCE_DISABLE:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
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case KVM_SSBD_KERNEL:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL;
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case KVM_SSBD_FORCE_ENABLE:
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case KVM_SSBD_MITIGATED:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED;
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case KVM_SSBD_UNKNOWN:
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default:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_UNKNOWN;
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}
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}
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return -EINVAL;
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}
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int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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void __user *uaddr = (void __user *)(long)reg->addr;
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u64 val;
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switch (reg->id) {
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case KVM_REG_ARM_PSCI_VERSION:
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val = kvm_psci_version(vcpu, vcpu->kvm);
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break;
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
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val = get_kernel_wa_level(reg->id) & KVM_REG_FEATURE_LEVEL_MASK;
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break;
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
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val = get_kernel_wa_level(reg->id) & KVM_REG_FEATURE_LEVEL_MASK;
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if (val == KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL &&
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kvm_arm_get_vcpu_workaround_2_flag(vcpu))
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val |= KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED;
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break;
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default:
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return -ENOENT;
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}
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if (copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)))
|
|
return -EFAULT;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
|
|
{
|
|
void __user *uaddr = (void __user *)(long)reg->addr;
|
|
u64 val;
|
|
int wa_level;
|
|
|
|
if (copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id)))
|
|
return -EFAULT;
|
|
|
|
switch (reg->id) {
|
|
case KVM_REG_ARM_PSCI_VERSION:
|
|
{
|
|
bool wants_02;
|
|
|
|
wants_02 = test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features);
|
|
|
|
switch (val) {
|
|
case KVM_ARM_PSCI_0_1:
|
|
if (wants_02)
|
|
return -EINVAL;
|
|
vcpu->kvm->arch.psci_version = val;
|
|
return 0;
|
|
case KVM_ARM_PSCI_0_2:
|
|
case KVM_ARM_PSCI_1_0:
|
|
if (!wants_02)
|
|
return -EINVAL;
|
|
vcpu->kvm->arch.psci_version = val;
|
|
return 0;
|
|
}
|
|
break;
|
|
}
|
|
|
|
case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
|
|
if (val & ~KVM_REG_FEATURE_LEVEL_MASK)
|
|
return -EINVAL;
|
|
|
|
if (get_kernel_wa_level(reg->id) < val)
|
|
return -EINVAL;
|
|
|
|
return 0;
|
|
|
|
case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
|
|
if (val & ~(KVM_REG_FEATURE_LEVEL_MASK |
|
|
KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED))
|
|
return -EINVAL;
|
|
|
|
wa_level = val & KVM_REG_FEATURE_LEVEL_MASK;
|
|
|
|
if (get_kernel_wa_level(reg->id) < wa_level)
|
|
return -EINVAL;
|
|
|
|
/* The enabled bit must not be set unless the level is AVAIL. */
|
|
if (wa_level != KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL &&
|
|
wa_level != val)
|
|
return -EINVAL;
|
|
|
|
/* Are we finished or do we need to check the enable bit ? */
|
|
if (kvm_arm_have_ssbd() != KVM_SSBD_KERNEL)
|
|
return 0;
|
|
|
|
/*
|
|
* If this kernel supports the workaround to be switched on
|
|
* or off, make sure it matches the requested setting.
|
|
*/
|
|
switch (wa_level) {
|
|
case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL:
|
|
kvm_arm_set_vcpu_workaround_2_flag(vcpu,
|
|
val & KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED);
|
|
break;
|
|
case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED:
|
|
kvm_arm_set_vcpu_workaround_2_flag(vcpu, true);
|
|
break;
|
|
}
|
|
|
|
return 0;
|
|
default:
|
|
return -ENOENT;
|
|
}
|
|
|
|
return -EINVAL;
|
|
}
|