mirror of https://gitee.com/openkylin/linux.git
100 lines
2.3 KiB
C
100 lines
2.3 KiB
C
/*
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* Copyright 2011, Netlogic Microsystems.
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* Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/resource.h>
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#include <linux/serial_8250.h>
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#include <linux/serial_reg.h>
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#include <asm/netlogic/haldefs.h>
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#include <asm/netlogic/xlr/iomap.h>
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#include <asm/netlogic/xlr/pic.h>
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#include <asm/netlogic/xlr/xlr.h>
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unsigned int nlm_xlr_uart_in(struct uart_port *p, int offset)
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{
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uint64_t uartbase;
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unsigned int value;
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/* sign extend to 64 bits, if needed */
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uartbase = (uint64_t)(long)p->membase;
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value = nlm_read_reg(uartbase, offset);
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/* See XLR/XLS errata */
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if (offset == UART_MSR)
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value ^= 0xF0;
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else if (offset == UART_MCR)
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value ^= 0x3;
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return value;
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}
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void nlm_xlr_uart_out(struct uart_port *p, int offset, int value)
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{
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uint64_t uartbase;
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/* sign extend to 64 bits, if needed */
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uartbase = (uint64_t)(long)p->membase;
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/* See XLR/XLS errata */
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if (offset == UART_MSR)
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value ^= 0xF0;
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else if (offset == UART_MCR)
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value ^= 0x3;
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nlm_write_reg(uartbase, offset, value);
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}
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#define PORT(_irq) \
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{ \
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.irq = _irq, \
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.regshift = 2, \
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.iotype = UPIO_MEM32, \
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.flags = (UPF_SKIP_TEST | \
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UPF_FIXED_TYPE | UPF_BOOT_AUTOCONF),\
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.uartclk = PIC_CLKS_PER_SEC, \
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.type = PORT_16550A, \
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.serial_in = nlm_xlr_uart_in, \
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.serial_out = nlm_xlr_uart_out, \
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}
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static struct plat_serial8250_port xlr_uart_data[] = {
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PORT(PIC_UART_0_IRQ),
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PORT(PIC_UART_1_IRQ),
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{},
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};
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static struct platform_device uart_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = xlr_uart_data,
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},
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};
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static int __init nlm_uart_init(void)
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{
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unsigned long uartbase;
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uartbase = (unsigned long)nlm_mmio_base(NETLOGIC_IO_UART_0_OFFSET);
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xlr_uart_data[0].membase = (void __iomem *)uartbase;
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xlr_uart_data[0].mapbase = CPHYSADDR(uartbase);
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uartbase = (unsigned long)nlm_mmio_base(NETLOGIC_IO_UART_1_OFFSET);
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xlr_uart_data[1].membase = (void __iomem *)uartbase;
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xlr_uart_data[1].mapbase = CPHYSADDR(uartbase);
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return platform_device_register(&uart_device);
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}
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arch_initcall(nlm_uart_init);
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