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Linus Torvalds 568d850e3c RISC-V additional updates for v5.4-rc1 
Some additional RISC-V updates for v5.4-rc1.  This includes one
 significant fix:
 
 - Prevent interrupts from being unconditionally re-enabled during
   exception handling if they were disabled in the context in which the
   exception occurred
 
 Also a few other fixes:
 
 - Fix a build error when sparse memory support is manually enabled
 
 - Prevent CPUs beyond CONFIG_NR_CPUS from being enabled in early boot
 
 And a few minor improvements:
 
 - DT improvements: in the FU540 SoC DT files, improve U-Boot
   compatibility by adding an "ethernet0" alias, drop an unnecessary
   property from the DT files, and add support for the PWM device
 
 - KVM preparation: add a KVM-related macro for future RISC-V KVM
   support, and export some symbols required to build KVM support as
   modules
 
 - defconfig additions: build more drivers by default for QEMU
   configurations
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Merge tag 'riscv/for-v5.4-rc1-b' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull more RISC-V updates from Paul Walmsley:
 "Some additional RISC-V updates.

  This includes one significant fix:

   - Prevent interrupts from being unconditionally re-enabled during
     exception handling if they were disabled in the context in which
     the exception occurred

  Also a few other fixes:

   - Fix a build error when sparse memory support is manually enabled

   - Prevent CPUs beyond CONFIG_NR_CPUS from being enabled in early boot

  And a few minor improvements:

   - DT improvements: in the FU540 SoC DT files, improve U-Boot
     compatibility by adding an "ethernet0" alias, drop an unnecessary
     property from the DT files, and add support for the PWM device

   - KVM preparation: add a KVM-related macro for future RISC-V KVM
     support, and export some symbols required to build KVM support as
     modules

   - defconfig additions: build more drivers by default for QEMU
     configurations"

* tag 'riscv/for-v5.4-rc1-b' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: Avoid interrupts being erroneously enabled in handle_exception()
  riscv: dts: sifive: Drop "clock-frequency" property of cpu nodes
  riscv: dts: sifive: Add ethernet0 to the aliases node
  RISC-V: Export kernel symbols for kvm
  KVM: RISC-V: Add KVM_REG_RISCV for ONE_REG interface
  arch/riscv: disable excess harts before picking main boot hart
  RISC-V: Enable VIRTIO drivers in RV64 and RV32 defconfig
  RISC-V: Fix building error when CONFIG_SPARSEMEM_MANUAL=y
  riscv: dts: Add DT support for SiFive FU540 PWM driver
 		2019-09-27 13:08:36 -07:00
..
Kbuild riscv: include generic support for MSI irqdomains 2019-07-22 13:06:07 -07:00
asm-offsets.h
…
asm-prototypes.h RISC-V: include linux/ftrace.h in asm-prototypes.h 2018-09-24 13:12:27 -07:00
asm.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
atomic.h locking/atomic, riscv: Use s64 for atomic64 2019-06-03 12:32:56 +02:00
barrier.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234 2019-06-19 17:09:07 +02:00
bitops.h RISC-V patches for v5.2-rc6 2019-06-17 10:34:03 -07:00
bug.h Merge branch 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiederm/user-namespace 2019-07-08 21:48:15 -07:00
cache.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
cacheflush.h riscv: fix build break after macro-to-function conversion in generic cacheflush.h 2019-07-18 08:16:56 -07:00
cmpxchg.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
csr.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
current.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
delay.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
elf.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
fence.h riscv/spinlock: Strengthen implementations with fences 2018-04-02 19:59:43 -07:00
fixmap.h RISC-V: Fix FIXMAP area corruption on RV32 systems 2019-08-28 15:30:12 -07:00
ftrace.h riscv/ftrace: Add DYNAMIC_FTRACE_WITH_REGS support 2018-04-02 19:59:13 -07:00
futex.h riscv: remove CONFIG_RISCV_ISA_A 2019-04-25 14:51:10 -07:00
hugetlb.h riscv: Introduce huge page support for 32/64bit kernel 2019-07-03 15:23:38 -07:00
hwcap.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234 2019-06-19 17:09:07 +02:00
image.h riscv: modify the Image header to improve compatibility with the ARM64 header 2019-09-13 19:03:52 -07:00
io.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
irq.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
irqflags.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
kprobes.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174 2019-05-30 11:26:41 -07:00
linkage.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
mmiowb.h riscv/mmiowb: Hook up mmwiob() implementation to asm-generic code 2019-04-08 12:00:40 +01:00
mmu.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
mmu_context.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
module.h RISC-V: Support MODULE_SECTIONS mechanism on RV32 2019-01-07 08:19:20 -08:00
page.h RISC-V: Implement sparsemem 2019-08-30 11:10:37 -07:00
pci.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
perf_event.h RISC-V: Fix !CONFIG_SMP compilation error 2018-08-13 08:31:32 -07:00
pgalloc.h mm: treewide: clarify pgtable_page_{ctor,dtor}() naming 2019-09-26 10:10:44 -07:00
pgtable-32.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
pgtable-64.h RISC-V: Setup initial page tables in two stages 2019-07-09 09:08:04 -07:00
pgtable-bits.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
pgtable.h RISC-V additional updates for v5.4-rc1 2019-09-27 13:08:36 -07:00
processor.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
ptrace.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
sbi.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
sifive_l2_cache.h RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs 2019-05-16 20:42:13 -07:00
smp.h riscv: cleanup riscv_cpuid_to_hartid_mask 2019-09-05 01:51:57 -07:00
sparsemem.h RISC-V: Implement sparsemem 2019-08-30 11:10:37 -07:00
spinlock.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
spinlock_types.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
string.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
switch_to.h riscv: Make __fstate_clean() work correctly. 2019-08-14 13:20:46 -07:00
syscall.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
thread_info.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
timex.h riscv: don't use the rdtime(h) pseudo-instructions 2019-09-05 01:52:46 -07:00
tlb.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
tlbflush.h riscv: move the TLB flush logic out of line 2019-09-05 01:54:51 -07:00
uaccess.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
unistd.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00
vdso.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234 2019-06-19 17:09:07 +02:00
word-at-a-time.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 2019-06-05 17:36:37 +02:00