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71 lines
4.4 KiB
Plaintext
71 lines
4.4 KiB
Plaintext
An Intel MIC X100 device is a PCIe form factor add-in coprocessor
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card based on the Intel Many Integrated Core (MIC) architecture
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that runs a Linux OS. It is a PCIe endpoint in a platform and therefore
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implements the three required standard address spaces i.e. configuration,
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memory and I/O. The host OS loads a device driver as is typical for
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PCIe devices. The card itself runs a bootstrap after reset that
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transfers control to the card OS downloaded from the host driver. The
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host driver supports OSPM suspend and resume operations. It shuts down
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the card during suspend and reboots the card OS during resume.
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The card OS as shipped by Intel is a Linux kernel with modifications
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for the X100 devices.
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Since it is a PCIe card, it does not have the ability to host hardware
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devices for networking, storage and console. We provide these devices
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on X100 coprocessors thus enabling a self-bootable equivalent environment
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for applications. A key benefit of our solution is that it leverages
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the standard virtio framework for network, disk and console devices,
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though in our case the virtio framework is used across a PCIe bus.
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MIC PCIe card has a dma controller with 8 channels. These channels are
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shared between the host s/w and the card s/w. 0 to 3 are used by host
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and 4 to 7 by card. As the dma device doesn't show up as PCIe device,
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a virtual bus called mic bus is created and virtual dma devices are
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created on it by the host/card drivers. On host the channels are private
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and used only by the host driver to transfer data for the virtio devices.
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The Symmetric Communication Interface (SCIF (pronounced as skiff)) is a
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low level communications API across PCIe currently implemented for MIC.
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More details are available at scif_overview.txt.
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Here is a block diagram of the various components described above. The
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virtio backends are situated on the host rather than the card given better
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single threaded performance for the host compared to MIC, the ability of
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the host to initiate DMA's to/from the card using the MIC DMA engine and
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the fact that the virtio block storage backend can only be on the host.
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+----------+ | +----------+
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| Card OS | | | Host OS |
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+----------+ | +----------+
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+-------+ +--------+ +------+ | +---------+ +--------+ +--------+
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| Virtio| |Virtio | |Virtio| | |Virtio | |Virtio | |Virtio |
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| Net | |Console | |Block | | |Net | |Console | |Block |
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| Driver| |Driver | |Driver| | |backend | |backend | |backend |
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+-------+ +--------+ +------+ | +---------+ +--------+ +--------+
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| | | | | | |
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| | | |User | | |
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| | | |------|------------|---------|-------
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+-------------------+ |Kernel +--------------------------+
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| | | Virtio over PCIe IOCTLs |
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| | +--------------------------+
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+-----------+ | | | +-----------+
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| MIC DMA | | +----------+ | +-----------+ | | MIC DMA |
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| Driver | | | SCIF | | | SCIF | | | Driver |
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+-----------+ | +----------+ | +-----------+ | +-----------+
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| | | | | | |
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+---------------+ | +-----+-----+ | +-----+-----+ | +---------------+
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|MIC virtual Bus| | |SCIF HW Bus| | |SCIF HW BUS| | |MIC virtual Bus|
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+---------------+ | +-----------+ | +-----+-----+ | +---------------+
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| | | | | | |
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| +--------------+ | | | +---------------+ |
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| |Intel MIC | | | | |Intel MIC | |
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+---|Card Driver +----+ | | |Host Driver | |
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+--------------+ | +----+---------------+-----+
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+-------------------------------------------------------------+
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| PCIe Bus |
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+-------------------------------------------------------------+
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