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linux/drivers/net/ethernet/cadence
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Alexandre Belloni ac2fcfa9fd net: macb: Properly handle phylink on at91rm9200 
at91ether_init was handling the phy mode and speed but since the switch to
phylink, the NCFGR register got overwritten by macb_mac_config(). The issue
is that the RM9200_RMII bit and the MACB_CLK_DIV32 field are cleared
but never restored as they conflict with the PAE, GBE and PCSSEL bits.

Add new capability to differentiate between EMAC and the other versions of
the IP and use it to set and avoid clearing the relevant bits.

Also, this fixes a NULL pointer dereference in macb_mac_link_up as the EMAC
doesn't use any rings/bufffers/queues.

Fixes: 7897b071ac ("net: macb: convert to phylink")
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
 		2020-02-20 15:00:31 -08:00
..
Kconfig net: macb: convert to phylink 2019-11-13 11:45:42 -08:00
Makefile License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
macb.h net: macb: Properly handle phylink on at91rm9200 2020-02-20 15:00:31 -08:00
macb_main.c net: macb: Properly handle phylink on at91rm9200 2020-02-20 15:00:31 -08:00
macb_pci.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 341 2019-06-05 17:37:07 +02:00
macb_ptp.c net: macb: Fix SUBNS increment and increase resolution 2019-06-29 11:09:18 -07:00