linux/arch/riscv/include/asm
Stefan O'Rear e3613bb8af
riscv: Add pte bit to distinguish swap from invalid
Previously, invalid PTEs and swap PTEs had the same binary
representation, causing errors when attempting to unmap PROT_NONE
mappings, including implicit unmap on exit.

Typical error:

swap_info_get: Bad swap file entry 40000000007a9879
BUG: Bad page map in process a.out  pte:3d4c3cc0 pmd:3e521401

Cc: stable@vger.kernel.org
Signed-off-by: Stefan O'Rear <sorear2@gmail.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-02-11 15:24:45 -08:00
..
Kbuild riscv: remove redundant kernel-space generic-y 2019-01-06 09:46:51 +09:00
asm-offsets.h
asm-prototypes.h RISC-V: include linux/ftrace.h in asm-prototypes.h 2018-09-24 13:12:27 -07:00
asm.h RISC-V: use RISCV_{INT,SHORT} instead of {INT,SHORT} for asm macros 2017-11-30 10:01:10 -08:00
atomic.h riscv, atomic: Add #define's for the atomic_{cmp,}xchg_*() variants 2018-12-21 08:10:30 -08:00
barrier.h riscv/barrier: Define __smp_{store_release,load_acquire} 2018-04-02 19:59:43 -07:00
bitops.h RISC-V: __test_and_op_bit_ord should be strongly ordered 2017-11-28 14:04:05 -08:00
bug.h RISC-V: use RISCV_{INT,SHORT} instead of {INT,SHORT} for asm macros 2017-11-30 10:01:10 -08:00
cache.h
cacheflush.h riscv: use NULL instead of a plain 0 2018-06-07 08:01:50 -07:00
cmpxchg.h riscv/atomic: Strengthen implementations with fences 2018-04-02 19:59:44 -07:00
csr.h RISC-V: add a definition for the SIE SEIE bit 2018-08-13 08:31:31 -07:00
current.h
delay.h
elf.h Move EM_RISCV into elf-em.h 2018-10-31 12:13:47 -07:00
fence.h riscv/spinlock: Strengthen implementations with fences 2018-04-02 19:59:43 -07:00
ftrace.h riscv/ftrace: Add DYNAMIC_FTRACE_WITH_REGS support 2018-04-02 19:59:13 -07:00
futex.h Remove 'type' argument from access_ok() function 2019-01-03 18:57:57 -08:00
hwcap.h
io.h riscv: remove CONFIG_MMU ifdefs 2018-01-07 15:14:39 -08:00
irq.h RISC-V: remove INTERRUPT_CAUSE_* defines from asm/irq.h 2018-08-13 08:31:31 -07:00
irqflags.h riscv: rename SR_* constants to match the spec 2018-01-07 15:14:39 -08:00
kprobes.h
linkage.h
mmu.h RISC-V: Flush I$ when making a dirty page executable 2017-11-30 12:58:25 -08:00
mmu_context.h riscv: inline set_pgdir into its only caller 2018-01-30 19:16:17 -08:00
module.h RISC-V: Support MODULE_SECTIONS mechanism on RV32 2019-01-07 08:19:20 -08:00
page.h RISC-V: asm/page.h: fix spelling mistake "CONFIG_64BITS" -> "CONFIG_64BIT" 2019-01-23 12:56:20 -08:00
pci.h PCI: remove PCI_DMA_BUS_IS_PHYS 2018-05-07 07:15:41 +02:00
perf_event.h RISC-V: Fix !CONFIG_SMP compilation error 2018-08-13 08:31:32 -07:00
pgalloc.h mm: treewide: remove unused address argument from pte_alloc functions 2019-01-04 13:13:47 -08:00
pgtable-32.h
pgtable-64.h
pgtable-bits.h riscv: Add pte bit to distinguish swap from invalid 2019-02-11 15:24:45 -08:00
pgtable.h riscv: Add pte bit to distinguish swap from invalid 2019-02-11 15:24:45 -08:00
processor.h riscv: Adjust mmap base address at a third of task size 2019-01-25 10:50:53 -08:00
ptrace.h riscv: add audit support 2019-01-07 08:22:39 -08:00
sbi.h
smp.h RISC-V: Show IPI stats 2018-10-22 17:03:37 -07:00
spinlock.h riscv/spinlock: Strengthen implementations with fences 2018-04-02 19:59:43 -07:00
spinlock_types.h
string.h
switch_to.h Auto-detect whether a FPU exists 2018-10-22 17:02:23 -07:00
syscall.h riscv: add audit support 2019-01-07 08:22:39 -08:00
thread_info.h riscv: add audit support 2019-01-07 08:22:39 -08:00
timex.h RISC-V: Use define for get_cycles like other architectures 2017-11-30 10:12:21 -08:00
tlb.h riscv: tlb: Provide definition of tlb_flush() before including tlb.h 2018-08-28 12:58:35 -07:00
tlbflush.h RISC-V: Use Linux logical CPU number instead of hartid 2018-10-22 17:03:37 -07:00
uaccess.h Remove 'type' argument from access_ok() function 2019-01-03 18:57:57 -08:00
unistd.h riscv: define NR_syscalls in unistd.h 2019-01-07 08:22:41 -08:00
vdso.h RISC-V: Define sys_riscv_flush_icache when SMP=n 2018-08-20 10:55:24 -07:00
word-at-a-time.h