Kirill A. Shutemov 06c830a483 x86/power: Add 5-level paging support ... set_up_temporary_text_mapping() and relocate_restore_code() require adjustments to handle additional page table level. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Michal Hocko <mhocko@suse.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-arch@vger.kernel.org Cc: linux-mm@kvack.org Link: http://lkml.kernel.org/r/20170313143309.16020-7-kirill.shutemov@linux.intel.com [ Minor readability edits. ] Signed-off-by: Ingo Molnar <mingo@kernel.org>		2017-03-14 08:45:09 +01:00
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Makefile	x86: Fix resume from suspend when CONFIG_CC_STACKPROTECTOR	2009-07-08 13:20:13 +02:00
cpu.c	x86/tsc: Validate TSC_ADJUST after resume	2016-12-15 11:44:29 +01:00
hibernate_32.c	x86/mm: Convert trivial cases of page table walk to 5-level paging	2017-03-14 08:45:08 +01:00
hibernate_64.c	x86/power: Add 5-level paging support	2017-03-14 08:45:09 +01:00
hibernate_asm_32.S	x86, gdt, hibernate: Store/load GDT for hibernate path.	2013-05-02 11:27:35 -07:00
hibernate_asm_64.S	x86/power/64: Do not refer to __PAGE_OFFSET from assembly code	2016-08-03 01:35:38 +02:00