mirror of https://gitee.com/openkylin/linux.git
555 lines
15 KiB
C
555 lines
15 KiB
C
/*
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* CAAM control-plane driver backend
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* Controller-level driver, kernel property detection, initialization
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*
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* Copyright 2008-2012 Freescale Semiconductor, Inc.
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*/
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#include "compat.h"
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#include "regs.h"
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#include "intern.h"
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#include "jr.h"
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#include "desc_constr.h"
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#include "error.h"
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#include "ctrl.h"
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/*
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* Descriptor to instantiate RNG State Handle 0 in normal mode and
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* load the JDKEK, TDKEK and TDSK registers
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*/
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static void build_instantiation_desc(u32 *desc)
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{
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u32 *jump_cmd;
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init_job_desc(desc, 0);
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/* INIT RNG in non-test mode */
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append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
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OP_ALG_AS_INIT);
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/* wait for done */
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jump_cmd = append_jump(desc, JUMP_CLASS_CLASS1);
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set_jump_tgt_here(desc, jump_cmd);
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/*
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* load 1 to clear written reg:
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* resets the done interrupt and returns the RNG to idle.
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*/
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append_load_imm_u32(desc, 1, LDST_SRCDST_WORD_CLRW);
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/* generate secure keys (non-test) */
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append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
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OP_ALG_AAI_RNG4_SK);
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append_jump(desc, JUMP_CLASS_CLASS1 | JUMP_TYPE_HALT);
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}
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/* Descriptor for deinstantiation of State Handle 0 of the RNG block. */
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static void build_deinstantiation_desc(u32 *desc)
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{
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init_job_desc(desc, 0);
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/* Uninstantiate State Handle 0 */
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append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
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OP_ALG_AS_INITFINAL);
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append_jump(desc, JUMP_CLASS_CLASS1 | JUMP_TYPE_HALT);
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}
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/*
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* run_descriptor_deco0 - runs a descriptor on DECO0, under direct control of
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* the software (no JR/QI used).
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* @ctrldev - pointer to device
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* Return: - 0 if no error occurred
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* - -ENODEV if the DECO couldn't be acquired
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* - -EAGAIN if an error occurred while executing the descriptor
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*/
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static inline int run_descriptor_deco0(struct device *ctrldev, u32 *desc)
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{
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struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctrldev);
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struct caam_full __iomem *topregs;
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unsigned int timeout = 100000;
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u32 deco_dbg_reg, flags;
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int i;
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/* Set the bit to request direct access to DECO0 */
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topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
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setbits32(&topregs->ctrl.deco_rq, DECORR_RQD0ENABLE);
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while (!(rd_reg32(&topregs->ctrl.deco_rq) & DECORR_DEN0) &&
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--timeout)
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cpu_relax();
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if (!timeout) {
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dev_err(ctrldev, "failed to acquire DECO 0\n");
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clrbits32(&topregs->ctrl.deco_rq, DECORR_RQD0ENABLE);
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return -ENODEV;
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}
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for (i = 0; i < desc_len(desc); i++)
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wr_reg32(&topregs->deco.descbuf[i], *(desc + i));
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flags = DECO_JQCR_WHL;
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/*
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* If the descriptor length is longer than 4 words, then the
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* FOUR bit in JRCTRL register must be set.
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*/
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if (desc_len(desc) >= 4)
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flags |= DECO_JQCR_FOUR;
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/* Instruct the DECO to execute it */
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wr_reg32(&topregs->deco.jr_ctl_hi, flags);
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timeout = 10000000;
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do {
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deco_dbg_reg = rd_reg32(&topregs->deco.desc_dbg);
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/*
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* If an error occured in the descriptor, then
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* the DECO status field will be set to 0x0D
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*/
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if ((deco_dbg_reg & DESC_DBG_DECO_STAT_MASK) ==
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DESC_DBG_DECO_STAT_HOST_ERR)
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break;
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cpu_relax();
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} while ((deco_dbg_reg & DESC_DBG_DECO_STAT_VALID) && --timeout);
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/* Mark the DECO as free */
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clrbits32(&topregs->ctrl.deco_rq, DECORR_RQD0ENABLE);
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if (!timeout)
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return -EAGAIN;
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return 0;
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}
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/*
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* instantiate_rng - builds and executes a descriptor on DECO0,
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* which initializes the RNG block.
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* @ctrldev - pointer to device
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* Return: - 0 if no error occurred
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* - -ENOMEM if there isn't enough memory to allocate the descriptor
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* - -ENODEV if DECO0 couldn't be acquired
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* - -EAGAIN if an error occurred when executing the descriptor
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* f.i. there was a RNG hardware error due to not "good enough"
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* entropy being aquired.
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*/
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static int instantiate_rng(struct device *ctrldev)
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{
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u32 *desc;
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int ret = 0;
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desc = kmalloc(CAAM_CMD_SZ * 7, GFP_KERNEL);
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if (!desc)
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return -ENOMEM;
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/* Create the descriptor for instantiating RNG State Handle 0 */
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build_instantiation_desc(desc);
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/* Try to run it through DECO0 */
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ret = run_descriptor_deco0(ctrldev, desc);
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kfree(desc);
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return ret;
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}
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/*
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* deinstantiate_rng - builds and executes a descriptor on DECO0,
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* which deinitializes the RNG block.
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* @ctrldev - pointer to device
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*
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* Return: - 0 if no error occurred
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* - -ENOMEM if there isn't enough memory to allocate the descriptor
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* - -ENODEV if DECO0 couldn't be acquired
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* - -EAGAIN if an error occurred when executing the descriptor
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*/
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static int deinstantiate_rng(struct device *ctrldev)
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{
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u32 *desc;
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int i, ret = 0;
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desc = kmalloc(CAAM_CMD_SZ * 3, GFP_KERNEL);
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if (!desc)
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return -ENOMEM;
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/* Create the descriptor for deinstantating RNG State Handle 0 */
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build_deinstantiation_desc(desc);
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/* Try to run it through DECO0 */
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ret = run_descriptor_deco0(ctrldev, desc);
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if (ret)
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dev_err(ctrldev, "failed to deinstantiate RNG\n");
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kfree(desc);
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return ret;
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}
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static int caam_remove(struct platform_device *pdev)
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{
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struct device *ctrldev;
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struct caam_drv_private *ctrlpriv;
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struct caam_drv_private_jr *jrpriv;
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struct caam_full __iomem *topregs;
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int ring, ret = 0;
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ctrldev = &pdev->dev;
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ctrlpriv = dev_get_drvdata(ctrldev);
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topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
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/* shut down JobRs */
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for (ring = 0; ring < ctrlpriv->total_jobrs; ring++) {
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ret |= caam_jr_shutdown(ctrlpriv->jrdev[ring]);
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jrpriv = dev_get_drvdata(ctrlpriv->jrdev[ring]);
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irq_dispose_mapping(jrpriv->irq);
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}
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/* De-initialize RNG if it was initialized by this driver. */
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if (ctrlpriv->rng4_init)
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deinstantiate_rng(ctrldev);
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/* Shut down debug views */
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#ifdef CONFIG_DEBUG_FS
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debugfs_remove_recursive(ctrlpriv->dfs_root);
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#endif
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/* Unmap controller region */
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iounmap(&topregs->ctrl);
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kfree(ctrlpriv->jrdev);
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kfree(ctrlpriv);
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return ret;
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}
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/*
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* kick_trng - sets the various parameters for enabling the initialization
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* of the RNG4 block in CAAM
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* @pdev - pointer to the platform device
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* @ent_delay - Defines the length (in system clocks) of each entropy sample.
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*/
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static void kick_trng(struct platform_device *pdev, int ent_delay)
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{
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struct device *ctrldev = &pdev->dev;
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struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctrldev);
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struct caam_full __iomem *topregs;
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struct rng4tst __iomem *r4tst;
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u32 val;
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topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
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r4tst = &topregs->ctrl.r4tst[0];
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/* put RNG4 into program mode */
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setbits32(&r4tst->rtmctl, RTMCTL_PRGM);
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/*
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* Performance-wise, it does not make sense to
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* set the delay to a value that is lower
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* than the last one that worked (i.e. the state handles
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* were instantiated properly. Thus, instead of wasting
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* time trying to set the values controlling the sample
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* frequency, the function simply returns.
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*/
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val = (rd_reg32(&r4tst->rtsdctl) & RTSDCTL_ENT_DLY_MASK)
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>> RTSDCTL_ENT_DLY_SHIFT;
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if (ent_delay <= val) {
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/* put RNG4 into run mode */
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clrbits32(&r4tst->rtmctl, RTMCTL_PRGM);
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return;
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}
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val = rd_reg32(&r4tst->rtsdctl);
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val = (val & ~RTSDCTL_ENT_DLY_MASK) |
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(ent_delay << RTSDCTL_ENT_DLY_SHIFT);
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wr_reg32(&r4tst->rtsdctl, val);
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/* min. freq. count, equal to 1/4 of the entropy sample length */
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wr_reg32(&r4tst->rtfrqmin, ent_delay >> 2);
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/* max. freq. count, equal to 8 times the entropy sample length */
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wr_reg32(&r4tst->rtfrqmax, ent_delay << 3);
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/* put RNG4 into run mode */
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clrbits32(&r4tst->rtmctl, RTMCTL_PRGM);
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}
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/**
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* caam_get_era() - Return the ERA of the SEC on SoC, based
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* on the SEC_VID register.
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* Returns the ERA number (1..4) or -ENOTSUPP if the ERA is unknown.
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* @caam_id - the value of the SEC_VID register
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**/
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int caam_get_era(u64 caam_id)
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{
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struct sec_vid *sec_vid = (struct sec_vid *)&caam_id;
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static const struct {
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u16 ip_id;
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u8 maj_rev;
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u8 era;
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} caam_eras[] = {
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{0x0A10, 1, 1},
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{0x0A10, 2, 2},
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{0x0A12, 1, 3},
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{0x0A14, 1, 3},
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{0x0A14, 2, 4},
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{0x0A16, 1, 4},
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{0x0A11, 1, 4}
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};
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int i;
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for (i = 0; i < ARRAY_SIZE(caam_eras); i++)
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if (caam_eras[i].ip_id == sec_vid->ip_id &&
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caam_eras[i].maj_rev == sec_vid->maj_rev)
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return caam_eras[i].era;
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return -ENOTSUPP;
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}
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EXPORT_SYMBOL(caam_get_era);
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/* Probe routine for CAAM top (controller) level */
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static int caam_probe(struct platform_device *pdev)
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{
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int ret, ring, rspec, ent_delay = RTSDCTL_ENT_DLY_MIN;
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u64 caam_id;
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struct device *dev;
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struct device_node *nprop, *np;
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struct caam_ctrl __iomem *ctrl;
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struct caam_full __iomem *topregs;
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struct caam_drv_private *ctrlpriv;
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#ifdef CONFIG_DEBUG_FS
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struct caam_perfmon *perfmon;
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#endif
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u64 cha_vid;
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ctrlpriv = kzalloc(sizeof(struct caam_drv_private), GFP_KERNEL);
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if (!ctrlpriv)
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return -ENOMEM;
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dev = &pdev->dev;
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dev_set_drvdata(dev, ctrlpriv);
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ctrlpriv->pdev = pdev;
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nprop = pdev->dev.of_node;
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/* Get configuration properties from device tree */
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/* First, get register page */
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ctrl = of_iomap(nprop, 0);
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if (ctrl == NULL) {
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dev_err(dev, "caam: of_iomap() failed\n");
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return -ENOMEM;
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}
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ctrlpriv->ctrl = (struct caam_ctrl __force *)ctrl;
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/* topregs used to derive pointers to CAAM sub-blocks only */
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topregs = (struct caam_full __iomem *)ctrl;
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/* Get the IRQ of the controller (for security violations only) */
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ctrlpriv->secvio_irq = of_irq_to_resource(nprop, 0, NULL);
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/*
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* Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel,
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* long pointers in master configuration register
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*/
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setbits32(&topregs->ctrl.mcr, MCFGR_WDENABLE |
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(sizeof(dma_addr_t) == sizeof(u64) ? MCFGR_LONG_PTR : 0));
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if (sizeof(dma_addr_t) == sizeof(u64))
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if (of_device_is_compatible(nprop, "fsl,sec-v5.0"))
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dma_set_mask(dev, DMA_BIT_MASK(40));
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else
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dma_set_mask(dev, DMA_BIT_MASK(36));
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else
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dma_set_mask(dev, DMA_BIT_MASK(32));
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/*
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* Detect and enable JobRs
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* First, find out how many ring spec'ed, allocate references
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* for all, then go probe each one.
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*/
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rspec = 0;
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for_each_compatible_node(np, NULL, "fsl,sec-v4.0-job-ring")
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rspec++;
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if (!rspec) {
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/* for backward compatible with device trees */
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for_each_compatible_node(np, NULL, "fsl,sec4.0-job-ring")
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rspec++;
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}
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ctrlpriv->jrdev = kzalloc(sizeof(struct device *) * rspec, GFP_KERNEL);
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if (ctrlpriv->jrdev == NULL) {
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iounmap(&topregs->ctrl);
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return -ENOMEM;
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}
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ring = 0;
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ctrlpriv->total_jobrs = 0;
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for_each_compatible_node(np, NULL, "fsl,sec-v4.0-job-ring") {
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caam_jr_probe(pdev, np, ring);
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ctrlpriv->total_jobrs++;
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ring++;
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}
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if (!ring) {
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for_each_compatible_node(np, NULL, "fsl,sec4.0-job-ring") {
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caam_jr_probe(pdev, np, ring);
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ctrlpriv->total_jobrs++;
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ring++;
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}
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}
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/* Check to see if QI present. If so, enable */
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ctrlpriv->qi_present = !!(rd_reg64(&topregs->ctrl.perfmon.comp_parms) &
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CTPR_QI_MASK);
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if (ctrlpriv->qi_present) {
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ctrlpriv->qi = (struct caam_queue_if __force *)&topregs->qi;
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/* This is all that's required to physically enable QI */
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wr_reg32(&topregs->qi.qi_control_lo, QICTL_DQEN);
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}
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/* If no QI and no rings specified, quit and go home */
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if ((!ctrlpriv->qi_present) && (!ctrlpriv->total_jobrs)) {
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dev_err(dev, "no queues configured, terminating\n");
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caam_remove(pdev);
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return -ENOMEM;
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}
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cha_vid = rd_reg64(&topregs->ctrl.perfmon.cha_id);
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/*
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* If SEC has RNG version >= 4 and RNG state handle has not been
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* already instantiated, do RNG instantiation
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*/
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if ((cha_vid & CHA_ID_RNG_MASK) >> CHA_ID_RNG_SHIFT >= 4 &&
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!(rd_reg32(&topregs->ctrl.r4tst[0].rdsta) & RDSTA_IF0)) {
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do {
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kick_trng(pdev, ent_delay);
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ret = instantiate_rng(dev);
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ent_delay += 400;
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} while ((ret == -EAGAIN) && (ent_delay < RTSDCTL_ENT_DLY_MAX));
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if (ret) {
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dev_err(dev, "failed to instantiate RNG");
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caam_remove(pdev);
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return ret;
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}
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ctrlpriv->rng4_init = 1;
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/* Enable RDB bit so that RNG works faster */
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setbits32(&topregs->ctrl.scfgr, SCFGR_RDBENABLE);
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}
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/* NOTE: RTIC detection ought to go here, around Si time */
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caam_id = rd_reg64(&topregs->ctrl.perfmon.caam_id);
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/* Report "alive" for developer to see */
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dev_info(dev, "device ID = 0x%016llx (Era %d)\n", caam_id,
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caam_get_era(caam_id));
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dev_info(dev, "job rings = %d, qi = %d\n",
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ctrlpriv->total_jobrs, ctrlpriv->qi_present);
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#ifdef CONFIG_DEBUG_FS
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/*
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* FIXME: needs better naming distinction, as some amalgamation of
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* "caam" and nprop->full_name. The OF name isn't distinctive,
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* but does separate instances
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*/
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perfmon = (struct caam_perfmon __force *)&ctrl->perfmon;
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ctrlpriv->dfs_root = debugfs_create_dir("caam", NULL);
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ctrlpriv->ctl = debugfs_create_dir("ctl", ctrlpriv->dfs_root);
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/* Controller-level - performance monitor counters */
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ctrlpriv->ctl_rq_dequeued =
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debugfs_create_u64("rq_dequeued",
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S_IRUSR | S_IRGRP | S_IROTH,
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ctrlpriv->ctl, &perfmon->req_dequeued);
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ctrlpriv->ctl_ob_enc_req =
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debugfs_create_u64("ob_rq_encrypted",
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S_IRUSR | S_IRGRP | S_IROTH,
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ctrlpriv->ctl, &perfmon->ob_enc_req);
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ctrlpriv->ctl_ib_dec_req =
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debugfs_create_u64("ib_rq_decrypted",
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S_IRUSR | S_IRGRP | S_IROTH,
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ctrlpriv->ctl, &perfmon->ib_dec_req);
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ctrlpriv->ctl_ob_enc_bytes =
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debugfs_create_u64("ob_bytes_encrypted",
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S_IRUSR | S_IRGRP | S_IROTH,
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ctrlpriv->ctl, &perfmon->ob_enc_bytes);
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ctrlpriv->ctl_ob_prot_bytes =
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debugfs_create_u64("ob_bytes_protected",
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S_IRUSR | S_IRGRP | S_IROTH,
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ctrlpriv->ctl, &perfmon->ob_prot_bytes);
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ctrlpriv->ctl_ib_dec_bytes =
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debugfs_create_u64("ib_bytes_decrypted",
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S_IRUSR | S_IRGRP | S_IROTH,
|
|
ctrlpriv->ctl, &perfmon->ib_dec_bytes);
|
|
ctrlpriv->ctl_ib_valid_bytes =
|
|
debugfs_create_u64("ib_bytes_validated",
|
|
S_IRUSR | S_IRGRP | S_IROTH,
|
|
ctrlpriv->ctl, &perfmon->ib_valid_bytes);
|
|
|
|
/* Controller level - global status values */
|
|
ctrlpriv->ctl_faultaddr =
|
|
debugfs_create_u64("fault_addr",
|
|
S_IRUSR | S_IRGRP | S_IROTH,
|
|
ctrlpriv->ctl, &perfmon->faultaddr);
|
|
ctrlpriv->ctl_faultdetail =
|
|
debugfs_create_u32("fault_detail",
|
|
S_IRUSR | S_IRGRP | S_IROTH,
|
|
ctrlpriv->ctl, &perfmon->faultdetail);
|
|
ctrlpriv->ctl_faultstatus =
|
|
debugfs_create_u32("fault_status",
|
|
S_IRUSR | S_IRGRP | S_IROTH,
|
|
ctrlpriv->ctl, &perfmon->status);
|
|
|
|
/* Internal covering keys (useful in non-secure mode only) */
|
|
ctrlpriv->ctl_kek_wrap.data = &ctrlpriv->ctrl->kek[0];
|
|
ctrlpriv->ctl_kek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
|
|
ctrlpriv->ctl_kek = debugfs_create_blob("kek",
|
|
S_IRUSR |
|
|
S_IRGRP | S_IROTH,
|
|
ctrlpriv->ctl,
|
|
&ctrlpriv->ctl_kek_wrap);
|
|
|
|
ctrlpriv->ctl_tkek_wrap.data = &ctrlpriv->ctrl->tkek[0];
|
|
ctrlpriv->ctl_tkek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
|
|
ctrlpriv->ctl_tkek = debugfs_create_blob("tkek",
|
|
S_IRUSR |
|
|
S_IRGRP | S_IROTH,
|
|
ctrlpriv->ctl,
|
|
&ctrlpriv->ctl_tkek_wrap);
|
|
|
|
ctrlpriv->ctl_tdsk_wrap.data = &ctrlpriv->ctrl->tdsk[0];
|
|
ctrlpriv->ctl_tdsk_wrap.size = KEK_KEY_SIZE * sizeof(u32);
|
|
ctrlpriv->ctl_tdsk = debugfs_create_blob("tdsk",
|
|
S_IRUSR |
|
|
S_IRGRP | S_IROTH,
|
|
ctrlpriv->ctl,
|
|
&ctrlpriv->ctl_tdsk_wrap);
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
static struct of_device_id caam_match[] = {
|
|
{
|
|
.compatible = "fsl,sec-v4.0",
|
|
},
|
|
{
|
|
.compatible = "fsl,sec4.0",
|
|
},
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, caam_match);
|
|
|
|
static struct platform_driver caam_driver = {
|
|
.driver = {
|
|
.name = "caam",
|
|
.owner = THIS_MODULE,
|
|
.of_match_table = caam_match,
|
|
},
|
|
.probe = caam_probe,
|
|
.remove = caam_remove,
|
|
};
|
|
|
|
module_platform_driver(caam_driver);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_DESCRIPTION("FSL CAAM request backend");
|
|
MODULE_AUTHOR("Freescale Semiconductor - NMG/STC");
|