mirror of https://gitee.com/openkylin/linux.git
fbb0499091
The Chromebook firmware doesn't enable the CCI for the boot cpu, and arguably it shouldn't have to either. Let's have the kernel handle the CCI on its own for the boot CPU the same way it does it for secondary CPUs by using the MCPM loopback. This allows to boot all 8 cores on exynos5420-peach-pit, exynos5800-peach-pi and ARM Chromebook 2. Signed-off-by: Nicolas Pitre <nico@linaro.org> Tested-by: Tushar Behera <tushar.b@samsung.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Tested-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> |
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| .. | ||
| include/mach | ||
| Kconfig | ||
| Makefile | ||
| Makefile.boot | ||
| common.h | ||
| exynos-smc.S | ||
| exynos.c | ||
| firmware.c | ||
| headsmp.S | ||
| hotplug.c | ||
| mcpm-exynos.c | ||
| mfc.h | ||
| platsmp.c | ||
| pm.c | ||
| pm_domains.c | ||
| pmu.c | ||
| regs-pmu.h | ||
| sleep.S | ||
| smc.h | ||