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UniPhier SoCs have the following pins for hardware flow control of UART: XRTS, XCTS and for modem control of UART: XDTR, XDSR, XDCD, XRI The port number with the flow control is SoC-dependent. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| pinctrl-uniphier-core.c | ||
| pinctrl-uniphier-ld4.c | ||
| pinctrl-uniphier-ld6b.c | ||
| pinctrl-uniphier-ld11.c | ||
| pinctrl-uniphier-ld20.c | ||
| pinctrl-uniphier-pro4.c | ||
| pinctrl-uniphier-pro5.c | ||
| pinctrl-uniphier-pxs2.c | ||
| pinctrl-uniphier-pxs3.c | ||
| pinctrl-uniphier-sld8.c | ||
| pinctrl-uniphier.h | ||