linux/drivers/gpu
Philipp Zabel ff652fcf84 gpu: ipu-v3: image-convert: relax alignment restrictions
For the planar but U/V-packed formats NV12 and NV16, 8 pixel width
alignment is good enough to fulfill the 8 byte stride requirement.
If we allow the input 8-pixel DMA bursts to overshoot the end of the
line, the only input alignment restrictions are dictated by the pixel
format and 8-byte aligned line start address.
Since different tile sizes are allowed, the output tile with / height
alignment doesn't need to be multiplied by number of columns / rows.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
[slongerbeam@gmail.com: Bring in the fixes to format width and
 height alignment restrictions from imx-media-mem2mem.c.]
Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-11-05 14:40:08 +01:00
..
drm drm/imx: imx-tve: constify clk_ops structure 2018-11-05 14:40:06 +01:00
host1x gpu: host1x: Detach Host1x from IOMMU DMA domain on arm32 2018-09-26 17:11:14 +02:00
ipu-v3 gpu: ipu-v3: image-convert: relax alignment restrictions 2018-11-05 14:40:08 +01:00
vga ALSA: hda - Enable runtime PM only for discrete GPU 2018-09-13 17:58:30 +02:00
Makefile