111 lines
3.5 KiB
ReStructuredText
111 lines
3.5 KiB
ReStructuredText
============================
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AMDGPU Instructions Notation
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============================
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.. contents::
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:local:
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.. _amdgpu_syn_instruction_notation:
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Introduction
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============
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This is an overview of notation used to describe the syntax of AMDGPU assembler instructions.
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This notation mimics the :ref:`syntax of assembler instructions<amdgpu_syn_instructions>`
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except that instead of real operands and modifiers it provides references to their description.
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Instructions
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============
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Notation
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~~~~~~~~
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This is the notation used to describe AMDGPU instructions:
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``<``\ :ref:`opcode description<amdgpu_syn_opcode_notation>`\ ``> <``\ :ref:`operands description<amdgpu_syn_instruction_operands_notation>`\ ``> <``\ :ref:`modifiers description<amdgpu_syn_instruction_modifiers_notation>`\ ``>``
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.. _amdgpu_syn_opcode_notation:
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Opcode
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======
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Notation
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~~~~~~~~
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TBD
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.. _amdgpu_syn_instruction_operands_notation:
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Operands
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========
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An instruction may have zero or more *operands*. They are comma-separated in the description:
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``<``\ :ref:`description of operand 0<amdgpu_syn_instruction_operand_notation>`\ ``>, <``\ :ref:`description of operand 1<amdgpu_syn_instruction_operand_notation>`\ ``>, ...``
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The order of *operands* is fixed. *Operands* cannot be omitted
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except for special cases described below.
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.. _amdgpu_syn_instruction_operand_notation:
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Notation
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~~~~~~~~
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An operand is described using the following notation:
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*<name><tag0><tag1>...*
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Where:
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* *name* is a link to a description of the operand.
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* *tags* are optional. They are used to indicate special operand properties:
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.. _amdgpu_syn_instruction_operand_tags:
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============== =================================================================================
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Operand tag Meaning
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============== =================================================================================
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:opt An optional operand.
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:m An operand which may be used with
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:ref:`VOP3 operand modifiers<amdgpu_synid_vop3_operand_modifiers>` or
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:ref:`SDWA operand modifiers<amdgpu_synid_sdwa_operand_modifiers>`.
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:dst An input operand which may also serve as a destination
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if :ref:`glc<amdgpu_synid_glc>` modifier is specified.
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:fx This is an *f32* or *f16* operand depending on
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:ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` modifier.
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:<type> Operand *type* differs from *type*
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:ref:`implied by the opcode name<amdgpu_syn_instruction_type>`.
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This tag specifies actual operand *type*.
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============== =================================================================================
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Examples:
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.. parsed-literal::
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src1:m // src1 operand may be used with operand modifiers
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vdata:dst // vdata operand may be used as both source and destination
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vdst:u32 // vdst operand has u32 type
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.. _amdgpu_syn_instruction_modifiers_notation:
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Modifiers
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=========
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An instruction may have zero or more optional *modifiers*. They are space-separated in the description:
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``<``\ :ref:`description of modifier 0<amdgpu_syn_instruction_modifier_notation>`\ ``> <``\ :ref:`description of modifier 1<amdgpu_syn_instruction_modifier_notation>`\ ``> ...``
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The order of *modifiers* is fixed.
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.. _amdgpu_syn_instruction_modifier_notation:
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Notation
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~~~~~~~~
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A *modifier* is described using the following notation:
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*<name>*
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Where *name* is a link to a description of the *modifier*.
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