62 lines
2.6 KiB
ReStructuredText
62 lines
2.6 KiB
ReStructuredText
..
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**************************************************
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* *
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* Automatically generated file, do not edit! *
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* *
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**************************************************
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.. _amdgpu_synid9_hwreg:
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hwreg
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===========================
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Bits of a hardware register being accessed.
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The bits of this operand have the following meaning:
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============ ===================================
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Bits Description
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============ ===================================
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5:0 Register *id*.
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10:6 First bit *offset* (0..31).
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15:11 *Size* in bits (1..32).
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============ ===================================
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This operand may be specified as a positive 16-bit :ref:`integer_number<amdgpu_synid_integer_number>` or using the syntax described below.
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==================================== ============================================================================
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Syntax Description
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==================================== ============================================================================
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hwreg({0..63}) All bits of a register indicated by its *id*.
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hwreg(<*name*>) All bits of a register indicated by its *name*.
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hwreg({0..63}, {0..31}, {1..32}) Register bits indicated by register *id*, first bit *offset* and *size*.
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hwreg(<*name*>, {0..31}, {1..32}) Register bits indicated by register *name*, first bit *offset* and *size*.
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==================================== ============================================================================
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Register *id*, *offset* and *size* must be specified as positive :ref:`integer numbers<amdgpu_synid_integer_number>`.
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Defined register *names* include:
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=================== ==========================================
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Name Description
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=================== ==========================================
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HW_REG_MODE Shader writeable mode bits.
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HW_REG_STATUS Shader read-only status.
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HW_REG_TRAPSTS Trap status.
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HW_REG_HW_ID Id of wave, simd, compute unit, etc.
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HW_REG_GPR_ALLOC Per-wave SGPR and VGPR allocation.
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HW_REG_LDS_ALLOC Per-wave LDS allocation.
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HW_REG_IB_STS Counters of outstanding instructions.
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HW_REG_SH_MEM_BASES Memory aperture.
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=================== ==========================================
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Examples:
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.. parsed-literal::
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s_getreg_b32 s2, 0x6
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s_getreg_b32 s2, hwreg(15)
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s_getreg_b32 s2, hwreg(51, 1, 31)
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s_getreg_b32 s2, hwreg(HW_REG_LDS_ALLOC, 0, 1)
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