powerpc/44x: Fix PCI MSI support for Maui APM821xx SoC and Bluestone board
This patch consists of: - Enable PCI MSI as default for Bluestone board - Change definition of number of MSI interrupts as it depends on SoC - Fix returning ENODEV as finding MSI node - Fix MSI physical high and low address - Keep MSI data logically Signed-off-by: Mai La <mla@apm.com> Signed-off-by: Josh Boyer <jwboyer@gmail.com>
This commit is contained in:
parent
47da421981
commit
247540b03b
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@ -23,6 +23,8 @@ config BLUESTONE
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default n
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default n
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select PPC44x_SIMPLE
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select PPC44x_SIMPLE
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select APM821xx
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select APM821xx
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select PCI_MSI
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select PPC4xx_MSI
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select PPC4xx_PCI_EXPRESS
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select PPC4xx_PCI_EXPRESS
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select IBM_EMAC_RGMII
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select IBM_EMAC_RGMII
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help
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help
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@ -28,10 +28,11 @@
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#include <linux/of_platform.h>
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#include <linux/of_platform.h>
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#include <linux/interrupt.h>
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#include <linux/interrupt.h>
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#include <linux/export.h>
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#include <linux/export.h>
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#include <linux/kernel.h>
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#include <asm/prom.h>
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#include <asm/prom.h>
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#include <asm/hw_irq.h>
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#include <asm/hw_irq.h>
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#include <asm/ppc-pci.h>
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#include <asm/ppc-pci.h>
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#include <boot/dcr.h>
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#include <asm/dcr.h>
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#include <asm/dcr-regs.h>
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#include <asm/dcr-regs.h>
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#include <asm/msi_bitmap.h>
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#include <asm/msi_bitmap.h>
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@ -43,13 +44,14 @@
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#define PEIH_FLUSH0 0x30
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#define PEIH_FLUSH0 0x30
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#define PEIH_FLUSH1 0x38
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#define PEIH_FLUSH1 0x38
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#define PEIH_CNTRST 0x48
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#define PEIH_CNTRST 0x48
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#define NR_MSI_IRQS 4
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static int msi_irqs;
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struct ppc4xx_msi {
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struct ppc4xx_msi {
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u32 msi_addr_lo;
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u32 msi_addr_lo;
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u32 msi_addr_hi;
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u32 msi_addr_hi;
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void __iomem *msi_regs;
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void __iomem *msi_regs;
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int msi_virqs[NR_MSI_IRQS];
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int *msi_virqs;
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struct msi_bitmap bitmap;
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struct msi_bitmap bitmap;
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struct device_node *msi_dev;
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struct device_node *msi_dev;
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};
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};
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@ -61,7 +63,7 @@ static int ppc4xx_msi_init_allocator(struct platform_device *dev,
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{
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{
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int err;
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int err;
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err = msi_bitmap_alloc(&msi_data->bitmap, NR_MSI_IRQS,
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err = msi_bitmap_alloc(&msi_data->bitmap, msi_irqs,
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dev->dev.of_node);
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dev->dev.of_node);
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if (err)
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if (err)
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return err;
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return err;
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@ -83,6 +85,11 @@ static int ppc4xx_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
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struct msi_desc *entry;
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struct msi_desc *entry;
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struct ppc4xx_msi *msi_data = &ppc4xx_msi;
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struct ppc4xx_msi *msi_data = &ppc4xx_msi;
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msi_data->msi_virqs = kmalloc((msi_irqs) * sizeof(int),
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GFP_KERNEL);
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if (!msi_data->msi_virqs)
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return -ENOMEM;
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list_for_each_entry(entry, &dev->msi_list, list) {
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list_for_each_entry(entry, &dev->msi_list, list) {
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int_no = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1);
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int_no = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1);
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if (int_no >= 0)
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if (int_no >= 0)
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@ -150,12 +157,11 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
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if (!sdr_addr)
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if (!sdr_addr)
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return -1;
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return -1;
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SDR0_WRITE(sdr_addr, (u64)res.start >> 32); /*HIGH addr */
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mtdcri(SDR0, *sdr_addr, upper_32_bits(res.start)); /*HIGH addr */
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SDR0_WRITE(sdr_addr + 1, res.start & 0xFFFFFFFF); /* Low addr */
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mtdcri(SDR0, *sdr_addr + 1, lower_32_bits(res.start)); /* Low addr */
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msi->msi_dev = of_find_node_by_name(NULL, "ppc4xx-msi");
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msi->msi_dev = of_find_node_by_name(NULL, "ppc4xx-msi");
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if (msi->msi_dev)
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if (!msi->msi_dev)
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return -ENODEV;
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return -ENODEV;
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msi->msi_regs = of_iomap(msi->msi_dev, 0);
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msi->msi_regs = of_iomap(msi->msi_dev, 0);
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@ -167,9 +173,12 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
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(u32) (msi->msi_regs + PEIH_TERMADH), (u32) (msi->msi_regs));
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(u32) (msi->msi_regs + PEIH_TERMADH), (u32) (msi->msi_regs));
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msi_virt = dma_alloc_coherent(&dev->dev, 64, &msi_phys, GFP_KERNEL);
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msi_virt = dma_alloc_coherent(&dev->dev, 64, &msi_phys, GFP_KERNEL);
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msi->msi_addr_hi = 0x0;
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if (!msi_virt)
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msi->msi_addr_lo = (u32) msi_phys;
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return -ENOMEM;
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dev_dbg(&dev->dev, "PCIE-MSI: msi address 0x%x\n", msi->msi_addr_lo);
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msi->msi_addr_hi = (u32)(msi_phys >> 32);
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msi->msi_addr_lo = (u32)(msi_phys & 0xffffffff);
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dev_dbg(&dev->dev, "PCIE-MSI: msi address high 0x%x, low 0x%x\n",
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msi->msi_addr_hi, msi->msi_addr_lo);
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/* Progam the Interrupt handler Termination addr registers */
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/* Progam the Interrupt handler Termination addr registers */
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out_be32(msi->msi_regs + PEIH_TERMADH, msi->msi_addr_hi);
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out_be32(msi->msi_regs + PEIH_TERMADH, msi->msi_addr_hi);
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@ -185,6 +194,8 @@ static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
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out_be32(msi->msi_regs + PEIH_MSIED, *msi_data);
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out_be32(msi->msi_regs + PEIH_MSIED, *msi_data);
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out_be32(msi->msi_regs + PEIH_MSIMK, *msi_mask);
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out_be32(msi->msi_regs + PEIH_MSIMK, *msi_mask);
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dma_free_coherent(&dev->dev, 64, msi_virt, msi_phys);
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return 0;
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return 0;
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}
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}
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@ -194,7 +205,7 @@ static int ppc4xx_of_msi_remove(struct platform_device *dev)
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int i;
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int i;
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int virq;
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int virq;
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for (i = 0; i < NR_MSI_IRQS; i++) {
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for (i = 0; i < msi_irqs; i++) {
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virq = msi->msi_virqs[i];
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virq = msi->msi_virqs[i];
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if (virq != NO_IRQ)
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if (virq != NO_IRQ)
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irq_dispose_mapping(virq);
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irq_dispose_mapping(virq);
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@ -215,8 +226,6 @@ static int __devinit ppc4xx_msi_probe(struct platform_device *dev)
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struct resource res;
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struct resource res;
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int err = 0;
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int err = 0;
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msi = &ppc4xx_msi;/*keep the msi data for further use*/
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dev_dbg(&dev->dev, "PCIE-MSI: Setting up MSI support...\n");
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dev_dbg(&dev->dev, "PCIE-MSI: Setting up MSI support...\n");
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msi = kzalloc(sizeof(struct ppc4xx_msi), GFP_KERNEL);
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msi = kzalloc(sizeof(struct ppc4xx_msi), GFP_KERNEL);
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@ -234,6 +243,10 @@ static int __devinit ppc4xx_msi_probe(struct platform_device *dev)
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goto error_out;
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goto error_out;
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}
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}
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msi_irqs = of_irq_count(dev->dev.of_node);
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if (!msi_irqs)
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return -ENODEV;
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if (ppc4xx_setup_pcieh_hw(dev, res, msi))
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if (ppc4xx_setup_pcieh_hw(dev, res, msi))
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goto error_out;
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goto error_out;
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@ -242,6 +255,7 @@ static int __devinit ppc4xx_msi_probe(struct platform_device *dev)
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dev_err(&dev->dev, "Error allocating MSI bitmap\n");
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dev_err(&dev->dev, "Error allocating MSI bitmap\n");
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goto error_out;
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goto error_out;
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}
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}
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ppc4xx_msi = *msi;
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ppc_md.setup_msi_irqs = ppc4xx_setup_msi_irqs;
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ppc_md.setup_msi_irqs = ppc4xx_setup_msi_irqs;
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ppc_md.teardown_msi_irqs = ppc4xx_teardown_msi_irqs;
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ppc_md.teardown_msi_irqs = ppc4xx_teardown_msi_irqs;
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