ARM: dts: dra7x: Integrate sDMA crossbar

The sDMA requests are routed through the DMA crossbar and without the
crossbar only peripherals using DMA request 0-127 can be used.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Peter Ujfalusi 2015-04-09 12:35:54 +03:00 committed by Tony Lindgren
parent 3402042287
commit 3a0830de58
1 changed files with 33 additions and 24 deletions

View File

@ -308,6 +308,15 @@ sdma: dma-controller@4a056000 {
dma-requests = <127>; dma-requests = <127>;
}; };
sdma_xbar: dma-router@4a002b78 {
compatible = "ti,dra7-dma-crossbar";
reg = <0x4a002b78 0xfc>;
#dma-cells = <1>;
dma-requests = <205>;
ti,dma-safe-map = <0>;
dma-masters = <&sdma>;
};
gpio1: gpio@4ae10000 { gpio1: gpio@4ae10000 {
compatible = "ti,omap4-gpio"; compatible = "ti,omap4-gpio";
reg = <0x4ae10000 0x200>; reg = <0x4ae10000 0x200>;
@ -403,7 +412,7 @@ uart1: serial@4806a000 {
ti,hwmods = "uart1"; ti,hwmods = "uart1";
clock-frequency = <48000000>; clock-frequency = <48000000>;
status = "disabled"; status = "disabled";
dmas = <&sdma 49>, <&sdma 50>; dmas = <&sdma_xbar 49>, <&sdma_xbar 50>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
}; };
@ -414,7 +423,7 @@ uart2: serial@4806c000 {
ti,hwmods = "uart2"; ti,hwmods = "uart2";
clock-frequency = <48000000>; clock-frequency = <48000000>;
status = "disabled"; status = "disabled";
dmas = <&sdma 51>, <&sdma 52>; dmas = <&sdma_xbar 51>, <&sdma_xbar 52>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
}; };
@ -425,7 +434,7 @@ uart3: serial@48020000 {
ti,hwmods = "uart3"; ti,hwmods = "uart3";
clock-frequency = <48000000>; clock-frequency = <48000000>;
status = "disabled"; status = "disabled";
dmas = <&sdma 53>, <&sdma 54>; dmas = <&sdma_xbar 53>, <&sdma_xbar 54>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
}; };
@ -436,7 +445,7 @@ uart4: serial@4806e000 {
ti,hwmods = "uart4"; ti,hwmods = "uart4";
clock-frequency = <48000000>; clock-frequency = <48000000>;
status = "disabled"; status = "disabled";
dmas = <&sdma 55>, <&sdma 56>; dmas = <&sdma_xbar 55>, <&sdma_xbar 56>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
}; };
@ -447,7 +456,7 @@ uart5: serial@48066000 {
ti,hwmods = "uart5"; ti,hwmods = "uart5";
clock-frequency = <48000000>; clock-frequency = <48000000>;
status = "disabled"; status = "disabled";
dmas = <&sdma 63>, <&sdma 64>; dmas = <&sdma_xbar 63>, <&sdma_xbar 64>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
}; };
@ -458,7 +467,7 @@ uart6: serial@48068000 {
ti,hwmods = "uart6"; ti,hwmods = "uart6";
clock-frequency = <48000000>; clock-frequency = <48000000>;
status = "disabled"; status = "disabled";
dmas = <&sdma 79>, <&sdma 80>; dmas = <&sdma_xbar 79>, <&sdma_xbar 80>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
}; };
@ -867,7 +876,7 @@ mmc1: mmc@4809c000 {
ti,hwmods = "mmc1"; ti,hwmods = "mmc1";
ti,dual-volt; ti,dual-volt;
ti,needs-special-reset; ti,needs-special-reset;
dmas = <&sdma 61>, <&sdma 62>; dmas = <&sdma_xbar 61>, <&sdma_xbar 62>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
status = "disabled"; status = "disabled";
pbias-supply = <&pbias_mmc_reg>; pbias-supply = <&pbias_mmc_reg>;
@ -879,7 +888,7 @@ mmc2: mmc@480b4000 {
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc2"; ti,hwmods = "mmc2";
ti,needs-special-reset; ti,needs-special-reset;
dmas = <&sdma 47>, <&sdma 48>; dmas = <&sdma_xbar 47>, <&sdma_xbar 48>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
status = "disabled"; status = "disabled";
}; };
@ -890,7 +899,7 @@ mmc3: mmc@480ad000 {
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc3"; ti,hwmods = "mmc3";
ti,needs-special-reset; ti,needs-special-reset;
dmas = <&sdma 77>, <&sdma 78>; dmas = <&sdma_xbar 77>, <&sdma_xbar 78>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
status = "disabled"; status = "disabled";
}; };
@ -901,7 +910,7 @@ mmc4: mmc@480d1000 {
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc4"; ti,hwmods = "mmc4";
ti,needs-special-reset; ti,needs-special-reset;
dmas = <&sdma 57>, <&sdma 58>; dmas = <&sdma_xbar 57>, <&sdma_xbar 58>;
dma-names = "tx", "rx"; dma-names = "tx", "rx";
status = "disabled"; status = "disabled";
}; };
@ -1046,14 +1055,14 @@ mcspi1: spi@48098000 {
#size-cells = <0>; #size-cells = <0>;
ti,hwmods = "mcspi1"; ti,hwmods = "mcspi1";
ti,spi-num-cs = <4>; ti,spi-num-cs = <4>;
dmas = <&sdma 35>, dmas = <&sdma_xbar 35>,
<&sdma 36>, <&sdma_xbar 36>,
<&sdma 37>, <&sdma_xbar 37>,
<&sdma 38>, <&sdma_xbar 38>,
<&sdma 39>, <&sdma_xbar 39>,
<&sdma 40>, <&sdma_xbar 40>,
<&sdma 41>, <&sdma_xbar 41>,
<&sdma 42>; <&sdma_xbar 42>;
dma-names = "tx0", "rx0", "tx1", "rx1", dma-names = "tx0", "rx0", "tx1", "rx1",
"tx2", "rx2", "tx3", "rx3"; "tx2", "rx2", "tx3", "rx3";
status = "disabled"; status = "disabled";
@ -1067,10 +1076,10 @@ mcspi2: spi@4809a000 {
#size-cells = <0>; #size-cells = <0>;
ti,hwmods = "mcspi2"; ti,hwmods = "mcspi2";
ti,spi-num-cs = <2>; ti,spi-num-cs = <2>;
dmas = <&sdma 43>, dmas = <&sdma_xbar 43>,
<&sdma 44>, <&sdma_xbar 44>,
<&sdma 45>, <&sdma_xbar 45>,
<&sdma 46>; <&sdma_xbar 46>;
dma-names = "tx0", "rx0", "tx1", "rx1"; dma-names = "tx0", "rx0", "tx1", "rx1";
status = "disabled"; status = "disabled";
}; };
@ -1083,7 +1092,7 @@ mcspi3: spi@480b8000 {
#size-cells = <0>; #size-cells = <0>;
ti,hwmods = "mcspi3"; ti,hwmods = "mcspi3";
ti,spi-num-cs = <2>; ti,spi-num-cs = <2>;
dmas = <&sdma 15>, <&sdma 16>; dmas = <&sdma_xbar 15>, <&sdma_xbar 16>;
dma-names = "tx0", "rx0"; dma-names = "tx0", "rx0";
status = "disabled"; status = "disabled";
}; };
@ -1096,7 +1105,7 @@ mcspi4: spi@480ba000 {
#size-cells = <0>; #size-cells = <0>;
ti,hwmods = "mcspi4"; ti,hwmods = "mcspi4";
ti,spi-num-cs = <1>; ti,spi-num-cs = <1>;
dmas = <&sdma 70>, <&sdma 71>; dmas = <&sdma_xbar 70>, <&sdma_xbar 71>;
dma-names = "tx0", "rx0"; dma-names = "tx0", "rx0";
status = "disabled"; status = "disabled";
}; };