ARM: EXYNOS: Add IO mapping for non-secure SYSRAM.
On TrustZone-enabled boards the non-secure SYSRAM is used for secondary CPU bring-up, so add a mapping for it. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -232,6 +232,33 @@ static struct map_desc exynos4_iodesc1[] __initdata = {
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},
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},
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};
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};
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static struct map_desc exynos4210_iodesc[] __initdata = {
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{
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.virtual = (unsigned long)S5P_VA_SYSRAM_NS,
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.pfn = __phys_to_pfn(EXYNOS4210_PA_SYSRAM_NS),
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.length = SZ_4K,
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.type = MT_DEVICE,
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},
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};
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static struct map_desc exynos4x12_iodesc[] __initdata = {
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{
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.virtual = (unsigned long)S5P_VA_SYSRAM_NS,
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.pfn = __phys_to_pfn(EXYNOS4x12_PA_SYSRAM_NS),
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.length = SZ_4K,
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.type = MT_DEVICE,
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},
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};
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static struct map_desc exynos5250_iodesc[] __initdata = {
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{
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.virtual = (unsigned long)S5P_VA_SYSRAM_NS,
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.pfn = __phys_to_pfn(EXYNOS5250_PA_SYSRAM_NS),
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.length = SZ_4K,
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.type = MT_DEVICE,
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},
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};
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static struct map_desc exynos5_iodesc[] __initdata = {
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static struct map_desc exynos5_iodesc[] __initdata = {
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{
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{
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.virtual = (unsigned long)S3C_VA_SYS,
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.virtual = (unsigned long)S3C_VA_SYS,
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@ -360,6 +387,11 @@ static void __init exynos4_map_io(void)
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else
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else
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iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1));
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iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1));
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if (soc_is_exynos4210())
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iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc));
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if (soc_is_exynos4212() || soc_is_exynos4412())
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iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc));
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/* initialize device information early */
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/* initialize device information early */
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exynos4_default_sdhci0();
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exynos4_default_sdhci0();
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exynos4_default_sdhci1();
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exynos4_default_sdhci1();
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@ -392,6 +424,9 @@ static void __init exynos4_map_io(void)
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static void __init exynos5_map_io(void)
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static void __init exynos5_map_io(void)
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{
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{
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iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
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iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
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if (soc_is_exynos5250())
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iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
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}
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}
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static void __init exynos5440_map_io(void)
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static void __init exynos5440_map_io(void)
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@ -26,6 +26,9 @@
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#define EXYNOS4_PA_SYSRAM0 0x02025000
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#define EXYNOS4_PA_SYSRAM0 0x02025000
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#define EXYNOS4_PA_SYSRAM1 0x02020000
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#define EXYNOS4_PA_SYSRAM1 0x02020000
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#define EXYNOS5_PA_SYSRAM 0x02020000
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#define EXYNOS5_PA_SYSRAM 0x02020000
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#define EXYNOS4210_PA_SYSRAM_NS 0x0203F000
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#define EXYNOS4x12_PA_SYSRAM_NS 0x0204F000
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#define EXYNOS5250_PA_SYSRAM_NS 0x0204F000
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#define EXYNOS4_PA_FIMC0 0x11800000
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#define EXYNOS4_PA_FIMC0 0x11800000
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#define EXYNOS4_PA_FIMC1 0x11810000
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#define EXYNOS4_PA_FIMC1 0x11810000
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@ -22,6 +22,7 @@
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#define S5P_VA_GPIO3 S3C_ADDR(0x02280000)
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#define S5P_VA_GPIO3 S3C_ADDR(0x02280000)
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#define S5P_VA_SYSRAM S3C_ADDR(0x02400000)
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#define S5P_VA_SYSRAM S3C_ADDR(0x02400000)
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#define S5P_VA_SYSRAM_NS S3C_ADDR(0x02410000)
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#define S5P_VA_DMC0 S3C_ADDR(0x02440000)
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#define S5P_VA_DMC0 S3C_ADDR(0x02440000)
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#define S5P_VA_DMC1 S3C_ADDR(0x02480000)
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#define S5P_VA_DMC1 S3C_ADDR(0x02480000)
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#define S5P_VA_SROMC S3C_ADDR(0x024C0000)
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#define S5P_VA_SROMC S3C_ADDR(0x024C0000)
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