FROMLIST: asm-generic/io: Add logging support for MMIO accessors

Add logging support for MMIO high level accessors such as read{b,w,l,q}
and their relaxed versions to aid in debugging unexpected crashes/hangs
caused by the corresponding MMIO operation. Also add a generic flag
(__DISABLE_TRACE_MMIO__) which is used to disable MMIO tracing in nVHE KVM
and if required can be used to disable MMIO tracing for specific drivers.

Bug: 169045115
Link: https://lore.kernel.org/lkml/e64a532ce10e88269b1e8550293e07ea669c5f73.1638858747.git.quic_saipraka@quicinc.com/
Change-Id: I861e9d351cc2660051a40f36b391609c06aabb99
Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com>
This commit is contained in:
Vamsi Krishna Lanka 2022-01-14 16:19:01 -08:00 committed by Todd Kjos
parent c7b6c40553
commit 4de5179100
2 changed files with 83 additions and 5 deletions

View File

@ -4,7 +4,12 @@
# #
asflags-y := -D__KVM_NVHE_HYPERVISOR__ -D__DISABLE_EXPORTS asflags-y := -D__KVM_NVHE_HYPERVISOR__ -D__DISABLE_EXPORTS
ccflags-y := -D__KVM_NVHE_HYPERVISOR__ -D__DISABLE_EXPORTS
# Tracepoint and MMIO logging symbols should not be visible at nVHE KVM as
# there is no way to execute them and any such MMIO access from nVHE KVM
# will explode instantly (Words of Marc Zyngier). So introduce a generic flag
# __DISABLE_TRACE_MMIO__ to disable MMIO tracing for nVHE KVM.
ccflags-y := -D__KVM_NVHE_HYPERVISOR__ -D__DISABLE_EXPORTS -D__DISABLE_TRACE_MMIO__
hostprogs := gen-hyprel hostprogs := gen-hyprel
HOST_EXTRACFLAGS += -I$(objtree)/include HOST_EXTRACFLAGS += -I$(objtree)/include

View File

@ -61,6 +61,35 @@
#define __io_par(v) __io_ar(v) #define __io_par(v) __io_ar(v)
#endif #endif
#if IS_ENABLED(CONFIG_TRACE_MMIO_ACCESS) && !(defined(__DISABLE_TRACE_MMIO__))
#include <linux/tracepoint-defs.h>
DECLARE_TRACEPOINT(rwmmio_write);
DECLARE_TRACEPOINT(rwmmio_post_write);
DECLARE_TRACEPOINT(rwmmio_read);
DECLARE_TRACEPOINT(rwmmio_post_read);
void log_write_mmio(u64 val, u8 width, volatile void __iomem *addr,
unsigned long caller_addr);
void log_post_write_mmio(u64 val, u8 width, volatile void __iomem *addr,
unsigned long caller_addr);
void log_read_mmio(u8 width, const volatile void __iomem *addr,
unsigned long caller_addr);
void log_post_read_mmio(u64 val, u8 width, const volatile void __iomem *addr,
unsigned long caller_addr);
#else
static inline void log_write_mmio(u64 val, u8 width, volatile void __iomem *addr,
unsigned long caller_addr) {}
static inline void log_post_write_mmio(u64 val, u8 width, volatile void __iomem *addr,
unsigned long caller_addr) {}
static inline void log_read_mmio(u8 width, const volatile void __iomem *addr,
unsigned long caller_addr) {}
static inline void log_post_read_mmio(u64 val, u8 width, const volatile void __iomem *addr,
unsigned long caller_addr) {}
#endif /* CONFIG_TRACE_MMIO_ACCESS */
/* /*
* __raw_{read,write}{b,w,l,q}() access memory in native endianness. * __raw_{read,write}{b,w,l,q}() access memory in native endianness.
@ -149,9 +178,11 @@ static inline u8 readb(const volatile void __iomem *addr)
{ {
u8 val; u8 val;
log_read_mmio(8, addr, _THIS_IP_);
__io_br(); __io_br();
val = __raw_readb(addr); val = __raw_readb(addr);
__io_ar(val); __io_ar(val);
log_post_read_mmio(val, 8, addr, _THIS_IP_);
return val; return val;
} }
#endif #endif
@ -162,9 +193,11 @@ static inline u16 readw(const volatile void __iomem *addr)
{ {
u16 val; u16 val;
log_read_mmio(16, addr, _THIS_IP_);
__io_br(); __io_br();
val = __le16_to_cpu((__le16 __force)__raw_readw(addr)); val = __le16_to_cpu((__le16 __force)__raw_readw(addr));
__io_ar(val); __io_ar(val);
log_post_read_mmio(val, 16, addr, _THIS_IP_);
return val; return val;
} }
#endif #endif
@ -175,9 +208,11 @@ static inline u32 readl(const volatile void __iomem *addr)
{ {
u32 val; u32 val;
log_read_mmio(32, addr, _THIS_IP_);
__io_br(); __io_br();
val = __le32_to_cpu((__le32 __force)__raw_readl(addr)); val = __le32_to_cpu((__le32 __force)__raw_readl(addr));
__io_ar(val); __io_ar(val);
log_post_read_mmio(val, 32, addr, _THIS_IP_);
return val; return val;
} }
#endif #endif
@ -189,9 +224,11 @@ static inline u64 readq(const volatile void __iomem *addr)
{ {
u64 val; u64 val;
log_read_mmio(64, addr, _THIS_IP_);
__io_br(); __io_br();
val = __le64_to_cpu(__raw_readq(addr)); val = __le64_to_cpu(__raw_readq(addr));
__io_ar(val); __io_ar(val);
log_post_read_mmio(val, 64, addr, _THIS_IP_);
return val; return val;
} }
#endif #endif
@ -201,9 +238,11 @@ static inline u64 readq(const volatile void __iomem *addr)
#define writeb writeb #define writeb writeb
static inline void writeb(u8 value, volatile void __iomem *addr) static inline void writeb(u8 value, volatile void __iomem *addr)
{ {
log_write_mmio(value, 8, addr, _THIS_IP_);
__io_bw(); __io_bw();
__raw_writeb(value, addr); __raw_writeb(value, addr);
__io_aw(); __io_aw();
log_post_write_mmio(value, 8, addr, _THIS_IP_);
} }
#endif #endif
@ -211,9 +250,11 @@ static inline void writeb(u8 value, volatile void __iomem *addr)
#define writew writew #define writew writew
static inline void writew(u16 value, volatile void __iomem *addr) static inline void writew(u16 value, volatile void __iomem *addr)
{ {
log_write_mmio(value, 16, addr, _THIS_IP_);
__io_bw(); __io_bw();
__raw_writew((u16 __force)cpu_to_le16(value), addr); __raw_writew((u16 __force)cpu_to_le16(value), addr);
__io_aw(); __io_aw();
log_post_write_mmio(value, 16, addr, _THIS_IP_);
} }
#endif #endif
@ -221,9 +262,11 @@ static inline void writew(u16 value, volatile void __iomem *addr)
#define writel writel #define writel writel
static inline void writel(u32 value, volatile void __iomem *addr) static inline void writel(u32 value, volatile void __iomem *addr)
{ {
log_write_mmio(value, 32, addr, _THIS_IP_);
__io_bw(); __io_bw();
__raw_writel((u32 __force)__cpu_to_le32(value), addr); __raw_writel((u32 __force)__cpu_to_le32(value), addr);
__io_aw(); __io_aw();
log_post_write_mmio(value, 32, addr, _THIS_IP_);
} }
#endif #endif
@ -232,9 +275,11 @@ static inline void writel(u32 value, volatile void __iomem *addr)
#define writeq writeq #define writeq writeq
static inline void writeq(u64 value, volatile void __iomem *addr) static inline void writeq(u64 value, volatile void __iomem *addr)
{ {
log_write_mmio(value, 64, addr, _THIS_IP_);
__io_bw(); __io_bw();
__raw_writeq(__cpu_to_le64(value), addr); __raw_writeq(__cpu_to_le64(value), addr);
__io_aw(); __io_aw();
log_post_write_mmio(value, 64, addr, _THIS_IP_);
} }
#endif #endif
#endif /* CONFIG_64BIT */ #endif /* CONFIG_64BIT */
@ -248,7 +293,12 @@ static inline void writeq(u64 value, volatile void __iomem *addr)
#define readb_relaxed readb_relaxed #define readb_relaxed readb_relaxed
static inline u8 readb_relaxed(const volatile void __iomem *addr) static inline u8 readb_relaxed(const volatile void __iomem *addr)
{ {
return __raw_readb(addr); u8 val;
log_read_mmio(8, addr, _THIS_IP_);
val = __raw_readb(addr);
log_post_read_mmio(val, 8, addr, _THIS_IP_);
return val;
} }
#endif #endif
@ -256,7 +306,12 @@ static inline u8 readb_relaxed(const volatile void __iomem *addr)
#define readw_relaxed readw_relaxed #define readw_relaxed readw_relaxed
static inline u16 readw_relaxed(const volatile void __iomem *addr) static inline u16 readw_relaxed(const volatile void __iomem *addr)
{ {
return __le16_to_cpu(__raw_readw(addr)); u16 val;
log_read_mmio(16, addr, _THIS_IP_);
val = __le16_to_cpu(__raw_readw(addr));
log_post_read_mmio(val, 16, addr, _THIS_IP_);
return val;
} }
#endif #endif
@ -264,7 +319,12 @@ static inline u16 readw_relaxed(const volatile void __iomem *addr)
#define readl_relaxed readl_relaxed #define readl_relaxed readl_relaxed
static inline u32 readl_relaxed(const volatile void __iomem *addr) static inline u32 readl_relaxed(const volatile void __iomem *addr)
{ {
return __le32_to_cpu(__raw_readl(addr)); u32 val;
log_read_mmio(32, addr, _THIS_IP_);
val = __le32_to_cpu(__raw_readl(addr));
log_post_read_mmio(val, 32, addr, _THIS_IP_);
return val;
} }
#endif #endif
@ -272,7 +332,12 @@ static inline u32 readl_relaxed(const volatile void __iomem *addr)
#define readq_relaxed readq_relaxed #define readq_relaxed readq_relaxed
static inline u64 readq_relaxed(const volatile void __iomem *addr) static inline u64 readq_relaxed(const volatile void __iomem *addr)
{ {
return __le64_to_cpu(__raw_readq(addr)); u64 val;
log_read_mmio(64, addr, _THIS_IP_);
val =__le64_to_cpu(__raw_readq(addr));
log_post_read_mmio(val, 64, addr, _THIS_IP_);
return val;
} }
#endif #endif
@ -280,7 +345,9 @@ static inline u64 readq_relaxed(const volatile void __iomem *addr)
#define writeb_relaxed writeb_relaxed #define writeb_relaxed writeb_relaxed
static inline void writeb_relaxed(u8 value, volatile void __iomem *addr) static inline void writeb_relaxed(u8 value, volatile void __iomem *addr)
{ {
log_write_mmio(value, 8, addr, _THIS_IP_);
__raw_writeb(value, addr); __raw_writeb(value, addr);
log_post_write_mmio(value, 8, addr, _THIS_IP_);
} }
#endif #endif
@ -288,7 +355,9 @@ static inline void writeb_relaxed(u8 value, volatile void __iomem *addr)
#define writew_relaxed writew_relaxed #define writew_relaxed writew_relaxed
static inline void writew_relaxed(u16 value, volatile void __iomem *addr) static inline void writew_relaxed(u16 value, volatile void __iomem *addr)
{ {
log_write_mmio(value, 16, addr, _THIS_IP_);
__raw_writew(cpu_to_le16(value), addr); __raw_writew(cpu_to_le16(value), addr);
log_post_write_mmio(value, 16, addr, _THIS_IP_);
} }
#endif #endif
@ -296,7 +365,9 @@ static inline void writew_relaxed(u16 value, volatile void __iomem *addr)
#define writel_relaxed writel_relaxed #define writel_relaxed writel_relaxed
static inline void writel_relaxed(u32 value, volatile void __iomem *addr) static inline void writel_relaxed(u32 value, volatile void __iomem *addr)
{ {
log_write_mmio(value, 32, addr, _THIS_IP_);
__raw_writel(__cpu_to_le32(value), addr); __raw_writel(__cpu_to_le32(value), addr);
log_post_write_mmio(value, 32, addr, _THIS_IP_);
} }
#endif #endif
@ -304,7 +375,9 @@ static inline void writel_relaxed(u32 value, volatile void __iomem *addr)
#define writeq_relaxed writeq_relaxed #define writeq_relaxed writeq_relaxed
static inline void writeq_relaxed(u64 value, volatile void __iomem *addr) static inline void writeq_relaxed(u64 value, volatile void __iomem *addr)
{ {
log_write_mmio(value, 64, addr, _THIS_IP_);
__raw_writeq(__cpu_to_le64(value), addr); __raw_writeq(__cpu_to_le64(value), addr);
log_post_write_mmio(value, 64, addr, _THIS_IP_);
} }
#endif #endif