[BNX2]: Fix register and memory test on 5709.
Tweak registers and memory test range for 5709. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -3763,10 +3763,11 @@ static int
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bnx2_test_registers(struct bnx2 *bp)
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bnx2_test_registers(struct bnx2 *bp)
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{
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{
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int ret;
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int ret;
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int i;
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int i, is_5709;
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static const struct {
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static const struct {
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u16 offset;
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u16 offset;
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u16 flags;
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u16 flags;
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#define BNX2_FL_NOT_5709 1
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u32 rw_mask;
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u32 rw_mask;
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u32 ro_mask;
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u32 ro_mask;
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} reg_tbl[] = {
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} reg_tbl[] = {
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@ -3774,26 +3775,26 @@ bnx2_test_registers(struct bnx2 *bp)
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{ 0x0090, 0, 0xffffffff, 0x00000000 },
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{ 0x0090, 0, 0xffffffff, 0x00000000 },
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{ 0x0094, 0, 0x00000000, 0x00000000 },
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{ 0x0094, 0, 0x00000000, 0x00000000 },
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{ 0x0404, 0, 0x00003f00, 0x00000000 },
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{ 0x0404, BNX2_FL_NOT_5709, 0x00003f00, 0x00000000 },
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{ 0x0418, 0, 0x00000000, 0xffffffff },
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{ 0x0418, BNX2_FL_NOT_5709, 0x00000000, 0xffffffff },
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{ 0x041c, 0, 0x00000000, 0xffffffff },
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{ 0x041c, BNX2_FL_NOT_5709, 0x00000000, 0xffffffff },
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{ 0x0420, 0, 0x00000000, 0x80ffffff },
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{ 0x0420, BNX2_FL_NOT_5709, 0x00000000, 0x80ffffff },
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{ 0x0424, 0, 0x00000000, 0x00000000 },
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{ 0x0424, BNX2_FL_NOT_5709, 0x00000000, 0x00000000 },
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{ 0x0428, 0, 0x00000000, 0x00000001 },
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{ 0x0428, BNX2_FL_NOT_5709, 0x00000000, 0x00000001 },
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{ 0x0450, 0, 0x00000000, 0x0000ffff },
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{ 0x0450, BNX2_FL_NOT_5709, 0x00000000, 0x0000ffff },
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{ 0x0454, 0, 0x00000000, 0xffffffff },
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{ 0x0454, BNX2_FL_NOT_5709, 0x00000000, 0xffffffff },
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{ 0x0458, 0, 0x00000000, 0xffffffff },
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{ 0x0458, BNX2_FL_NOT_5709, 0x00000000, 0xffffffff },
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{ 0x0808, 0, 0x00000000, 0xffffffff },
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{ 0x0808, BNX2_FL_NOT_5709, 0x00000000, 0xffffffff },
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{ 0x0854, 0, 0x00000000, 0xffffffff },
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{ 0x0854, BNX2_FL_NOT_5709, 0x00000000, 0xffffffff },
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{ 0x0868, 0, 0x00000000, 0x77777777 },
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{ 0x0868, BNX2_FL_NOT_5709, 0x00000000, 0x77777777 },
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{ 0x086c, 0, 0x00000000, 0x77777777 },
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{ 0x086c, BNX2_FL_NOT_5709, 0x00000000, 0x77777777 },
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{ 0x0870, 0, 0x00000000, 0x77777777 },
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{ 0x0870, BNX2_FL_NOT_5709, 0x00000000, 0x77777777 },
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{ 0x0874, 0, 0x00000000, 0x77777777 },
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{ 0x0874, BNX2_FL_NOT_5709, 0x00000000, 0x77777777 },
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{ 0x0c00, 0, 0x00000000, 0x00000001 },
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{ 0x0c00, BNX2_FL_NOT_5709, 0x00000000, 0x00000001 },
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{ 0x0c04, 0, 0x00000000, 0x03ff0001 },
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{ 0x0c04, BNX2_FL_NOT_5709, 0x00000000, 0x03ff0001 },
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{ 0x0c08, 0, 0x0f0ff073, 0x00000000 },
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{ 0x0c08, BNX2_FL_NOT_5709, 0x0f0ff073, 0x00000000 },
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{ 0x1000, 0, 0x00000000, 0x00000001 },
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{ 0x1000, 0, 0x00000000, 0x00000001 },
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{ 0x1004, 0, 0x00000000, 0x000f0001 },
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{ 0x1004, 0, 0x00000000, 0x000f0001 },
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@ -3840,7 +3841,6 @@ bnx2_test_registers(struct bnx2 *bp)
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{ 0x5004, 0, 0x00000000, 0x0000007f },
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{ 0x5004, 0, 0x00000000, 0x0000007f },
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{ 0x5008, 0, 0x0f0007ff, 0x00000000 },
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{ 0x5008, 0, 0x0f0007ff, 0x00000000 },
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{ 0x500c, 0, 0xf800f800, 0x07ff07ff },
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{ 0x5c00, 0, 0x00000000, 0x00000001 },
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{ 0x5c00, 0, 0x00000000, 0x00000001 },
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{ 0x5c04, 0, 0x00000000, 0x0003000f },
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{ 0x5c04, 0, 0x00000000, 0x0003000f },
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@ -3880,8 +3880,16 @@ bnx2_test_registers(struct bnx2 *bp)
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};
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};
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ret = 0;
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ret = 0;
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is_5709 = 0;
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if (CHIP_NUM(bp) == CHIP_NUM_5709)
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is_5709 = 1;
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for (i = 0; reg_tbl[i].offset != 0xffff; i++) {
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for (i = 0; reg_tbl[i].offset != 0xffff; i++) {
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u32 offset, rw_mask, ro_mask, save_val, val;
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u32 offset, rw_mask, ro_mask, save_val, val;
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u16 flags = reg_tbl[i].flags;
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if (is_5709 && (flags & BNX2_FL_NOT_5709))
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continue;
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offset = (u32) reg_tbl[i].offset;
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offset = (u32) reg_tbl[i].offset;
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rw_mask = reg_tbl[i].rw_mask;
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rw_mask = reg_tbl[i].rw_mask;
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@ -3950,10 +3958,10 @@ bnx2_test_memory(struct bnx2 *bp)
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{
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{
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int ret = 0;
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int ret = 0;
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int i;
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int i;
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static const struct {
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static struct mem_entry {
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u32 offset;
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u32 offset;
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u32 len;
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u32 len;
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} mem_tbl[] = {
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} mem_tbl_5706[] = {
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{ 0x60000, 0x4000 },
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{ 0x60000, 0x4000 },
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{ 0xa0000, 0x3000 },
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{ 0xa0000, 0x3000 },
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{ 0xe0000, 0x4000 },
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{ 0xe0000, 0x4000 },
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@ -3961,7 +3969,21 @@ bnx2_test_memory(struct bnx2 *bp)
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{ 0x1a0000, 0x4000 },
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{ 0x1a0000, 0x4000 },
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{ 0x160000, 0x4000 },
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{ 0x160000, 0x4000 },
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{ 0xffffffff, 0 },
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{ 0xffffffff, 0 },
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},
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mem_tbl_5709[] = {
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{ 0x60000, 0x4000 },
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{ 0xa0000, 0x3000 },
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{ 0xe0000, 0x4000 },
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{ 0x120000, 0x4000 },
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{ 0x1a0000, 0x4000 },
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{ 0xffffffff, 0 },
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};
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};
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struct mem_entry *mem_tbl;
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if (CHIP_NUM(bp) == CHIP_NUM_5709)
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mem_tbl = mem_tbl_5709;
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else
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mem_tbl = mem_tbl_5706;
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for (i = 0; mem_tbl[i].offset != 0xffffffff; i++) {
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for (i = 0; mem_tbl[i].offset != 0xffffffff; i++) {
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if ((ret = bnx2_do_mem_test(bp, mem_tbl[i].offset,
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if ((ret = bnx2_do_mem_test(bp, mem_tbl[i].offset,
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