Allwinner Fixes for 4.7

Two patches fixing simplefb on the SoCs that had their display clocks
 enabled, and one fix for the CHIP that will enable its sched clock.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJXerPiAAoJEBx+YmzsjxAgqYQQAKSnJgsTtxJ2XiE96IiQtvuC
 V1oU4AhDgTji3+wAuBgdjj2nYCeph/ex4V6rwdQsBTwshSStms61+uotQnbNHpme
 EPKJLkmhQhfuRA7lol7TXSPMUDDxehDtV3u5oPTUezed385PucKNbV0Kcm+DyHr/
 2e8GIe6/IGtReixSp+aaB4ezX3jgTO6pE2EoU7HCpsyuSBHFTaCyDQvekAUp/5zJ
 T4W6sktCL0nQTtZXzmQZlWYvTmnlkUK3/yvhYXRp69NXvD0qyZlhW8N4AA7R3FaE
 QoKZp0Vupm9RYa4By5LsxbqoRKDaeMMxKGSnnJ88sL15RAbU/AJhJ4HJXlMUup86
 TNi7sPEGbpxMpMk2G9QgcenpiclU/k8rQ7veoCTZzE0z8PYeN64ZIlHqqi5sc9LZ
 CFj7IEKsUfdt6oioszfdNMfnCOs1lgDXZOP1oQSfIRIG3QYqwFkKj9rGjA3FLGiL
 GRsl5j+RGPfFNZSqmuaK/FZenf4hIdljJHfJEjkLmIVUtco5ZcW2TRPhB0Ns2Qkl
 rb3x8J0+rsffARQyp9Oe2JKjFK8nt848dZVZexpYjFc6l/PDLSBYWse/nvVE1O7k
 CgNYGa4u49b7P7o4NAspRFQYCMZIEx24k1Q/yVawpJcLNYARlUvPDupRfztVQtOE
 CJsQdSEItn0CVYRehZEc
 =tU7Y
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-fixes-for-4.7' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into fixes

Pull "Allwinner Fixes for 4.7" from Maxime Ripard:

Two patches fixing simplefb on the SoCs that had their display clocks
enabled, and one fix for the CHIP that will enable its sched clock.

* tag 'sunxi-fixes-for-4.7' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
  ARM: dts: sun7i: Fix pll3x2 and pll7x2 not having a parent clock
  ARM: dts: sunxi: Add pll3 to simplefb nodes clocks lists
  ARM: sunxi/dt: make the CHIP inherit from allwinner,sun5i-a13
This commit is contained in:
Arnd Bergmann 2016-07-05 15:55:12 +02:00
commit 600da64b77
4 changed files with 27 additions and 20 deletions

View File

@ -65,8 +65,9 @@ framebuffer@0 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-hdmi";
clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
<&ahb_gates 44>, <&dram_gates 26>;
clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
<&ahb_gates 43>, <&ahb_gates 44>,
<&dram_gates 26>;
status = "disabled";
};
@ -74,8 +75,9 @@ framebuffer@1 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_fe0-de_be0-lcd0-hdmi";
clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
<&ahb_gates 44>, <&ahb_gates 46>,
clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
<&ahb_gates 43>, <&ahb_gates 44>,
<&ahb_gates 46>,
<&dram_gates 25>, <&dram_gates 26>;
status = "disabled";
};
@ -84,9 +86,9 @@ framebuffer@2 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_fe0-de_be0-lcd0";
clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>,
<&ahb_gates 46>, <&dram_gates 25>,
<&dram_gates 26>;
clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
<&ahb_gates 44>, <&ahb_gates 46>,
<&dram_gates 25>, <&dram_gates 26>;
status = "disabled";
};
@ -94,8 +96,9 @@ framebuffer@3 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_fe0-de_be0-lcd0-tve0";
clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>,
<&ahb_gates 44>, <&ahb_gates 46>,
clocks = <&pll3>, <&pll5 1>, <&ahb_gates 34>,
<&ahb_gates 36>, <&ahb_gates 44>,
<&ahb_gates 46>,
<&dram_gates 5>, <&dram_gates 25>, <&dram_gates 26>;
status = "disabled";
};

View File

@ -65,8 +65,8 @@ framebuffer@0 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-hdmi";
clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
<&ahb_gates 44>;
clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
<&ahb_gates 43>, <&ahb_gates 44>;
status = "disabled";
};
@ -74,7 +74,8 @@ framebuffer@1 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0";
clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
<&ahb_gates 44>;
status = "disabled";
};
@ -82,8 +83,8 @@ framebuffer@2 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-tve0";
clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>,
<&ahb_gates 44>;
clocks = <&pll3>, <&pll5 1>, <&ahb_gates 34>,
<&ahb_gates 36>, <&ahb_gates 44>;
status = "disabled";
};
};

View File

@ -52,7 +52,7 @@
/ {
model = "NextThing C.H.I.P.";
compatible = "nextthing,chip", "allwinner,sun5i-r8";
compatible = "nextthing,chip", "allwinner,sun5i-r8", "allwinner,sun5i-a13";
aliases {
i2c0 = &i2c0;

View File

@ -67,8 +67,9 @@ framebuffer@0 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-hdmi";
clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
<&ahb_gates 44>, <&dram_gates 26>;
clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
<&ahb_gates 43>, <&ahb_gates 44>,
<&dram_gates 26>;
status = "disabled";
};
@ -76,8 +77,8 @@ framebuffer@1 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0";
clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>,
<&dram_gates 26>;
clocks = <&pll3>, <&pll5 1>, <&ahb_gates 36>,
<&ahb_gates 44>, <&dram_gates 26>;
status = "disabled";
};
@ -85,7 +86,7 @@ framebuffer@2 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-tve0";
clocks = <&pll5 1>,
clocks = <&pll3>, <&pll5 1>,
<&ahb_gates 34>, <&ahb_gates 36>, <&ahb_gates 44>,
<&dram_gates 5>, <&dram_gates 26>;
status = "disabled";
@ -231,6 +232,7 @@ pll3: clk@01c20010 {
pll3x2: pll3x2_clk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&pll3>;
clock-div = <1>;
clock-mult = <2>;
clock-output-names = "pll3-2x";
@ -272,6 +274,7 @@ pll7: clk@01c20030 {
pll7x2: pll7x2_clk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&pll7>;
clock-div = <1>;
clock-mult = <2>;
clock-output-names = "pll7-2x";