openkylin
/
platform_kernel-5.15
mirror of https://gitee.com/openkylin/platform_kernel-5.15.git
9
0
Fork 0
Code Issues Projects Releases Wiki Activity

ARM: OMAP4+: Add prm and cm base init function. 

Instead of statically defining seperate arrays for every OMAP4+ archs,
have a generic init function to populate the arrays. This avoids the
need for creating new array for every arch added in the future that
reuses the prm and cm registers read/write code.

Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This commit is contained in:
R Sricharan 2012-05-07 23:55:22 -06:00 committed by Paul Walmsley
parent 444b3df6b3
commit 610eb8c218
6 changed files with 57 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
arch/arm/mach-omap2/cminst44xx.c
View File

@ -32,6 +32,7 @@
#include "prcm44xx.h" #include "prcm44xx.h"
#include "prm44xx.h" #include "prm44xx.h"
#include "prcm_mpu44xx.h" #include "prcm_mpu44xx.h"
#include "prcm-common.h"
/* /*
* CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield: * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield:
@ -49,14 +50,21 @@
#define CLKCTRL_IDLEST_INTERFACE_IDLE 0x2 #define CLKCTRL_IDLEST_INTERFACE_IDLE 0x2
#define CLKCTRL_IDLEST_DISABLED 0x3 #define CLKCTRL_IDLEST_DISABLED 0x3
static u32 _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = { static void __iomem *_cm_bases[OMAP4_MAX_PRCM_PARTITIONS];
[OMAP4430_INVALID_PRCM_PARTITION] = 0,
[OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE, /**
[OMAP4430_CM1_PARTITION] = OMAP4430_CM1_BASE, * omap_cm_base_init - Populates the cm partitions
[OMAP4430_CM2_PARTITION] = OMAP4430_CM2_BASE, *
[OMAP4430_SCRM_PARTITION] = 0, * Populates the base addresses of the _cm_bases
[OMAP4430_PRCM_MPU_PARTITION] = OMAP4430_PRCM_MPU_BASE, * array used for read/write of cm module registers.
}; */
void omap_cm_base_init(void)
{
_cm_bases[OMAP4430_PRM_PARTITION] = prm_base;
_cm_bases[OMAP4430_CM1_PARTITION] = cm_base;
_cm_bases[OMAP4430_CM2_PARTITION] = cm2_base;
_cm_bases[OMAP4430_PRCM_MPU_PARTITION] = prcm_mpu_base;
}
/* Private functions */ /* Private functions */
@ -106,7 +114,7 @@ u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx)
BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
part == OMAP4430_INVALID_PRCM_PARTITION || part == OMAP4430_INVALID_PRCM_PARTITION ||
!_cm_bases[part]); !_cm_bases[part]);
return __raw_readl(OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst + idx)); return __raw_readl(_cm_bases[part] + inst + idx);
} }
/* Write into a register in a CM instance */ /* Write into a register in a CM instance */
@ -115,7 +123,7 @@ void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx)
BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
part == OMAP4430_INVALID_PRCM_PARTITION || part == OMAP4430_INVALID_PRCM_PARTITION ||
!_cm_bases[part]); !_cm_bases[part]);
__raw_writel(val, OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst + idx)); __raw_writel(val, _cm_bases[part] + inst + idx);
} }
/* Read-modify-write a register in CM1. Caller must lock */ /* Read-modify-write a register in CM1. Caller must lock */

1
arch/arm/mach-omap2/common.c
View File

@ -166,6 +166,7 @@ static struct omap_globals omap4_globals = {
.prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE), .prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
.cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE), .cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
.cm2 = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE), .cm2 = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE),
.prcm_mpu = OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE),
}; };
void __init omap2_set_globals_443x(void) void __init omap2_set_globals_443x(void)

1
arch/arm/mach-omap2/common.h
View File

@ -111,6 +111,7 @@ struct omap_globals {
void __iomem *prm; /* Power and Reset Management */ void __iomem *prm; /* Power and Reset Management */
void __iomem *cm; /* Clock Management */ void __iomem *cm; /* Clock Management */
void __iomem *cm2; void __iomem *cm2;
void __iomem *prcm_mpu;
}; };
void omap2_set_globals_242x(void); void omap2_set_globals_242x(void);

13
arch/arm/mach-omap2/prcm-common.h
View File

@ -414,6 +414,19 @@
extern void __iomem *prm_base; extern void __iomem *prm_base;
extern void __iomem *cm_base; extern void __iomem *cm_base;
extern void __iomem *cm2_base; extern void __iomem *cm2_base;
extern void __iomem *prcm_mpu_base;
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_ARCH_OMAP5)
extern void omap_prm_base_init(void);
extern void omap_cm_base_init(void);
#else
static inline void omap_prm_base_init(void)
{
}
static inline void omap_cm_base_init(void)
{
}
#endif
/** /**
* struct omap_prcm_irq - describes a PRCM interrupt bit * struct omap_prcm_irq - describes a PRCM interrupt bit

8
arch/arm/mach-omap2/prcm.c
View File

@ -42,6 +42,7 @@
void __iomem *prm_base; void __iomem *prm_base;
void __iomem *cm_base; void __iomem *cm_base;
void __iomem *cm2_base; void __iomem *cm2_base;
void __iomem *prcm_mpu_base;
#define MAX_MODULE_ENABLE_WAIT 100000 #define MAX_MODULE_ENABLE_WAIT 100000
@ -155,4 +156,11 @@ void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals)
cm_base = omap2_globals->cm; cm_base = omap2_globals->cm;
if (omap2_globals->cm2) if (omap2_globals->cm2)
cm2_base = omap2_globals->cm2; cm2_base = omap2_globals->cm2;
if (omap2_globals->prcm_mpu)
prcm_mpu_base = omap2_globals->prcm_mpu;
if (cpu_is_omap44xx()) {
omap_prm_base_init();
omap_cm_base_init();
}
} }

27
arch/arm/mach-omap2/prminst44xx.c
View File

@ -18,20 +18,26 @@
#include "iomap.h" #include "iomap.h"
#include "common.h" #include "common.h"
#include "prcm-common.h"
#include "prm44xx.h" #include "prm44xx.h"
#include "prminst44xx.h" #include "prminst44xx.h"
#include "prm-regbits-44xx.h" #include "prm-regbits-44xx.h"
#include "prcm44xx.h" #include "prcm44xx.h"
#include "prcm_mpu44xx.h" #include "prcm_mpu44xx.h"
static u32 _prm_bases[OMAP4_MAX_PRCM_PARTITIONS] = { static void __iomem *_prm_bases[OMAP4_MAX_PRCM_PARTITIONS];
[OMAP4430_INVALID_PRCM_PARTITION] = 0,
[OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE, /**
[OMAP4430_CM1_PARTITION] = 0, * omap_prm_base_init - Populates the prm partitions
[OMAP4430_CM2_PARTITION] = 0, *
[OMAP4430_SCRM_PARTITION] = 0, * Populates the base addresses of the _prm_bases
[OMAP4430_PRCM_MPU_PARTITION] = OMAP4430_PRCM_MPU_BASE, * array used for read/write of prm module registers.
}; */
void omap_prm_base_init(void)
{
_prm_bases[OMAP4430_PRM_PARTITION] = prm_base;
_prm_bases[OMAP4430_PRCM_MPU_PARTITION] = prcm_mpu_base;
}
/* Read a register in a PRM instance */ /* Read a register in a PRM instance */
u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx) u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx)
@ -39,8 +45,7 @@ u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx)
BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
part == OMAP4430_INVALID_PRCM_PARTITION || part == OMAP4430_INVALID_PRCM_PARTITION ||
!_prm_bases[part]); !_prm_bases[part]);
return __raw_readl(OMAP2_L4_IO_ADDRESS(_prm_bases[part] + inst + return __raw_readl(_prm_bases[part] + inst + idx);
idx));
} }
/* Write into a register in a PRM instance */ /* Write into a register in a PRM instance */
@ -49,7 +54,7 @@ void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx)
BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS || BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
part == OMAP4430_INVALID_PRCM_PARTITION || part == OMAP4430_INVALID_PRCM_PARTITION ||
!_prm_bases[part]); !_prm_bases[part]);
__raw_writel(val, OMAP2_L4_IO_ADDRESS(_prm_bases[part] + inst + idx)); __raw_writel(val, _prm_bases[part] + inst + idx);
} }
/* Read-modify-write a register in PRM. Caller must lock */ /* Read-modify-write a register in PRM. Caller must lock */