mlx5-fixes-2019-04-09
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Merge tag 'mlx5-fixes-2019-04-09' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux
Saeed Mahameed says:
====================
Mellanox, mlx5 fixes 2019-04-09
This series provides some fixes to mlx5 driver.
I've cc'ed some of the checksum fixes to Eric Dumazet and i would like to get
his feedback before you pull.
For -stable v4.19
('net/mlx5: FPGA, tls, idr remove on flow delete')
('net/mlx5: FPGA, tls, hold rcu read lock a bit longer')
For -stable v4.20
('net/mlx5e: Rx, Check ip headers sanity')
('Revert "net/mlx5e: Enable reporting checksum unnecessary also for L3 packets"')
('net/mlx5e: Rx, Fixup skb checksum for packets with tail padding')
For -stable v5.0
('net/mlx5e: Switch to Toeplitz RSS hash by default')
('net/mlx5e: Protect against non-uplink representor for encap')
('net/mlx5e: XDP, Avoid checksum complete when XDP prog is loaded')
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
commit
7324880182
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@ -858,6 +858,7 @@ void mlx5e_close_channels(struct mlx5e_channels *chs);
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* switching channels
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*/
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typedef int (*mlx5e_fp_hw_modify)(struct mlx5e_priv *priv);
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int mlx5e_safe_reopen_channels(struct mlx5e_priv *priv);
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int mlx5e_safe_switch_channels(struct mlx5e_priv *priv,
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struct mlx5e_channels *new_chs,
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mlx5e_fp_hw_modify hw_modify);
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@ -186,12 +186,17 @@ static int mlx5e_tx_reporter_recover_from_ctx(struct mlx5e_tx_err_ctx *err_ctx)
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static int mlx5e_tx_reporter_recover_all(struct mlx5e_priv *priv)
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{
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int err;
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int err = 0;
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rtnl_lock();
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mutex_lock(&priv->state_lock);
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mlx5e_close_locked(priv->netdev);
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err = mlx5e_open_locked(priv->netdev);
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if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
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goto out;
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err = mlx5e_safe_reopen_channels(priv);
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out:
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mutex_unlock(&priv->state_lock);
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rtnl_unlock();
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@ -39,6 +39,10 @@ static int get_route_and_out_devs(struct mlx5e_priv *priv,
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return -EOPNOTSUPP;
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}
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if (!(mlx5e_eswitch_rep(*out_dev) &&
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mlx5e_is_uplink_rep(netdev_priv(*out_dev))))
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return -EOPNOTSUPP;
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return 0;
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}
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@ -1768,7 +1768,8 @@ static int set_pflag_rx_no_csum_complete(struct net_device *netdev, bool enable)
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struct mlx5e_channel *c;
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int i;
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if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
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if (!test_bit(MLX5E_STATE_OPENED, &priv->state) ||
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priv->channels.params.xdp_prog)
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return 0;
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for (i = 0; i < channels->num; i++) {
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@ -951,7 +951,11 @@ static int mlx5e_open_rq(struct mlx5e_channel *c,
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if (params->rx_dim_enabled)
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__set_bit(MLX5E_RQ_STATE_AM, &c->rq.state);
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if (MLX5E_GET_PFLAG(params, MLX5E_PFLAG_RX_NO_CSUM_COMPLETE))
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/* We disable csum_complete when XDP is enabled since
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* XDP programs might manipulate packets which will render
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* skb->checksum incorrect.
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*/
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if (MLX5E_GET_PFLAG(params, MLX5E_PFLAG_RX_NO_CSUM_COMPLETE) || c->xdp)
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__set_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE, &c->rq.state);
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return 0;
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@ -2937,6 +2941,14 @@ int mlx5e_safe_switch_channels(struct mlx5e_priv *priv,
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return 0;
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}
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int mlx5e_safe_reopen_channels(struct mlx5e_priv *priv)
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{
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struct mlx5e_channels new_channels = {};
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new_channels.params = priv->channels.params;
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return mlx5e_safe_switch_channels(priv, &new_channels, NULL);
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}
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void mlx5e_timestamp_init(struct mlx5e_priv *priv)
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{
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priv->tstamp.tx_type = HWTSTAMP_TX_OFF;
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@ -4161,11 +4173,10 @@ static void mlx5e_tx_timeout_work(struct work_struct *work)
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if (!report_failed)
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goto unlock;
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mlx5e_close_locked(priv->netdev);
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err = mlx5e_open_locked(priv->netdev);
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err = mlx5e_safe_reopen_channels(priv);
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if (err)
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netdev_err(priv->netdev,
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"mlx5e_open_locked failed recovering from a tx_timeout, err(%d).\n",
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"mlx5e_safe_reopen_channels failed recovering from a tx_timeout, err(%d).\n",
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err);
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unlock:
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@ -4553,7 +4564,7 @@ void mlx5e_build_rss_params(struct mlx5e_rss_params *rss_params,
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{
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enum mlx5e_traffic_types tt;
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rss_params->hfunc = ETH_RSS_HASH_XOR;
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rss_params->hfunc = ETH_RSS_HASH_TOP;
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netdev_rss_key_fill(rss_params->toeplitz_hash_key,
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sizeof(rss_params->toeplitz_hash_key));
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mlx5e_build_default_indir_rqt(rss_params->indirection_rqt,
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@ -692,7 +692,14 @@ static inline bool is_last_ethertype_ip(struct sk_buff *skb, int *network_depth,
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{
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*proto = ((struct ethhdr *)skb->data)->h_proto;
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*proto = __vlan_get_protocol(skb, *proto, network_depth);
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return (*proto == htons(ETH_P_IP) || *proto == htons(ETH_P_IPV6));
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if (*proto == htons(ETH_P_IP))
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return pskb_may_pull(skb, *network_depth + sizeof(struct iphdr));
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if (*proto == htons(ETH_P_IPV6))
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return pskb_may_pull(skb, *network_depth + sizeof(struct ipv6hdr));
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return false;
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}
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static inline void mlx5e_enable_ecn(struct mlx5e_rq *rq, struct sk_buff *skb)
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@ -712,17 +719,6 @@ static inline void mlx5e_enable_ecn(struct mlx5e_rq *rq, struct sk_buff *skb)
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rq->stats->ecn_mark += !!rc;
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}
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static u32 mlx5e_get_fcs(const struct sk_buff *skb)
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{
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const void *fcs_bytes;
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u32 _fcs_bytes;
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fcs_bytes = skb_header_pointer(skb, skb->len - ETH_FCS_LEN,
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ETH_FCS_LEN, &_fcs_bytes);
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return __get_unaligned_cpu32(fcs_bytes);
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}
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static u8 get_ip_proto(struct sk_buff *skb, int network_depth, __be16 proto)
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{
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void *ip_p = skb->data + network_depth;
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@ -733,6 +729,68 @@ static u8 get_ip_proto(struct sk_buff *skb, int network_depth, __be16 proto)
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#define short_frame(size) ((size) <= ETH_ZLEN + ETH_FCS_LEN)
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#define MAX_PADDING 8
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static void
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tail_padding_csum_slow(struct sk_buff *skb, int offset, int len,
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struct mlx5e_rq_stats *stats)
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{
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stats->csum_complete_tail_slow++;
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skb->csum = csum_block_add(skb->csum,
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skb_checksum(skb, offset, len, 0),
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offset);
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}
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static void
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tail_padding_csum(struct sk_buff *skb, int offset,
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struct mlx5e_rq_stats *stats)
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{
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u8 tail_padding[MAX_PADDING];
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int len = skb->len - offset;
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void *tail;
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if (unlikely(len > MAX_PADDING)) {
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tail_padding_csum_slow(skb, offset, len, stats);
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return;
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}
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tail = skb_header_pointer(skb, offset, len, tail_padding);
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if (unlikely(!tail)) {
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tail_padding_csum_slow(skb, offset, len, stats);
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return;
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}
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stats->csum_complete_tail++;
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skb->csum = csum_block_add(skb->csum, csum_partial(tail, len, 0), offset);
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}
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static void
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mlx5e_skb_padding_csum(struct sk_buff *skb, int network_depth, __be16 proto,
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struct mlx5e_rq_stats *stats)
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{
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struct ipv6hdr *ip6;
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struct iphdr *ip4;
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int pkt_len;
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switch (proto) {
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case htons(ETH_P_IP):
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ip4 = (struct iphdr *)(skb->data + network_depth);
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pkt_len = network_depth + ntohs(ip4->tot_len);
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break;
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case htons(ETH_P_IPV6):
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ip6 = (struct ipv6hdr *)(skb->data + network_depth);
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pkt_len = network_depth + sizeof(*ip6) + ntohs(ip6->payload_len);
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break;
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default:
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return;
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}
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if (likely(pkt_len >= skb->len))
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return;
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tail_padding_csum(skb, pkt_len, stats);
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}
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static inline void mlx5e_handle_csum(struct net_device *netdev,
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struct mlx5_cqe64 *cqe,
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struct mlx5e_rq *rq,
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@ -752,7 +810,8 @@ static inline void mlx5e_handle_csum(struct net_device *netdev,
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return;
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}
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if (unlikely(test_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE, &rq->state)))
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/* True when explicitly set via priv flag, or XDP prog is loaded */
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if (test_bit(MLX5E_RQ_STATE_NO_CSUM_COMPLETE, &rq->state))
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goto csum_unnecessary;
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/* CQE csum doesn't cover padding octets in short ethernet
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@ -780,18 +839,15 @@ static inline void mlx5e_handle_csum(struct net_device *netdev,
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skb->csum = csum_partial(skb->data + ETH_HLEN,
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network_depth - ETH_HLEN,
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skb->csum);
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if (unlikely(netdev->features & NETIF_F_RXFCS))
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skb->csum = csum_block_add(skb->csum,
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(__force __wsum)mlx5e_get_fcs(skb),
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skb->len - ETH_FCS_LEN);
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mlx5e_skb_padding_csum(skb, network_depth, proto, stats);
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stats->csum_complete++;
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return;
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}
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csum_unnecessary:
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if (likely((cqe->hds_ip_ext & CQE_L3_OK) &&
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((cqe->hds_ip_ext & CQE_L4_OK) ||
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(get_cqe_l4_hdr_type(cqe) == CQE_L4_HDR_TYPE_NONE)))) {
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(cqe->hds_ip_ext & CQE_L4_OK))) {
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skb->ip_summed = CHECKSUM_UNNECESSARY;
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if (cqe_is_tunneled(cqe)) {
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skb->csum_level = 1;
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@ -59,6 +59,8 @@ static const struct counter_desc sw_stats_desc[] = {
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{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_unnecessary) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_none) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_complete) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_complete_tail) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_complete_tail_slow) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_csum_unnecessary_inner) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_drop) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_xdp_redirect) },
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@ -151,6 +153,8 @@ static void mlx5e_grp_sw_update_stats(struct mlx5e_priv *priv)
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s->rx_removed_vlan_packets += rq_stats->removed_vlan_packets;
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s->rx_csum_none += rq_stats->csum_none;
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s->rx_csum_complete += rq_stats->csum_complete;
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s->rx_csum_complete_tail += rq_stats->csum_complete_tail;
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s->rx_csum_complete_tail_slow += rq_stats->csum_complete_tail_slow;
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s->rx_csum_unnecessary += rq_stats->csum_unnecessary;
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s->rx_csum_unnecessary_inner += rq_stats->csum_unnecessary_inner;
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s->rx_xdp_drop += rq_stats->xdp_drop;
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@ -1190,6 +1194,8 @@ static const struct counter_desc rq_stats_desc[] = {
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{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, packets) },
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{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, bytes) },
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{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_complete) },
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{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_complete_tail) },
|
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{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_complete_tail_slow) },
|
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{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_unnecessary) },
|
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{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_unnecessary_inner) },
|
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{ MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, csum_none) },
|
||||
|
|
|
|||
|
|
@ -71,6 +71,8 @@ struct mlx5e_sw_stats {
|
|||
u64 rx_csum_unnecessary;
|
||||
u64 rx_csum_none;
|
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u64 rx_csum_complete;
|
||||
u64 rx_csum_complete_tail;
|
||||
u64 rx_csum_complete_tail_slow;
|
||||
u64 rx_csum_unnecessary_inner;
|
||||
u64 rx_xdp_drop;
|
||||
u64 rx_xdp_redirect;
|
||||
|
|
@ -181,6 +183,8 @@ struct mlx5e_rq_stats {
|
|||
u64 packets;
|
||||
u64 bytes;
|
||||
u64 csum_complete;
|
||||
u64 csum_complete_tail;
|
||||
u64 csum_complete_tail_slow;
|
||||
u64 csum_unnecessary;
|
||||
u64 csum_unnecessary_inner;
|
||||
u64 csum_none;
|
||||
|
|
|
|||
|
|
@ -148,14 +148,16 @@ static int mlx5_fpga_tls_alloc_swid(struct idr *idr, spinlock_t *idr_spinlock,
|
|||
return ret;
|
||||
}
|
||||
|
||||
static void mlx5_fpga_tls_release_swid(struct idr *idr,
|
||||
spinlock_t *idr_spinlock, u32 swid)
|
||||
static void *mlx5_fpga_tls_release_swid(struct idr *idr,
|
||||
spinlock_t *idr_spinlock, u32 swid)
|
||||
{
|
||||
unsigned long flags;
|
||||
void *ptr;
|
||||
|
||||
spin_lock_irqsave(idr_spinlock, flags);
|
||||
idr_remove(idr, swid);
|
||||
ptr = idr_remove(idr, swid);
|
||||
spin_unlock_irqrestore(idr_spinlock, flags);
|
||||
return ptr;
|
||||
}
|
||||
|
||||
static void mlx_tls_kfree_complete(struct mlx5_fpga_conn *conn,
|
||||
|
|
@ -165,20 +167,12 @@ static void mlx_tls_kfree_complete(struct mlx5_fpga_conn *conn,
|
|||
kfree(buf);
|
||||
}
|
||||
|
||||
struct mlx5_teardown_stream_context {
|
||||
struct mlx5_fpga_tls_command_context cmd;
|
||||
u32 swid;
|
||||
};
|
||||
|
||||
static void
|
||||
mlx5_fpga_tls_teardown_completion(struct mlx5_fpga_conn *conn,
|
||||
struct mlx5_fpga_device *fdev,
|
||||
struct mlx5_fpga_tls_command_context *cmd,
|
||||
struct mlx5_fpga_dma_buf *resp)
|
||||
{
|
||||
struct mlx5_teardown_stream_context *ctx =
|
||||
container_of(cmd, struct mlx5_teardown_stream_context, cmd);
|
||||
|
||||
if (resp) {
|
||||
u32 syndrome = MLX5_GET(tls_resp, resp->sg[0].data, syndrome);
|
||||
|
||||
|
|
@ -186,14 +180,6 @@ mlx5_fpga_tls_teardown_completion(struct mlx5_fpga_conn *conn,
|
|||
mlx5_fpga_err(fdev,
|
||||
"Teardown stream failed with syndrome = %d",
|
||||
syndrome);
|
||||
else if (MLX5_GET(tls_cmd, cmd->buf.sg[0].data, direction_sx))
|
||||
mlx5_fpga_tls_release_swid(&fdev->tls->tx_idr,
|
||||
&fdev->tls->tx_idr_spinlock,
|
||||
ctx->swid);
|
||||
else
|
||||
mlx5_fpga_tls_release_swid(&fdev->tls->rx_idr,
|
||||
&fdev->tls->rx_idr_spinlock,
|
||||
ctx->swid);
|
||||
}
|
||||
mlx5_fpga_tls_put_command_ctx(cmd);
|
||||
}
|
||||
|
|
@ -217,22 +203,22 @@ int mlx5_fpga_tls_resync_rx(struct mlx5_core_dev *mdev, u32 handle, u32 seq,
|
|||
void *cmd;
|
||||
int ret;
|
||||
|
||||
rcu_read_lock();
|
||||
flow = idr_find(&mdev->fpga->tls->rx_idr, ntohl(handle));
|
||||
rcu_read_unlock();
|
||||
|
||||
if (!flow) {
|
||||
WARN_ONCE(1, "Received NULL pointer for handle\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
buf = kzalloc(size, GFP_ATOMIC);
|
||||
if (!buf)
|
||||
return -ENOMEM;
|
||||
|
||||
cmd = (buf + 1);
|
||||
|
||||
rcu_read_lock();
|
||||
flow = idr_find(&mdev->fpga->tls->rx_idr, ntohl(handle));
|
||||
if (unlikely(!flow)) {
|
||||
rcu_read_unlock();
|
||||
WARN_ONCE(1, "Received NULL pointer for handle\n");
|
||||
kfree(buf);
|
||||
return -EINVAL;
|
||||
}
|
||||
mlx5_fpga_tls_flow_to_cmd(flow, cmd);
|
||||
rcu_read_unlock();
|
||||
|
||||
MLX5_SET(tls_cmd, cmd, swid, ntohl(handle));
|
||||
MLX5_SET64(tls_cmd, cmd, tls_rcd_sn, be64_to_cpu(rcd_sn));
|
||||
|
|
@ -253,7 +239,7 @@ int mlx5_fpga_tls_resync_rx(struct mlx5_core_dev *mdev, u32 handle, u32 seq,
|
|||
static void mlx5_fpga_tls_send_teardown_cmd(struct mlx5_core_dev *mdev,
|
||||
void *flow, u32 swid, gfp_t flags)
|
||||
{
|
||||
struct mlx5_teardown_stream_context *ctx;
|
||||
struct mlx5_fpga_tls_command_context *ctx;
|
||||
struct mlx5_fpga_dma_buf *buf;
|
||||
void *cmd;
|
||||
|
||||
|
|
@ -261,7 +247,7 @@ static void mlx5_fpga_tls_send_teardown_cmd(struct mlx5_core_dev *mdev,
|
|||
if (!ctx)
|
||||
return;
|
||||
|
||||
buf = &ctx->cmd.buf;
|
||||
buf = &ctx->buf;
|
||||
cmd = (ctx + 1);
|
||||
MLX5_SET(tls_cmd, cmd, command_type, CMD_TEARDOWN_STREAM);
|
||||
MLX5_SET(tls_cmd, cmd, swid, swid);
|
||||
|
|
@ -272,8 +258,7 @@ static void mlx5_fpga_tls_send_teardown_cmd(struct mlx5_core_dev *mdev,
|
|||
buf->sg[0].data = cmd;
|
||||
buf->sg[0].size = MLX5_TLS_COMMAND_SIZE;
|
||||
|
||||
ctx->swid = swid;
|
||||
mlx5_fpga_tls_cmd_send(mdev->fpga, &ctx->cmd,
|
||||
mlx5_fpga_tls_cmd_send(mdev->fpga, ctx,
|
||||
mlx5_fpga_tls_teardown_completion);
|
||||
}
|
||||
|
||||
|
|
@ -283,13 +268,14 @@ void mlx5_fpga_tls_del_flow(struct mlx5_core_dev *mdev, u32 swid,
|
|||
struct mlx5_fpga_tls *tls = mdev->fpga->tls;
|
||||
void *flow;
|
||||
|
||||
rcu_read_lock();
|
||||
if (direction_sx)
|
||||
flow = idr_find(&tls->tx_idr, swid);
|
||||
flow = mlx5_fpga_tls_release_swid(&tls->tx_idr,
|
||||
&tls->tx_idr_spinlock,
|
||||
swid);
|
||||
else
|
||||
flow = idr_find(&tls->rx_idr, swid);
|
||||
|
||||
rcu_read_unlock();
|
||||
flow = mlx5_fpga_tls_release_swid(&tls->rx_idr,
|
||||
&tls->rx_idr_spinlock,
|
||||
swid);
|
||||
|
||||
if (!flow) {
|
||||
mlx5_fpga_err(mdev->fpga, "No flow information for swid %u\n",
|
||||
|
|
@ -297,6 +283,7 @@ void mlx5_fpga_tls_del_flow(struct mlx5_core_dev *mdev, u32 swid,
|
|||
return;
|
||||
}
|
||||
|
||||
synchronize_rcu(); /* before kfree(flow) */
|
||||
mlx5_fpga_tls_send_teardown_cmd(mdev, flow, swid, flags);
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue