ARCv2: smp-boot: wake_flag polling by non-Masters needs to be uncached
This is needed on HS38 cores, for setting up IO-Coherency aperture properly The polling could perturb the caches and coherecy fabric which could be wrong in the small window when Master is setting up IOC aperture etc in arc_cache_init() We do it only for ARCv2 based builds to not affect EZChip ARCompact based platform. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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@ -90,10 +90,23 @@ void __init smp_cpus_done(unsigned int max_cpus)
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*/
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*/
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static volatile int wake_flag;
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static volatile int wake_flag;
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#ifdef CONFIG_ISA_ARCOMPACT
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#define __boot_read(f) f
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#define __boot_write(f, v) f = v
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#else
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#define __boot_read(f) arc_read_uncached_32(&f)
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#define __boot_write(f, v) arc_write_uncached_32(&f, v)
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#endif
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static void arc_default_smp_cpu_kick(int cpu, unsigned long pc)
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static void arc_default_smp_cpu_kick(int cpu, unsigned long pc)
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{
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{
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BUG_ON(cpu == 0);
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BUG_ON(cpu == 0);
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wake_flag = cpu;
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__boot_write(wake_flag, cpu);
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}
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}
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void arc_platform_smp_wait_to_boot(int cpu)
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void arc_platform_smp_wait_to_boot(int cpu)
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@ -102,10 +115,10 @@ void arc_platform_smp_wait_to_boot(int cpu)
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if (IS_ENABLED(CONFIG_ARC_SMP_HALT_ON_RESET))
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if (IS_ENABLED(CONFIG_ARC_SMP_HALT_ON_RESET))
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return;
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return;
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while (wake_flag != cpu)
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while (__boot_read(wake_flag) != cpu)
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;
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;
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wake_flag = 0;
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__boot_write(wake_flag, 0);
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}
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}
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const char *arc_platform_smp_cpuinfo(void)
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const char *arc_platform_smp_cpuinfo(void)
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