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Renesas ARM Based SoC Drivers Updates for v4.20 

* Convert to SPDX identifiers
 * R-Car V3M (r8a77970) and V3H (r8a77980): Document Timer Unit (TMU) bindings
 * RZ/G1N (r8a7744) and RZ/G1C (r8a77470) SoCs:
   - Document APMU and SMP enable method
 * RZ/G2M (r8a74a1), RZ/G1N (r8a7744) and RZ/G2E (r8a774c0) SoCs:
   - Add reset support
   - Add sysc support
 * RZ/G2M (r8a774a1), RZ/G2E (r8a774c0) and RZ/A2M (r7s9210) SoCs:
   - Add support for identifying SoC
 * RZ/A2M (r7s9210) SoC:
   - Add basic SoC setup support
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Merge tag 'renesas-drivers-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

Renesas ARM Based SoC Drivers Updates for v4.20

* Convert to SPDX identifiers
* R-Car V3M (r8a77970) and V3H (r8a77980): Document Timer Unit (TMU) bindings
* RZ/G1N (r8a7744) and RZ/G1C (r8a77470) SoCs:
  - Document APMU and SMP enable method
* RZ/G2M (r8a74a1), RZ/G1N (r8a7744) and RZ/G2E (r8a774c0) SoCs:
  - Add reset support
  - Add sysc support
* RZ/G2M (r8a774a1), RZ/G2E (r8a774c0) and RZ/A2M (r7s9210) SoCs:
  - Add support for identifying SoC
* RZ/A2M (r7s9210) SoC:
  - Add basic SoC setup support

* tag 'renesas-drivers-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (21 commits)
  dt-bindings: apmu: Document r8a7744 support
  dt-bindings: timer: renesas: tmu: document R8A779{7|8}0 bindings
  dt-bindings: apmu: Document r8a77470 support
  soc: renesas: rcar-rst: Add support for RZ/G1N
  dt-bindings: reset: rcar-rst: Document r8a7744 reset module
  soc: renesas: rcar-sysc: Add r8a7744 support
  dt-bindings: power: rcar-sysc: Add r8a7744 power domain index macros
  dt-bindings: power: rcar-sysc: Document r8a7744 SYSC binding
  soc: renesas: rcar-rst: Add support for RZ/G2E
  dt-bindings: reset: rcar-rst: Document r8a774c0 rst
  soc: renesas: rcar-sysc: Add r8a774c0 support
  dt-bindings: power: rcar-sysc: Document r8a774c0 sysc
  dt-bindings: power: Add r8a774c0 SYSC power domain definitions
  soc: renesas: Identify RZ/G2E
  soc: renesas: convert to SPDX identifiers
  soc: renesas: rcar-rst: Add support for RZ/G2M
  soc: renesas: rcar-sysc: Add r8a774a1 support
  dt-bindings: power: Add r8a774a1 SYSC power domain definitions
  soc: renesas: identify RZ/A2
  ARM: shmobile: Add basic RZ/A2 SoC support
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2018-09-28 22:16:47 +02:00
parent ab2dc8446a fae210bb5b
commit 86e762d967
29 changed files with 360 additions and 86 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Documentation/devicetree/bindings/power/renesas,apmu.txt
View File

@ -8,7 +8,9 @@ Required properties:
- compatible: Should be "renesas,<soctype>-apmu", "renesas,apmu" as fallback.
Examples with soctypes are:
- "renesas,r8a7743-apmu" (RZ/G1M)
- "renesas,r8a7744-apmu" (RZ/G1N)
- "renesas,r8a7745-apmu" (RZ/G1E)
- "renesas,r8a77470-apmu" (RZ/G1C)
- "renesas,r8a7790-apmu" (R-Car H2)
- "renesas,r8a7791-apmu" (R-Car M2-W)
- "renesas,r8a7792-apmu" (R-Car V2H)

3
Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
View File

@ -8,8 +8,11 @@ and various coprocessors.
Required properties:
- compatible: Must contain exactly one of the following:
- "renesas,r8a7743-sysc" (RZ/G1M)
- "renesas,r8a7744-sysc" (RZ/G1N)
- "renesas,r8a7745-sysc" (RZ/G1E)
- "renesas,r8a77470-sysc" (RZ/G1C)
- "renesas,r8a774a1-sysc" (RZ/G2M)
- "renesas,r8a774c0-sysc" (RZ/G2E)
- "renesas,r8a7779-sysc" (R-Car H1)
- "renesas,r8a7790-sysc" (R-Car H2)
- "renesas,r8a7791-sysc" (R-Car M2-W)

3
Documentation/devicetree/bindings/reset/renesas,rst.txt
View File

@ -16,8 +16,11 @@ Required properties:
- "renesas,<soctype>-rst" for R-Car Gen2 and Gen3, and RZ/G
Examples with soctypes are:
- "renesas,r8a7743-rst" (RZ/G1M)
- "renesas,r8a7744-rst" (RZ/G1N)
- "renesas,r8a7745-rst" (RZ/G1E)
- "renesas,r8a77470-rst" (RZ/G1C)
- "renesas,r8a774a1-rst" (RZ/G2M)
- "renesas,r8a774c0-rst" (RZ/G2E)
- "renesas,r8a7778-reset-wdt" (R-Car M1A)
- "renesas,r8a7779-reset-wdt" (R-Car H1)
- "renesas,r8a7790-rst" (R-Car H2)

2
Documentation/devicetree/bindings/timer/renesas,tmu.txt
View File

@ -12,6 +12,8 @@ Required Properties:
- "renesas,tmu-r8a7740" for the r8a7740 TMU
- "renesas,tmu-r8a7778" for the r8a7778 TMU
- "renesas,tmu-r8a7779" for the r8a7779 TMU
- "renesas,tmu-r8a77970" for the r8a77970 TMU
- "renesas,tmu-r8a77980" for the r8a77980 TMU
- "renesas,tmu" for any TMU.
This is a fallback for the above renesas,tmu-* entries

6
arch/arm/mach-shmobile/Kconfig
View File

@ -55,6 +55,12 @@ config ARCH_R7S72100
select SYS_SUPPORTS_SH_MTU2
select RENESAS_OSTM
config ARCH_R7S9210
bool "RZ/A2 (R7S9210)"
select PM
select PM_GENERIC_DOMAINS
select RENESAS_OSTM
config ARCH_R8A73A4
bool "R-Mobile APE6 (R8A73A40)"
select ARCH_RMOBILE

1
arch/arm/mach-shmobile/Makefile
View File

@ -14,6 +14,7 @@ obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o
obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o
obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o
obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o
obj-$(CONFIG_ARCH_R7S9210) += setup-r7s9210.o
# CPU reset vector handling objects
cpu-y := platsmp.o headsmp.o

27
arch/arm/mach-shmobile/setup-r7s9210.c Normal file
View File

@ -0,0 +1,27 @@
// SPDX-License-Identifier: GPL-2.0
/*
* r7s9210 processor support
*
* Copyright (C) 2018 Renesas Electronics Corporation
* Copyright (C) 2018 Chris Brandt
*
*/
#include <linux/kernel.h>
#include <asm/mach/arch.h>
#include "common.h"
static const char *const r7s9210_boards_compat_dt[] __initconst = {
"renesas,r7s9210",
NULL,
};
DT_MACHINE_START(R7S72100_DT, "Generic R7S9210 (Flattened Device Tree)")
.l2c_aux_val = 0,
.l2c_aux_mask = ~0,
.init_early = shmobile_init_delay,
.init_late = shmobile_init_late,
.dt_compat = r7s9210_boards_compat_dt,
MACHINE_END

19
drivers/soc/renesas/Kconfig
View File

@ -1,14 +1,17 @@
# SPDX-License-Identifier: GPL-2.0
config SOC_RENESAS
bool "Renesas SoC driver support" if COMPILE_TEST && !ARCH_RENESAS
default y if ARCH_RENESAS
select SOC_BUS
select RST_RCAR if ARCH_RCAR_GEN1 || ARCH_RCAR_GEN2 || \
ARCH_R8A7795 || ARCH_R8A7796 || ARCH_R8A77965 || \
ARCH_R8A77970 || ARCH_R8A77980 || ARCH_R8A77990 || \
ARCH_R8A77995
select SYSC_R8A7743 if ARCH_R8A7743
ARCH_R8A774A1 || ARCH_R8A774C0 || ARCH_R8A7795 || \
ARCH_R8A7796 || ARCH_R8A77965 || ARCH_R8A77970 || \
ARCH_R8A77980 || ARCH_R8A77990 || ARCH_R8A77995
select SYSC_R8A7743 if ARCH_R8A7743 || ARCH_R8A7744
select SYSC_R8A7745 if ARCH_R8A7745
select SYSC_R8A77470 if ARCH_R8A77470
select SYSC_R8A774A1 if ARCH_R8A774A1
select SYSC_R8A774C0 if ARCH_R8A774C0
select SYSC_R8A7779 if ARCH_R8A7779
select SYSC_R8A7790 if ARCH_R8A7790
select SYSC_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793
@ -37,6 +40,14 @@ config SYSC_R8A77470
bool "RZ/G1C System Controller support" if COMPILE_TEST
select SYSC_RCAR
config SYSC_R8A774A1
bool "RZ/G2M System Controller support" if COMPILE_TEST
select SYSC_RCAR
config SYSC_R8A774C0
bool "RZ/G2E System Controller support" if COMPILE_TEST
select SYSC_RCAR
config SYSC_R8A7779
bool "R-Car H1 System Controller support" if COMPILE_TEST
select SYSC_RCAR

2
drivers/soc/renesas/Makefile
View File

@ -6,6 +6,8 @@ obj-$(CONFIG_SOC_RENESAS) += renesas-soc.o
obj-$(CONFIG_SYSC_R8A7743) += r8a7743-sysc.o
obj-$(CONFIG_SYSC_R8A7745) += r8a7745-sysc.o
obj-$(CONFIG_SYSC_R8A77470) += r8a77470-sysc.o
obj-$(CONFIG_SYSC_R8A774A1) += r8a774a1-sysc.o
obj-$(CONFIG_SYSC_R8A774C0) += r8a774c0-sysc.o
obj-$(CONFIG_SYSC_R8A7779) += r8a7779-sysc.o
obj-$(CONFIG_SYSC_R8A7790) += r8a7790-sysc.o
obj-$(CONFIG_SYSC_R8A7791) += r8a7791-sysc.o

5
drivers/soc/renesas/r8a7743-sysc.c
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Renesas RZ/G1M System Controller
*
* Copyright (C) 2016 Cogent Embedded Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation; of the License.
*/
#include <linux/bug.h>

5
drivers/soc/renesas/r8a7745-sysc.c
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Renesas RZ/G1E System Controller
*
* Copyright (C) 2016 Cogent Embedded Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation; of the License.
*/
#include <linux/bug.h>

45
drivers/soc/renesas/r8a774a1-sysc.c Normal file
View File

@ -0,0 +1,45 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Renesas RZ/G2M System Controller
* Copyright (C) 2018 Renesas Electronics Corp.
*
* Based on Renesas R-Car M3-W System Controller
* Copyright (C) 2016 Glider bvba
*/
#include <linux/bug.h>
#include <linux/kernel.h>
#include <dt-bindings/power/r8a774a1-sysc.h>
#include "rcar-sysc.h"
static const struct rcar_sysc_area r8a774a1_areas[] __initconst = {
{ "always-on", 0, 0, R8A774A1_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
{ "ca57-scu", 0x1c0, 0, R8A774A1_PD_CA57_SCU, R8A774A1_PD_ALWAYS_ON,
PD_SCU },
{ "ca57-cpu0", 0x80, 0, R8A774A1_PD_CA57_CPU0, R8A774A1_PD_CA57_SCU,
PD_CPU_NOCR },
{ "ca57-cpu1", 0x80, 1, R8A774A1_PD_CA57_CPU1, R8A774A1_PD_CA57_SCU,
PD_CPU_NOCR },
{ "ca53-scu", 0x140, 0, R8A774A1_PD_CA53_SCU, R8A774A1_PD_ALWAYS_ON,
PD_SCU },
{ "ca53-cpu0", 0x200, 0, R8A774A1_PD_CA53_CPU0, R8A774A1_PD_CA53_SCU,
PD_CPU_NOCR },
{ "ca53-cpu1", 0x200, 1, R8A774A1_PD_CA53_CPU1, R8A774A1_PD_CA53_SCU,
PD_CPU_NOCR },
{ "ca53-cpu2", 0x200, 2, R8A774A1_PD_CA53_CPU2, R8A774A1_PD_CA53_SCU,
PD_CPU_NOCR },
{ "ca53-cpu3", 0x200, 3, R8A774A1_PD_CA53_CPU3, R8A774A1_PD_CA53_SCU,
PD_CPU_NOCR },
{ "a3vc", 0x380, 0, R8A774A1_PD_A3VC, R8A774A1_PD_ALWAYS_ON },
{ "a2vc0", 0x3c0, 0, R8A774A1_PD_A2VC0, R8A774A1_PD_A3VC },
{ "a2vc1", 0x3c0, 1, R8A774A1_PD_A2VC1, R8A774A1_PD_A3VC },
{ "3dg-a", 0x100, 0, R8A774A1_PD_3DG_A, R8A774A1_PD_ALWAYS_ON },
{ "3dg-b", 0x100, 1, R8A774A1_PD_3DG_B, R8A774A1_PD_3DG_A },
};
const struct rcar_sysc_info r8a774a1_sysc_info __initconst = {
.areas = r8a774a1_areas,
.num_areas = ARRAY_SIZE(r8a774a1_areas),
};

68
drivers/soc/renesas/r8a774c0-sysc.c Normal file
View File

@ -0,0 +1,68 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Renesas RZ/G2E System Controller
* Copyright (C) 2018 Renesas Electronics Corp.
*
* Based on Renesas R-Car E3 System Controller
*/
#include <linux/bug.h>
#include <linux/kernel.h>
#include <linux/sys_soc.h>
#include <dt-bindings/power/r8a774c0-sysc.h>
#include "rcar-sysc.h"
static struct rcar_sysc_area r8a774c0_areas[] __initdata = {
{ "always-on", 0, 0, R8A774C0_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
{ "ca53-scu", 0x140, 0, R8A774C0_PD_CA53_SCU, R8A774C0_PD_ALWAYS_ON,
PD_SCU },
{ "ca53-cpu0", 0x200, 0, R8A774C0_PD_CA53_CPU0, R8A774C0_PD_CA53_SCU,
PD_CPU_NOCR },
{ "ca53-cpu1", 0x200, 1, R8A774C0_PD_CA53_CPU1, R8A774C0_PD_CA53_SCU,
PD_CPU_NOCR },
{ "a3vc", 0x380, 0, R8A774C0_PD_A3VC, R8A774C0_PD_ALWAYS_ON },
{ "a2vc1", 0x3c0, 1, R8A774C0_PD_A2VC1, R8A774C0_PD_A3VC },
{ "3dg-a", 0x100, 0, R8A774C0_PD_3DG_A, R8A774C0_PD_ALWAYS_ON },
{ "3dg-b", 0x100, 1, R8A774C0_PD_3DG_B, R8A774C0_PD_3DG_A },
};
static void __init rcar_sysc_fix_parent(struct rcar_sysc_area *areas,
unsigned int num_areas, u8 id,
int new_parent)
{
unsigned int i;
for (i = 0; i < num_areas; i++)
if (areas[i].isr_bit == id) {
areas[i].parent = new_parent;
return;
}
}
/* Fixups for RZ/G2E ES1.0 revision */
static const struct soc_device_attribute r8a774c0[] __initconst = {
{ .soc_id = "r8a774c0", .revision = "ES1.0" },
{ /* sentinel */ }
};
static int __init r8a774c0_sysc_init(void)
{
if (soc_device_match(r8a774c0)) {
rcar_sysc_fix_parent(r8a774c0_areas,
ARRAY_SIZE(r8a774c0_areas),
R8A774C0_PD_3DG_A, R8A774C0_PD_3DG_B);
rcar_sysc_fix_parent(r8a774c0_areas,
ARRAY_SIZE(r8a774c0_areas),
R8A774C0_PD_3DG_B, R8A774C0_PD_ALWAYS_ON);
}
return 0;
}
const struct rcar_sysc_info r8a774c0_sysc_info __initconst = {
.init = r8a774c0_sysc_init,
.areas = r8a774c0_areas,
.num_areas = ARRAY_SIZE(r8a774c0_areas),
};

5
drivers/soc/renesas/r8a7779-sysc.c
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Renesas R-Car H1 System Controller
*
* Copyright (C) 2016 Glider bvba
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*/
#include <linux/bug.h>

5
drivers/soc/renesas/r8a7790-sysc.c
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Renesas R-Car H2 System Controller
*
* Copyright (C) 2016 Glider bvba
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*/
#include <linux/bug.h>

5
drivers/soc/renesas/r8a7791-sysc.c
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Renesas R-Car M2-W/N System Controller
*
* Copyright (C) 2016 Glider bvba
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*/
#include <linux/bug.h>

5
drivers/soc/renesas/r8a7792-sysc.c
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Renesas R-Car V2H (R8A7792) System Controller
*
* Copyright (C) 2016 Cogent Embedded Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*/
#include <linux/bug.h>

5
drivers/soc/renesas/r8a7794-sysc.c
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Renesas R-Car E2 System Controller
*
* Copyright (C) 2016 Glider bvba
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*/
#include <linux/bug.h>

5
drivers/soc/renesas/r8a7795-sysc.c
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Renesas R-Car H3 System Controller
*
* Copyright (C) 2016-2017 Glider bvba
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*/
#include <linux/bug.h>

5
drivers/soc/renesas/r8a7796-sysc.c
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Renesas R-Car M3-W System Controller
*
* Copyright (C) 2016 Glider bvba
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*/
#include <linux/bug.h>

5
drivers/soc/renesas/r8a77970-sysc.c
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Renesas R-Car V3M System Controller
*
* Copyright (C) 2017 Cogent Embedded Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/bug.h>

5
drivers/soc/renesas/r8a77995-sysc.c
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Renesas R-Car D3 System Controller
*
* Copyright (C) 2017 Glider bvba
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*/
#include <linux/bug.h>

11
drivers/soc/renesas/rcar-rst.c
View File

@ -1,11 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* R-Car Gen1 RESET/WDT, R-Car Gen2, Gen3, and RZ/G RST Driver
*
* Copyright (C) 2016 Glider bvba
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/err.h>
@ -41,10 +38,14 @@ static const struct rst_config rcar_rst_gen3 __initconst = {
};
static const struct of_device_id rcar_rst_matches[] __initconst = {
/* RZ/G is handled like R-Car Gen2 */
/* RZ/G1 is handled like R-Car Gen2 */
{ .compatible = "renesas,r8a7743-rst", .data = &rcar_rst_gen2 },
{ .compatible = "renesas,r8a7744-rst", .data = &rcar_rst_gen2 },
{ .compatible = "renesas,r8a7745-rst", .data = &rcar_rst_gen2 },
{ .compatible = "renesas,r8a77470-rst", .data = &rcar_rst_gen2 },
/* RZ/G2 is handled like R-Car Gen3 */
{ .compatible = "renesas,r8a774a1-rst", .data = &rcar_rst_gen3 },
{ .compatible = "renesas,r8a774c0-rst", .data = &rcar_rst_gen3 },
/* R-Car Gen1 */
{ .compatible = "renesas,r8a7778-reset-wdt", .data = &rcar_rst_gen1 },
{ .compatible = "renesas,r8a7779-reset-wdt", .data = &rcar_rst_gen1 },

13
drivers/soc/renesas/rcar-sysc.c
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@ -1,12 +1,9 @@
// SPDX-License-Identifier: GPL-2.0
/*
* R-Car SYSC Power management support
*
* Copyright (C) 2014 Magnus Damm
* Copyright (C) 2015-2017 Glider bvba
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/clk/renesas.h>
@ -268,6 +265,8 @@ static int __init rcar_sysc_pd_setup(struct rcar_sysc_pd *pd)
static const struct of_device_id rcar_sysc_matches[] __initconst = {
#ifdef CONFIG_SYSC_R8A7743
{ .compatible = "renesas,r8a7743-sysc", .data = &r8a7743_sysc_info },
/* RZ/G1N is identical to RZ/G2M w.r.t. power domains. */
{ .compatible = "renesas,r8a7744-sysc", .data = &r8a7743_sysc_info },
#endif
#ifdef CONFIG_SYSC_R8A7745
{ .compatible = "renesas,r8a7745-sysc", .data = &r8a7745_sysc_info },
@ -275,6 +274,12 @@ static const struct of_device_id rcar_sysc_matches[] __initconst = {
#ifdef CONFIG_SYSC_R8A77470
{ .compatible = "renesas,r8a77470-sysc", .data = &r8a77470_sysc_info },
#endif
#ifdef CONFIG_SYSC_R8A774A1
{ .compatible = "renesas,r8a774a1-sysc", .data = &r8a774a1_sysc_info },
#endif
#ifdef CONFIG_SYSC_R8A774C0
{ .compatible = "renesas,r8a774c0-sysc", .data = &r8a774c0_sysc_info },
#endif
#ifdef CONFIG_SYSC_R8A7779
{ .compatible = "renesas,r8a7779-sysc", .data = &r8a7779_sysc_info },
#endif

9
drivers/soc/renesas/rcar-sysc.h
View File

@ -1,11 +1,8 @@
/*
/* SPDX-License-Identifier: GPL-2.0
*
* Renesas R-Car System Controller
*
* Copyright (C) 2016 Glider bvba
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*/
#ifndef __SOC_RENESAS_RCAR_SYSC_H__
#define __SOC_RENESAS_RCAR_SYSC_H__
@ -52,6 +49,8 @@ struct rcar_sysc_info {
extern const struct rcar_sysc_info r8a7743_sysc_info;
extern const struct rcar_sysc_info r8a7745_sysc_info;
extern const struct rcar_sysc_info r8a77470_sysc_info;
extern const struct rcar_sysc_info r8a774a1_sysc_info;
extern const struct rcar_sysc_info r8a774c0_sysc_info;
extern const struct rcar_sysc_info r8a7779_sysc_info;
extern const struct rcar_sysc_info r8a7790_sysc_info;
extern const struct rcar_sysc_info r8a7791_sysc_info;

100
drivers/soc/renesas/renesas-soc.c
View File

@ -1,16 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Renesas SoC Identification
*
* Copyright (C) 2014-2016 Glider bvba
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/io.h>
@ -46,15 +38,24 @@ static const struct renesas_family fam_rmobile __initconst __maybe_unused = {
.reg = 0xe600101c, /* CCCR (Common Chip Code Register) */
};
static const struct renesas_family fam_rza __initconst __maybe_unused = {
.name = "RZ/A",
static const struct renesas_family fam_rza1 __initconst __maybe_unused = {
.name = "RZ/A1",
};
static const struct renesas_family fam_rzg __initconst __maybe_unused = {
.name = "RZ/G",
static const struct renesas_family fam_rza2 __initconst __maybe_unused = {
.name = "RZ/A2",
};
static const struct renesas_family fam_rzg1 __initconst __maybe_unused = {
.name = "RZ/G1",
.reg = 0xff000044, /* PRR (Product Register) */
};
static const struct renesas_family fam_rzg2 __initconst __maybe_unused = {
.name = "RZ/G2",
.reg = 0xfff00044, /* PRR (Product Register) */
};
static const struct renesas_family fam_shmobile __initconst __maybe_unused = {
.name = "SH-Mobile",
.reg = 0xe600101c, /* CCCR (Common Chip Code Register) */
@ -67,7 +68,12 @@ struct renesas_soc {
};
static const struct renesas_soc soc_rz_a1h __initconst __maybe_unused = {
.family = &fam_rza,
.family = &fam_rza1,
};
static const struct renesas_soc soc_rz_a2m __initconst __maybe_unused = {
.family = &fam_rza2,
.id = 0x3b,
};
static const struct renesas_soc soc_rmobile_ape6 __initconst __maybe_unused = {
@ -81,30 +87,40 @@ static const struct renesas_soc soc_rmobile_a1 __initconst __maybe_unused = {
};
static const struct renesas_soc soc_rz_g1h __initconst __maybe_unused = {
.family = &fam_rzg,
.family = &fam_rzg1,
.id = 0x45,
};
static const struct renesas_soc soc_rz_g1m __initconst __maybe_unused = {
.family = &fam_rzg,
.family = &fam_rzg1,
.id = 0x47,
};
static const struct renesas_soc soc_rz_g1n __initconst __maybe_unused = {
.family = &fam_rzg,
.family = &fam_rzg1,
.id = 0x4b,
};
static const struct renesas_soc soc_rz_g1e __initconst __maybe_unused = {
.family = &fam_rzg,
.family = &fam_rzg1,
.id = 0x4c,
};
static const struct renesas_soc soc_rz_g1c __initconst __maybe_unused = {
.family = &fam_rzg,
.family = &fam_rzg1,
.id = 0x53,
};
static const struct renesas_soc soc_rz_g2m __initconst __maybe_unused = {
.family = &fam_rzg2,
.id = 0x52,
};
static const struct renesas_soc soc_rz_g2e __initconst __maybe_unused = {
.family = &fam_rzg2,
.id = 0x57,
};
static const struct renesas_soc soc_rcar_m1a __initconst __maybe_unused = {
.family = &fam_rcar_gen1,
};
@ -184,6 +200,9 @@ static const struct of_device_id renesas_socs[] __initconst = {
#ifdef CONFIG_ARCH_R7S72100
{ .compatible = "renesas,r7s72100", .data = &soc_rz_a1h },
#endif
#ifdef CONFIG_ARCH_R7S9210
{ .compatible = "renesas,r7s9210", .data = &soc_rz_a2m },
#endif
#ifdef CONFIG_ARCH_R8A73A4
{ .compatible = "renesas,r8a73a4", .data = &soc_rmobile_ape6 },
#endif
@ -205,6 +224,12 @@ static const struct of_device_id renesas_socs[] __initconst = {
#ifdef CONFIG_ARCH_R8A77470
{ .compatible = "renesas,r8a77470", .data = &soc_rz_g1c },
#endif
#ifdef CONFIG_ARCH_R8A774A1
{ .compatible = "renesas,r8a774a1", .data = &soc_rz_g2m },
#endif
#ifdef CONFIG_ARCH_R8A774C0
{ .compatible = "renesas,r8a774c0", .data = &soc_rz_g2e },
#endif
#ifdef CONFIG_ARCH_R8A7778
{ .compatible = "renesas,r8a7778", .data = &soc_rcar_m1a },
#endif
@ -262,7 +287,7 @@ static int __init renesas_soc_init(void)
void __iomem *chipid = NULL;
struct soc_device *soc_dev;
struct device_node *np;
unsigned int product;
unsigned int product, eshi = 0, eslo;
match = of_match_node(renesas_socs, of_root);
if (!match)
@ -271,6 +296,31 @@ static int __init renesas_soc_init(void)
soc = match->data;
family = soc->family;
np = of_find_compatible_node(NULL, NULL, "renesas,bsid");
if (np) {
chipid = of_iomap(np, 0);
of_node_put(np);
if (chipid) {
product = readl(chipid);
iounmap(chipid);
if (soc->id && ((product >> 16) & 0xff) != soc->id) {
pr_warn("SoC mismatch (product = 0x%x)\n",
product);
return -ENODEV;
}
}
/*
* TODO: Upper 4 bits of BSID are for chip version, but the
* format is not known at this time so we don't know how to
* specify eshi and eslo
*/
goto done;
}
/* Try PRR first, then hardcoded fallback */
np = of_find_compatible_node(NULL, NULL, "renesas,prr");
if (np) {
@ -289,8 +339,11 @@ static int __init renesas_soc_init(void)
pr_warn("SoC mismatch (product = 0x%x)\n", product);
return -ENODEV;
}
eshi = ((product >> 4) & 0x0f) + 1;
eslo = product & 0xf;
}
done:
soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
if (!soc_dev_attr)
return -ENOMEM;
@ -302,10 +355,9 @@ static int __init renesas_soc_init(void)
soc_dev_attr->family = kstrdup_const(family->name, GFP_KERNEL);
soc_dev_attr->soc_id = kstrdup_const(strchr(match->compatible, ',') + 1,
GFP_KERNEL);
if (chipid)
soc_dev_attr->revision = kasprintf(GFP_KERNEL, "ES%u.%u",
((product >> 4) & 0x0f) + 1,
product & 0xf);
if (eshi)
soc_dev_attr->revision = kasprintf(GFP_KERNEL, "ES%u.%u", eshi,
eslo);
pr_info("Detected Renesas %s %s %s\n", soc_dev_attr->family,
soc_dev_attr->soc_id, soc_dev_attr->revision ?: "");

24
include/dt-bindings/power/r8a7744-sysc.h Normal file
View File

@ -0,0 +1,24 @@
/* SPDX-License-Identifier: GPL-2.0
*
* Copyright (C) 2018 Renesas Electronics Corp.
*/
#ifndef __DT_BINDINGS_POWER_R8A7744_SYSC_H__
#define __DT_BINDINGS_POWER_R8A7744_SYSC_H__
/*
* These power domain indices match the numbers of the interrupt bits
* representing the power areas in the various Interrupt Registers
* (e.g. SYSCISR, Interrupt Status Register)
*
* Note that RZ/G1N is identical to RZ/G2M w.r.t. power domains.
*/
#define R8A7744_PD_CA15_CPU0 0
#define R8A7744_PD_CA15_CPU1 1
#define R8A7744_PD_CA15_SCU 12
#define R8A7744_PD_SGX 20
/* Always-on power area */
#define R8A7744_PD_ALWAYS_ON 32
#endif /* __DT_BINDINGS_POWER_R8A7744_SYSC_H__ */

31
include/dt-bindings/power/r8a774a1-sysc.h Normal file
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@ -0,0 +1,31 @@
/* SPDX-License-Identifier: GPL-2.0
*
* Copyright (C) 2018 Renesas Electronics Corp.
*/
#ifndef __DT_BINDINGS_POWER_R8A774A1_SYSC_H__
#define __DT_BINDINGS_POWER_R8A774A1_SYSC_H__
/*
* These power domain indices match the numbers of the interrupt bits
* representing the power areas in the various Interrupt Registers
* (e.g. SYSCISR, Interrupt Status Register)
*/
#define R8A774A1_PD_CA57_CPU0 0
#define R8A774A1_PD_CA57_CPU1 1
#define R8A774A1_PD_CA53_CPU0 5
#define R8A774A1_PD_CA53_CPU1 6
#define R8A774A1_PD_CA53_CPU2 7
#define R8A774A1_PD_CA53_CPU3 8
#define R8A774A1_PD_CA57_SCU 12
#define R8A774A1_PD_A3VC 14
#define R8A774A1_PD_3DG_A 17
#define R8A774A1_PD_3DG_B 18
#define R8A774A1_PD_CA53_SCU 21
#define R8A774A1_PD_A2VC0 25
#define R8A774A1_PD_A2VC1 26
/* Always-on power area */
#define R8A774A1_PD_ALWAYS_ON 32
#endif /* __DT_BINDINGS_POWER_R8A774A1_SYSC_H__ */

25
include/dt-bindings/power/r8a774c0-sysc.h Normal file
View File

@ -0,0 +1,25 @@
/* SPDX-License-Identifier: GPL-2.0
*
* Copyright (C) 2018 Renesas Electronics Corp.
*/
#ifndef __DT_BINDINGS_POWER_R8A774C0_SYSC_H__
#define __DT_BINDINGS_POWER_R8A774C0_SYSC_H__
/*
* These power domain indices match the numbers of the interrupt bits
* representing the power areas in the various Interrupt Registers
* (e.g. SYSCISR, Interrupt Status Register)
*/
#define R8A774C0_PD_CA53_CPU0 5
#define R8A774C0_PD_CA53_CPU1 6
#define R8A774C0_PD_A3VC 14
#define R8A774C0_PD_3DG_A 17
#define R8A774C0_PD_3DG_B 18
#define R8A774C0_PD_CA53_SCU 21
#define R8A774C0_PD_A2VC1 26
/* Always-on power area */
#define R8A774C0_PD_ALWAYS_ON 32
#endif /* __DT_BINDINGS_POWER_R8A774C0_SYSC_H__ */