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including various development for samsung for v3.10 

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Merge tag 'devel-samsung-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc

From Kukjin Kim <kgene.kim@samsung.com>:

including various development for samsung for v3.10

* tag 'devel-samsung-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: EXYNOS: replace cpumask by the corresponding macro
  ARM: EXYNOS: handle properly the return values
  ARM: EXYNOS: factor out the idle states
  ARM: SAMSUNG: check processor type before cache restoration in resume
  ARM: S3C64XX: Slow down mic detection rate for wm5102
  ARM: S3C64XX: Clear DMA flags on channel request
  ARM: EXYNOS: Clear ENABLE_WAKEUP_SW bit when entering suspend
  ARM: EXYNOS: Remove hardcode wakeup unmask for EINT_0
  ARM: EXYNOS: Add support for rtc wakeup
  ARM: SAMSUNG: Export MIPI CSIS/DSIM PHY control functions

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2013-04-09 23:08:19 +02:00
parent 518fbd02a5 329afd2645
commit a93216c921
7 changed files with 44 additions and 39 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/mach-exynos/common.c
View File

@ -463,6 +463,8 @@ void __init exynos4_init_irq(void)
* uses GIC instead of VIC. * uses GIC instead of VIC.
*/ */
s5p_init_irq(NULL, 0); s5p_init_irq(NULL, 0);
gic_arch_extn.irq_set_wake = s3c_irq_wake;
} }
void __init exynos5_init_irq(void) void __init exynos5_init_irq(void)

58
arch/arm/mach-exynos/cpuidle.c
View File

@ -41,24 +41,25 @@ static int exynos4_enter_lowpower(struct cpuidle_device *dev,
struct cpuidle_driver *drv, struct cpuidle_driver *drv,
int index); int index);
static struct cpuidle_state exynos4_cpuidle_set[] __initdata = {
[0] = ARM_CPUIDLE_WFI_STATE,
[1] = {
.enter = exynos4_enter_lowpower,
.exit_latency = 300,
.target_residency = 100000,
.flags = CPUIDLE_FLAG_TIME_VALID,
.name = "C1",
.desc = "ARM power down",
},
};
static DEFINE_PER_CPU(struct cpuidle_device, exynos4_cpuidle_device); static DEFINE_PER_CPU(struct cpuidle_device, exynos4_cpuidle_device);
static struct cpuidle_driver exynos4_idle_driver = { static struct cpuidle_driver exynos4_idle_driver = {
.name = "exynos4_idle", .name = "exynos4_idle",
.owner = THIS_MODULE, .owner = THIS_MODULE,
.en_core_tk_irqen = 1, .en_core_tk_irqen = 1,
.states = {
[0] = ARM_CPUIDLE_WFI_STATE,
[1] = {
.enter = exynos4_enter_lowpower,
.exit_latency = 300,
.target_residency = 100000,
.flags = CPUIDLE_FLAG_TIME_VALID,
.name = "C1",
.desc = "ARM power down",
},
},
.state_count = 2,
.safe_state_index = 0,
}; };
/* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */ /* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
@ -193,37 +194,30 @@ static void __init exynos5_core_down_clk(void)
static int __init exynos4_init_cpuidle(void) static int __init exynos4_init_cpuidle(void)
{ {
int i, max_cpuidle_state, cpu_id; int cpu_id, ret;
struct cpuidle_device *device; struct cpuidle_device *device;
struct cpuidle_driver *drv = &exynos4_idle_driver;
if (soc_is_exynos5250()) if (soc_is_exynos5250())
exynos5_core_down_clk(); exynos5_core_down_clk();
/* Setup cpuidle driver */ ret = cpuidle_register_driver(&exynos4_idle_driver);
drv->state_count = (sizeof(exynos4_cpuidle_set) / if (ret) {
sizeof(struct cpuidle_state)); printk(KERN_ERR "CPUidle failed to register driver\n");
max_cpuidle_state = drv->state_count; return ret;
for (i = 0; i < max_cpuidle_state; i++) {
memcpy(&drv->states[i], &exynos4_cpuidle_set[i],
sizeof(struct cpuidle_state));
} }
drv->safe_state_index = 0;
cpuidle_register_driver(&exynos4_idle_driver);
for_each_cpu(cpu_id, cpu_online_mask) { for_each_online_cpu(cpu_id) {
device = &per_cpu(exynos4_cpuidle_device, cpu_id); device = &per_cpu(exynos4_cpuidle_device, cpu_id);
device->cpu = cpu_id; device->cpu = cpu_id;
if (cpu_id == 0) /* Support IDLE only */
device->state_count = (sizeof(exynos4_cpuidle_set) / if (cpu_id != 0)
sizeof(struct cpuidle_state)); device->state_count = 1;
else
device->state_count = 1; /* Support IDLE only */
if (cpuidle_register_device(device)) { ret = cpuidle_register_device(device);
printk(KERN_ERR "CPUidle register device failed\n,"); if (ret) {
return -EIO; printk(KERN_ERR "CPUidle register device failed\n");
return ret;
} }
} }

9
arch/arm/mach-exynos/include/mach/pm-core.h
View File

@ -27,13 +27,8 @@ static inline void s3c_pm_debug_init_uart(void)
static inline void s3c_pm_arch_prepare_irqs(void) static inline void s3c_pm_arch_prepare_irqs(void)
{ {
unsigned int tmp; __raw_writel(s3c_irqwake_eintmask, S5P_EINT_WAKEUP_MASK);
tmp = __raw_readl(S5P_WAKEUP_MASK); __raw_writel(s3c_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK);
tmp &= ~(1 << 31);
__raw_writel(tmp, S5P_WAKEUP_MASK);
__raw_writel(s3c_irqwake_intmask, S5P_WAKEUP_MASK);
__raw_writel(s3c_irqwake_eintmask & 0xFFFFFFFE, S5P_EINT_WAKEUP_MASK);
} }
static inline void s3c_pm_arch_stop_clocks(void) static inline void s3c_pm_arch_stop_clocks(void)

1
arch/arm/mach-s3c64xx/dma.c
View File

@ -509,6 +509,7 @@ int s3c2410_dma_request(enum dma_ch channel,
chan->client = client; chan->client = client;
chan->in_use = 1; chan->in_use = 1;
chan->peripheral = channel; chan->peripheral = channel;
chan->flags = 0;
local_irq_restore(flags); local_irq_restore(flags);

1
arch/arm/mach-s3c64xx/mach-crag6410-module.c
View File

@ -210,6 +210,7 @@ static struct arizona_pdata wm5102_reva_pdata = {
.gpio_base = CODEC_GPIO_BASE, .gpio_base = CODEC_GPIO_BASE,
.irq_active_high = true, .irq_active_high = true,
.micd_pol_gpio = CODEC_GPIO_BASE + 4, .micd_pol_gpio = CODEC_GPIO_BASE + 4,
.micd_rate = 6,
.gpio_defaults = { .gpio_defaults = {
[2] = 0x10000, /* AIF3TXLRCLK */ [2] = 0x10000, /* AIF3TXLRCLK */
[3] = 0x4, /* OPCLK */ [3] = 0x4, /* OPCLK */

9
arch/arm/plat-samsung/s5p-sleep.S
View File

@ -25,6 +25,9 @@
#include <asm/asm-offsets.h> #include <asm/asm-offsets.h>
#include <asm/hardware/cache-l2x0.h> #include <asm/hardware/cache-l2x0.h>
#define CPU_MASK 0xff0ffff0
#define CPU_CORTEX_A9 0x410fc090
/* /*
* The following code is located into the .data section. This is to * The following code is located into the .data section. This is to
* allow l2x0_regs_phys to be accessed with a relative load while we * allow l2x0_regs_phys to be accessed with a relative load while we
@ -51,6 +54,12 @@
ENTRY(s3c_cpu_resume) ENTRY(s3c_cpu_resume)
#ifdef CONFIG_CACHE_L2X0 #ifdef CONFIG_CACHE_L2X0
mrc p15, 0, r0, c0, c0, 0
ldr r1, =CPU_MASK
and r0, r0, r1
ldr r1, =CPU_CORTEX_A9
cmp r0, r1
bne resume_l2on
adr r0, l2x0_regs_phys adr r0, l2x0_regs_phys
ldr r0, [r0] ldr r0, [r0]
ldr r1, [r0, #L2X0_R_PHY_BASE] ldr r1, [r0, #L2X0_R_PHY_BASE]

3
arch/arm/plat-samsung/setup-mipiphy.c
View File

@ -8,6 +8,7 @@
* published by the Free Software Foundation. * published by the Free Software Foundation.
*/ */
#include <linux/export.h>
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/io.h> #include <linux/io.h>
@ -50,8 +51,10 @@ int s5p_csis_phy_enable(int id, bool on)
{ {
return __s5p_mipi_phy_control(id, on, S5P_MIPI_DPHY_SRESETN); return __s5p_mipi_phy_control(id, on, S5P_MIPI_DPHY_SRESETN);
} }
EXPORT_SYMBOL(s5p_csis_phy_enable);
int s5p_dsim_phy_enable(struct platform_device *pdev, bool on) int s5p_dsim_phy_enable(struct platform_device *pdev, bool on)
{ {
return __s5p_mipi_phy_control(pdev->id, on, S5P_MIPI_DPHY_MRESETN); return __s5p_mipi_phy_control(pdev->id, on, S5P_MIPI_DPHY_MRESETN);
} }
EXPORT_SYMBOL(s5p_dsim_phy_enable);