Merge 4e71add028 ("Merge branch 'stable/for-linus-5.15-rc0' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/ibft") into android-mainline
Steps on the way to 5.15-rc1 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> Change-Id: Ib3f181326491eb896547d802a6f0a1b3be54ce28
This commit is contained in:
Greg Kroah-Hartman
commit
c2b303f98f
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@ -42,8 +42,12 @@ Description: /sys/kernel/iommu_groups/<grp_id>/type shows the type of default
|
|||
======== ======================================================
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||||
DMA All the DMA transactions from the device in this group
|
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are translated by the iommu.
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DMA-FQ As above, but using batched invalidation to lazily
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remove translations after use. This may offer reduced
|
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overhead at the cost of reduced memory protection.
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identity All the DMA transactions from the device in this group
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are not translated by the iommu.
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are not translated by the iommu. Maximum performance
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but zero protection.
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auto Change to the type the device was booted with.
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======== ======================================================
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|
|
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|||
|
|
@ -0,0 +1,24 @@
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What: /sys/kernel/mm/numa/
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Date: June 2021
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Contact: Linux memory management mailing list <linux-mm@kvack.org>
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Description: Interface for NUMA
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|
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What: /sys/kernel/mm/numa/demotion_enabled
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Date: June 2021
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Contact: Linux memory management mailing list <linux-mm@kvack.org>
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Description: Enable/disable demoting pages during reclaim
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Page migration during reclaim is intended for systems
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with tiered memory configurations. These systems have
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multiple types of memory with varied performance
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characteristics instead of plain NUMA systems where
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the same kind of memory is found at varied distances.
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Allowing page migration during reclaim enables these
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systems to migrate pages from fast tiers to slow tiers
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when the fast tier is under pressure. This migration
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is performed before swap. It may move data to a NUMA
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node that does not fall into the cpuset of the
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allocating process which might be construed to violate
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the guarantees of cpusets. This should not be enabled
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on systems which need strict cpuset location
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guarantees.
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|
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@ -301,10 +301,7 @@
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amd_iommu= [HW,X86-64]
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Pass parameters to the AMD IOMMU driver in the system.
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Possible values are:
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fullflush - enable flushing of IO/TLB entries when
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they are unmapped. Otherwise they are
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flushed before they will be reused, which
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is a lot of faster
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fullflush - Deprecated, equivalent to iommu.strict=1
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off - do not initialize any AMD IOMMU found in
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the system
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force_isolation - Force device isolation for all
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@ -1962,18 +1959,17 @@
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this case, gfx device will use physical address for
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DMA.
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strict [Default Off]
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With this option on every unmap_single operation will
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result in a hardware IOTLB flush operation as opposed
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to batching them for performance.
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Deprecated, equivalent to iommu.strict=1.
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sp_off [Default Off]
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By default, super page will be supported if Intel IOMMU
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has the capability. With this option, super page will
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not be supported.
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sm_on [Default Off]
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By default, scalable mode will be disabled even if the
|
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hardware advertises that it has support for the scalable
|
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mode translation. With this option set, scalable mode
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will be used on hardware which claims to support it.
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sm_on
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Enable the Intel IOMMU scalable mode if the hardware
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advertises that it has support for the scalable mode
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translation.
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sm_off
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Disallow use of the Intel IOMMU scalable mode.
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tboot_noforce [Default Off]
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Do not force the Intel IOMMU enabled under tboot.
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By default, tboot will force Intel IOMMU on, which
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|
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@ -2065,13 +2061,12 @@
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throughput at the cost of reduced device isolation.
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Will fall back to strict mode if not supported by
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the relevant IOMMU driver.
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1 - Strict mode (default).
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1 - Strict mode.
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DMA unmap operations invalidate IOMMU hardware TLBs
|
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synchronously.
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Note: on x86, the default behaviour depends on the
|
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equivalent driver-specific parameters, but a strict
|
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mode explicitly specified by either method takes
|
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precedence.
|
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unset - Use value of CONFIG_IOMMU_DEFAULT_DMA_{LAZY,STRICT}.
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Note: on x86, strict mode specified via one of the
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legacy driver-specific options takes precedence.
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iommu.passthrough=
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[ARM64, X86] Configure DMA to bypass the IOMMU by default.
|
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|
|
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|
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@ -245,6 +245,13 @@ MPOL_INTERLEAVED
|
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address range or file. During system boot up, the temporary
|
||||
interleaved system default policy works in this mode.
|
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|
||||
MPOL_PREFERRED_MANY
|
||||
This mode specifices that the allocation should be preferrably
|
||||
satisfied from the nodemask specified in the policy. If there is
|
||||
a memory pressure on all nodes in the nodemask, the allocation
|
||||
can fall back to all existing numa nodes. This is effectively
|
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MPOL_PREFERRED allowed for a mask rather than a single node.
|
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|
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NUMA memory policy supports the following optional mode flags:
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|
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MPOL_F_STATIC_NODES
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|
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@ -253,10 +260,10 @@ MPOL_F_STATIC_NODES
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nodes changes after the memory policy has been defined.
|
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|
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Without this flag, any time a mempolicy is rebound because of a
|
||||
change in the set of allowed nodes, the node (Preferred) or
|
||||
nodemask (Bind, Interleave) is remapped to the new set of
|
||||
allowed nodes. This may result in nodes being used that were
|
||||
previously undesired.
|
||||
change in the set of allowed nodes, the preferred nodemask (Preferred
|
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Many), preferred node (Preferred) or nodemask (Bind, Interleave) is
|
||||
remapped to the new set of allowed nodes. This may result in nodes
|
||||
being used that were previously undesired.
|
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|
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With this flag, if the user-specified nodes overlap with the
|
||||
nodes allowed by the task's cpuset, then the memory policy is
|
||||
|
|
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|
|
@ -118,7 +118,8 @@ compaction_proactiveness
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|||
|
||||
This tunable takes a value in the range [0, 100] with a default value of
|
||||
20. This tunable determines how aggressively compaction is done in the
|
||||
background. Setting it to 0 disables proactive compaction.
|
||||
background. Write of a non zero value to this tunable will immediately
|
||||
trigger the proactive compaction. Setting it to 0 disables proactive compaction.
|
||||
|
||||
Note that compaction has a non-trivial system-wide impact as pages
|
||||
belonging to different processes are moved around, which could also lead
|
||||
|
|
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|||
|
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@ -271,10 +271,15 @@ maps this page at its virtual address.
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|||
|
||||
``void flush_dcache_page(struct page *page)``
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||||
|
||||
Any time the kernel writes to a page cache page, _OR_
|
||||
the kernel is about to read from a page cache page and
|
||||
user space shared/writable mappings of this page potentially
|
||||
exist, this routine is called.
|
||||
This routines must be called when:
|
||||
|
||||
a) the kernel did write to a page that is in the page cache page
|
||||
and / or in high memory
|
||||
b) the kernel is about to read from a page cache page and user space
|
||||
shared/writable mappings of this page potentially exist. Note
|
||||
that {get,pin}_user_pages{_fast} already call flush_dcache_page
|
||||
on any page found in the user address space and thus driver
|
||||
code rarely needs to take this into account.
|
||||
|
||||
.. note::
|
||||
|
||||
|
|
@ -284,38 +289,34 @@ maps this page at its virtual address.
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|||
handling vfs symlinks in the page cache need not call
|
||||
this interface at all.
|
||||
|
||||
The phrase "kernel writes to a page cache page" means,
|
||||
specifically, that the kernel executes store instructions
|
||||
that dirty data in that page at the page->virtual mapping
|
||||
of that page. It is important to flush here to handle
|
||||
D-cache aliasing, to make sure these kernel stores are
|
||||
visible to user space mappings of that page.
|
||||
The phrase "kernel writes to a page cache page" means, specifically,
|
||||
that the kernel executes store instructions that dirty data in that
|
||||
page at the page->virtual mapping of that page. It is important to
|
||||
flush here to handle D-cache aliasing, to make sure these kernel stores
|
||||
are visible to user space mappings of that page.
|
||||
|
||||
The corollary case is just as important, if there are users
|
||||
which have shared+writable mappings of this file, we must make
|
||||
sure that kernel reads of these pages will see the most recent
|
||||
stores done by the user.
|
||||
The corollary case is just as important, if there are users which have
|
||||
shared+writable mappings of this file, we must make sure that kernel
|
||||
reads of these pages will see the most recent stores done by the user.
|
||||
|
||||
If D-cache aliasing is not an issue, this routine may
|
||||
simply be defined as a nop on that architecture.
|
||||
If D-cache aliasing is not an issue, this routine may simply be defined
|
||||
as a nop on that architecture.
|
||||
|
||||
There is a bit set aside in page->flags (PG_arch_1) as
|
||||
"architecture private". The kernel guarantees that,
|
||||
for pagecache pages, it will clear this bit when such
|
||||
a page first enters the pagecache.
|
||||
There is a bit set aside in page->flags (PG_arch_1) as "architecture
|
||||
private". The kernel guarantees that, for pagecache pages, it will
|
||||
clear this bit when such a page first enters the pagecache.
|
||||
|
||||
This allows these interfaces to be implemented much more
|
||||
efficiently. It allows one to "defer" (perhaps indefinitely)
|
||||
the actual flush if there are currently no user processes
|
||||
mapping this page. See sparc64's flush_dcache_page and
|
||||
update_mmu_cache implementations for an example of how to go
|
||||
about doing this.
|
||||
This allows these interfaces to be implemented much more efficiently.
|
||||
It allows one to "defer" (perhaps indefinitely) the actual flush if
|
||||
there are currently no user processes mapping this page. See sparc64's
|
||||
flush_dcache_page and update_mmu_cache implementations for an example
|
||||
of how to go about doing this.
|
||||
|
||||
The idea is, first at flush_dcache_page() time, if
|
||||
page->mapping->i_mmap is an empty tree, just mark the architecture
|
||||
private page flag bit. Later, in update_mmu_cache(), a check is
|
||||
made of this flag bit, and if set the flush is done and the flag
|
||||
bit is cleared.
|
||||
The idea is, first at flush_dcache_page() time, if page_file_mapping()
|
||||
returns a mapping, and mapping_mapped on that mapping returns %false,
|
||||
just mark the architecture private page flag bit. Later, in
|
||||
update_mmu_cache(), a check is made of this flag bit, and if set the
|
||||
flush is done and the flag bit is cleared.
|
||||
|
||||
.. important::
|
||||
|
||||
|
|
@ -351,19 +352,6 @@ maps this page at its virtual address.
|
|||
architectures). For incoherent architectures, it should flush
|
||||
the cache of the page at vmaddr.
|
||||
|
||||
``void flush_kernel_dcache_page(struct page *page)``
|
||||
|
||||
When the kernel needs to modify a user page is has obtained
|
||||
with kmap, it calls this function after all modifications are
|
||||
complete (but before kunmapping it) to bring the underlying
|
||||
page up to date. It is assumed here that the user has no
|
||||
incoherent cached copies (i.e. the original page was obtained
|
||||
from a mechanism like get_user_pages()). The default
|
||||
implementation is a nop and should remain so on all coherent
|
||||
architectures. On incoherent architectures, this should flush
|
||||
the kernel cache for page (using page_address(page)).
|
||||
|
||||
|
||||
``void flush_icache_range(unsigned long start, unsigned long end)``
|
||||
|
||||
When the kernel stores into addresses that it will execute
|
||||
|
|
|
|||
|
|
@ -181,9 +181,16 @@ By default, KASAN prints a bug report only for the first invalid memory access.
|
|||
With ``kasan_multi_shot``, KASAN prints a report on every invalid access. This
|
||||
effectively disables ``panic_on_warn`` for KASAN reports.
|
||||
|
||||
Alternatively, independent of ``panic_on_warn`` the ``kasan.fault=`` boot
|
||||
parameter can be used to control panic and reporting behaviour:
|
||||
|
||||
- ``kasan.fault=report`` or ``=panic`` controls whether to only print a KASAN
|
||||
report or also panic the kernel (default: ``report``). The panic happens even
|
||||
if ``kasan_multi_shot`` is enabled.
|
||||
|
||||
Hardware tag-based KASAN mode (see the section about various modes below) is
|
||||
intended for use in production as a security mitigation. Therefore, it supports
|
||||
boot parameters that allow disabling KASAN or controlling its features.
|
||||
additional boot parameters that allow disabling KASAN or controlling features:
|
||||
|
||||
- ``kasan=off`` or ``=on`` controls whether KASAN is enabled (default: ``on``).
|
||||
|
||||
|
|
@ -199,10 +206,6 @@ boot parameters that allow disabling KASAN or controlling its features.
|
|||
- ``kasan.stacktrace=off`` or ``=on`` disables or enables alloc and free stack
|
||||
traces collection (default: ``on``).
|
||||
|
||||
- ``kasan.fault=report`` or ``=panic`` controls whether to only print a KASAN
|
||||
report or also panic the kernel (default: ``report``). The panic happens even
|
||||
if ``kasan_multi_shot`` is enabled.
|
||||
|
||||
Implementation details
|
||||
----------------------
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,81 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iommu/apple,dart.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Apple DART IOMMU
|
||||
|
||||
maintainers:
|
||||
- Sven Peter <sven@svenpeter.dev>
|
||||
|
||||
description: |+
|
||||
Apple SoCs may contain an implementation of their Device Address
|
||||
Resolution Table which provides a mandatory layer of address
|
||||
translations for various masters.
|
||||
|
||||
Each DART instance is capable of handling up to 16 different streams
|
||||
with individual pagetables and page-level read/write protection flags.
|
||||
|
||||
This DART IOMMU also raises interrupts in response to various
|
||||
fault conditions.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: apple,t8103-dart
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
description:
|
||||
Reference to the gate clock phandle if required for this IOMMU.
|
||||
Optional since not all IOMMUs are attached to a clock gate.
|
||||
|
||||
'#iommu-cells':
|
||||
const: 1
|
||||
description:
|
||||
Has to be one. The single cell describes the stream id emitted by
|
||||
a master to the IOMMU.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#iommu-cells'
|
||||
- interrupts
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |+
|
||||
dart1: iommu@82f80000 {
|
||||
compatible = "apple,t8103-dart";
|
||||
reg = <0x82f80000 0x4000>;
|
||||
interrupts = <1 781 4>;
|
||||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
master1 {
|
||||
iommus = <&dart1 0>;
|
||||
};
|
||||
|
||||
- |+
|
||||
dart2a: iommu@82f00000 {
|
||||
compatible = "apple,t8103-dart";
|
||||
reg = <0x82f00000 0x4000>;
|
||||
interrupts = <1 781 4>;
|
||||
#iommu-cells = <1>;
|
||||
};
|
||||
dart2b: iommu@82f80000 {
|
||||
compatible = "apple,t8103-dart";
|
||||
reg = <0x82f80000 0x4000>;
|
||||
interrupts = <1 781 4>;
|
||||
#iommu-cells = <1>;
|
||||
};
|
||||
|
||||
master2 {
|
||||
iommus = <&dart2a 0>, <&dart2b 1>;
|
||||
};
|
||||
|
|
@ -51,6 +51,23 @@ compatible (optional) - standard definition
|
|||
used as a shared pool of DMA buffers for a set of devices. It can
|
||||
be used by an operating system to instantiate the necessary pool
|
||||
management subsystem if necessary.
|
||||
- restricted-dma-pool: This indicates a region of memory meant to be
|
||||
used as a pool of restricted DMA buffers for a set of devices. The
|
||||
memory region would be the only region accessible to those devices.
|
||||
When using this, the no-map and reusable properties must not be set,
|
||||
so the operating system can create a virtual mapping that will be used
|
||||
for synchronization. The main purpose for restricted DMA is to
|
||||
mitigate the lack of DMA access control on systems without an IOMMU,
|
||||
which could result in the DMA accessing the system memory at
|
||||
unexpected times and/or unexpected addresses, possibly leading to data
|
||||
leakage or corruption. The feature on its own provides a basic level
|
||||
of protection against the DMA overwriting buffer contents at
|
||||
unexpected times. However, to protect against general data leakage and
|
||||
system memory corruption, the system needs to provide way to lock down
|
||||
the memory access, e.g., MPU. Note that since coherent allocation
|
||||
needs remapping, one must set up another device coherent pool by
|
||||
shared-dma-pool and use dma_alloc_from_dev_coherent instead for atomic
|
||||
coherent allocation.
|
||||
- vendor specific string in the form <vendor>,[<device>-]<usage>
|
||||
no-map (optional) - empty property
|
||||
- Indicates the operating system must not create a virtual mapping
|
||||
|
|
@ -85,10 +102,11 @@ memory-region-names (optional) - a list of names, one for each corresponding
|
|||
|
||||
Example
|
||||
-------
|
||||
This example defines 3 contiguous regions are defined for Linux kernel:
|
||||
This example defines 4 contiguous regions for Linux kernel:
|
||||
one default of all device drivers (named linux,cma@72000000 and 64MiB in size),
|
||||
one dedicated to the framebuffer device (named framebuffer@78000000, 8MiB), and
|
||||
one for multimedia processing (named multimedia-memory@77000000, 64MiB).
|
||||
one dedicated to the framebuffer device (named framebuffer@78000000, 8MiB),
|
||||
one for multimedia processing (named multimedia-memory@77000000, 64MiB), and
|
||||
one for restricted dma pool (named restricted_dma_reserved@0x50000000, 64MiB).
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
|
|
@ -120,6 +138,11 @@ one for multimedia processing (named multimedia-memory@77000000, 64MiB).
|
|||
compatible = "acme,multimedia-memory";
|
||||
reg = <0x77000000 0x4000000>;
|
||||
};
|
||||
|
||||
restricted_dma_reserved: restricted_dma_reserved {
|
||||
compatible = "restricted-dma-pool";
|
||||
reg = <0x50000000 0x4000000>;
|
||||
};
|
||||
};
|
||||
|
||||
/* ... */
|
||||
|
|
@ -138,4 +161,11 @@ one for multimedia processing (named multimedia-memory@77000000, 64MiB).
|
|||
memory-region = <&multimedia_reserved>;
|
||||
/* ... */
|
||||
};
|
||||
|
||||
pcie_device: pcie_device@0,0 {
|
||||
reg = <0x83010000 0x0 0x00000000 0x0 0x00100000
|
||||
0x83010000 0x0 0x00100000 0x0 0x00100000>;
|
||||
memory-region = <&restricted_dma_reserved>;
|
||||
/* ... */
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,105 @@
|
|||
============================
|
||||
NUMA resource associativity
|
||||
============================
|
||||
|
||||
Associativity represents the groupings of the various platform resources into
|
||||
domains of substantially similar mean performance relative to resources outside
|
||||
of that domain. Resources subsets of a given domain that exhibit better
|
||||
performance relative to each other than relative to other resources subsets
|
||||
are represented as being members of a sub-grouping domain. This performance
|
||||
characteristic is presented in terms of NUMA node distance within the Linux kernel.
|
||||
From the platform view, these groups are also referred to as domains.
|
||||
|
||||
PAPR interface currently supports different ways of communicating these resource
|
||||
grouping details to the OS. These are referred to as Form 0, Form 1 and Form2
|
||||
associativity grouping. Form 0 is the oldest format and is now considered deprecated.
|
||||
|
||||
Hypervisor indicates the type/form of associativity used via "ibm,architecture-vec-5 property".
|
||||
Bit 0 of byte 5 in the "ibm,architecture-vec-5" property indicates usage of Form 0 or Form 1.
|
||||
A value of 1 indicates the usage of Form 1 associativity. For Form 2 associativity
|
||||
bit 2 of byte 5 in the "ibm,architecture-vec-5" property is used.
|
||||
|
||||
Form 0
|
||||
------
|
||||
Form 0 associativity supports only two NUMA distances (LOCAL and REMOTE).
|
||||
|
||||
Form 1
|
||||
------
|
||||
With Form 1 a combination of ibm,associativity-reference-points, and ibm,associativity
|
||||
device tree properties are used to determine the NUMA distance between resource groups/domains.
|
||||
|
||||
The “ibm,associativity” property contains a list of one or more numbers (domainID)
|
||||
representing the resource’s platform grouping domains.
|
||||
|
||||
The “ibm,associativity-reference-points” property contains a list of one or more numbers
|
||||
(domainID index) that represents the 1 based ordinal in the associativity lists.
|
||||
The list of domainID indexes represents an increasing hierarchy of resource grouping.
|
||||
|
||||
ex:
|
||||
{ primary domainID index, secondary domainID index, tertiary domainID index.. }
|
||||
|
||||
Linux kernel uses the domainID at the primary domainID index as the NUMA node id.
|
||||
Linux kernel computes NUMA distance between two domains by recursively comparing
|
||||
if they belong to the same higher-level domains. For mismatch at every higher
|
||||
level of the resource group, the kernel doubles the NUMA distance between the
|
||||
comparing domains.
|
||||
|
||||
Form 2
|
||||
-------
|
||||
Form 2 associativity format adds separate device tree properties representing NUMA node distance
|
||||
thereby making the node distance computation flexible. Form 2 also allows flexible primary
|
||||
domain numbering. With numa distance computation now detached from the index value in
|
||||
"ibm,associativity-reference-points" property, Form 2 allows a large number of primary domain
|
||||
ids at the same domainID index representing resource groups of different performance/latency
|
||||
characteristics.
|
||||
|
||||
Hypervisor indicates the usage of FORM2 associativity using bit 2 of byte 5 in the
|
||||
"ibm,architecture-vec-5" property.
|
||||
|
||||
"ibm,numa-lookup-index-table" property contains a list of one or more numbers representing
|
||||
the domainIDs present in the system. The offset of the domainID in this property is
|
||||
used as an index while computing numa distance information via "ibm,numa-distance-table".
|
||||
|
||||
prop-encoded-array: The number N of the domainIDs encoded as with encode-int, followed by
|
||||
N domainID encoded as with encode-int
|
||||
|
||||
For ex:
|
||||
"ibm,numa-lookup-index-table" = {4, 0, 8, 250, 252}. The offset of domainID 8 (2) is used when
|
||||
computing the distance of domain 8 from other domains present in the system. For the rest of
|
||||
this document, this offset will be referred to as domain distance offset.
|
||||
|
||||
"ibm,numa-distance-table" property contains a list of one or more numbers representing the NUMA
|
||||
distance between resource groups/domains present in the system.
|
||||
|
||||
prop-encoded-array: The number N of the distance values encoded as with encode-int, followed by
|
||||
N distance values encoded as with encode-bytes. The max distance value we could encode is 255.
|
||||
The number N must be equal to the square of m where m is the number of domainIDs in the
|
||||
numa-lookup-index-table.
|
||||
|
||||
For ex:
|
||||
ibm,numa-lookup-index-table = <3 0 8 40>;
|
||||
ibm,numa-distace-table = <9>, /bits/ 8 < 10 20 80 20 10 160 80 160 10>;
|
||||
|
||||
::
|
||||
|
||||
| 0 8 40
|
||||
--|------------
|
||||
|
|
||||
0 | 10 20 80
|
||||
|
|
||||
8 | 20 10 160
|
||||
|
|
||||
40| 80 160 10
|
||||
|
||||
A possible "ibm,associativity" property for resources in node 0, 8 and 40
|
||||
|
||||
{ 3, 6, 7, 0 }
|
||||
{ 3, 6, 9, 8 }
|
||||
{ 3, 6, 7, 40}
|
||||
|
||||
With "ibm,associativity-reference-points" { 0x3 }
|
||||
|
||||
"ibm,lookup-index-table" helps in having a compact representation of distance matrix.
|
||||
Since domainID can be sparse, the matrix of distances can also be effectively sparse.
|
||||
With "ibm,lookup-index-table" we can achieve a compact representation of
|
||||
distance information.
|
||||
|
|
@ -7,6 +7,7 @@ powerpc
|
|||
.. toctree::
|
||||
:maxdepth: 1
|
||||
|
||||
associativity
|
||||
booting
|
||||
bootwrapper
|
||||
cpu_families
|
||||
|
|
|
|||
|
|
@ -298,15 +298,6 @@ HyperSparc cpu就是这样一个具有这种属性的cpu。
|
|||
用。默认的实现是nop（对于所有相干的架构应该保持这样）。对于不一致性
|
||||
的架构，它应该刷新vmaddr处的页面缓存。
|
||||
|
||||
``void flush_kernel_dcache_page(struct page *page)``
|
||||
|
||||
当内核需要修改一个用kmap获得的用户页时，它会在所有修改完成后（但在
|
||||
kunmapping之前）调用这个函数，以使底层页面达到最新状态。这里假定用
|
||||
户没有不一致性的缓存副本（即原始页面是从类似get_user_pages()的机制
|
||||
中获得的）。默认的实现是一个nop，在所有相干的架构上都应该如此。在不
|
||||
一致性的架构上，这应该刷新内核缓存中的页面（使用page_address(page)）。
|
||||
|
||||
|
||||
``void flush_icache_range(unsigned long start, unsigned long end)``
|
||||
|
||||
当内核存储到它将执行的地址中时（例如在加载模块时），这个函数被调用。
|
||||
|
|
|
|||
|
|
@ -180,7 +180,6 @@ Limitations
|
|||
===========
|
||||
- Not all page types are supported and never will. Most kernel internal
|
||||
objects cannot be recovered, only LRU pages for now.
|
||||
- Right now hugepage support is missing.
|
||||
|
||||
---
|
||||
Andi Kleen, Oct 2009
|
||||
|
|
|
|||
18
MAINTAINERS
18
MAINTAINERS
|
|
@ -1268,6 +1268,13 @@ L: linux-input@vger.kernel.org
|
|||
S: Odd fixes
|
||||
F: drivers/input/mouse/bcm5974.c
|
||||
|
||||
APPLE DART IOMMU DRIVER
|
||||
M: Sven Peter <sven@svenpeter.dev>
|
||||
L: iommu@lists.linux-foundation.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/iommu/apple,dart.yaml
|
||||
F: drivers/iommu/apple-dart.c
|
||||
|
||||
APPLE SMC DRIVER
|
||||
M: Henrik Rydberg <rydberg@bitmath.org>
|
||||
L: linux-hwmon@vger.kernel.org
|
||||
|
|
@ -6846,7 +6853,6 @@ F: Documentation/admin-guide/media/em28xx*
|
|||
F: drivers/media/usb/em28xx/
|
||||
|
||||
EMBEDDED LINUX
|
||||
M: Paul Gortmaker <paul.gortmaker@windriver.com>
|
||||
M: Matt Mackall <mpm@selenic.com>
|
||||
M: David Woodhouse <dwmw2@infradead.org>
|
||||
L: linux-embedded@vger.kernel.org
|
||||
|
|
@ -11120,7 +11126,7 @@ MARDUK (CREATOR CI40) DEVICE TREE SUPPORT
|
|||
M: Rahul Bedarkar <rahulbedarkar89@gmail.com>
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/mips/boot/dts/img/pistachio_marduk.dts
|
||||
F: arch/mips/boot/dts/img/pistachio*
|
||||
|
||||
MARVELL 88E6XXX ETHERNET SWITCH FABRIC DRIVER
|
||||
M: Andrew Lunn <andrew@lunn.ch>
|
||||
|
|
@ -14830,14 +14836,6 @@ S: Maintained
|
|||
W: http://www.st.com/spear
|
||||
F: drivers/pinctrl/spear/
|
||||
|
||||
PISTACHIO SOC SUPPORT
|
||||
M: James Hartley <james.hartley@sondrel.com>
|
||||
L: linux-mips@vger.kernel.org
|
||||
S: Odd Fixes
|
||||
F: arch/mips/boot/dts/img/pistachio*
|
||||
F: arch/mips/configs/pistachio*_defconfig
|
||||
F: arch/mips/pistachio/
|
||||
|
||||
PKTCDVD DRIVER
|
||||
M: linux-block@vger.kernel.org
|
||||
S: Orphan
|
||||
|
|
|
|||
|
|
@ -486,3 +486,5 @@
|
|||
554 common landlock_create_ruleset sys_landlock_create_ruleset
|
||||
555 common landlock_add_rule sys_landlock_add_rule
|
||||
556 common landlock_restrict_self sys_landlock_restrict_self
|
||||
# 557 reserved for memfd_secret
|
||||
558 common process_mrelease sys_process_mrelease
|
||||
|
|
|
|||
|
|
@ -291,6 +291,7 @@ extern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr
|
|||
#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
|
||||
extern void flush_dcache_page(struct page *);
|
||||
|
||||
#define ARCH_IMPLEMENTS_FLUSH_KERNEL_VMAP_RANGE 1
|
||||
static inline void flush_kernel_vmap_range(void *addr, int size)
|
||||
{
|
||||
if ((cache_is_vivt() || cache_is_vipt_aliasing()))
|
||||
|
|
@ -312,9 +313,6 @@ static inline void flush_anon_page(struct vm_area_struct *vma,
|
|||
__flush_anon_page(vma, page, vmaddr);
|
||||
}
|
||||
|
||||
#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
|
||||
extern void flush_kernel_dcache_page(struct page *);
|
||||
|
||||
#define flush_dcache_mmap_lock(mapping) xa_lock_irq(&mapping->i_pages)
|
||||
#define flush_dcache_mmap_unlock(mapping) xa_unlock_irq(&mapping->i_pages)
|
||||
|
||||
|
|
|
|||
|
|
@ -1012,31 +1012,25 @@ static void __init reserve_crashkernel(void)
|
|||
unsigned long long lowmem_max = __pa(high_memory - 1) + 1;
|
||||
if (crash_max > lowmem_max)
|
||||
crash_max = lowmem_max;
|
||||
crash_base = memblock_find_in_range(CRASH_ALIGN, crash_max,
|
||||
crash_size, CRASH_ALIGN);
|
||||
|
||||
crash_base = memblock_phys_alloc_range(crash_size, CRASH_ALIGN,
|
||||
CRASH_ALIGN, crash_max);
|
||||
if (!crash_base) {
|
||||
pr_err("crashkernel reservation failed - No suitable area found.\n");
|
||||
return;
|
||||
}
|
||||
} else {
|
||||
unsigned long long crash_max = crash_base + crash_size;
|
||||
unsigned long long start;
|
||||
|
||||
start = memblock_find_in_range(crash_base,
|
||||
crash_base + crash_size,
|
||||
crash_size, SECTION_SIZE);
|
||||
if (start != crash_base) {
|
||||
start = memblock_phys_alloc_range(crash_size, SECTION_SIZE,
|
||||
crash_base, crash_max);
|
||||
if (!start) {
|
||||
pr_err("crashkernel reservation failed - memory is in use.\n");
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
ret = memblock_reserve(crash_base, crash_size);
|
||||
if (ret < 0) {
|
||||
pr_warn("crashkernel reservation failed - memory is in use (0x%lx)\n",
|
||||
(unsigned long)crash_base);
|
||||
return;
|
||||
}
|
||||
|
||||
pr_info("Reserving %ldMB of memory at %ldMB for crashkernel (System RAM: %ldMB)\n",
|
||||
(unsigned long)(crash_size >> 20),
|
||||
(unsigned long)(crash_base >> 20),
|
||||
|
|
|
|||
|
|
@ -345,39 +345,6 @@ void flush_dcache_page(struct page *page)
|
|||
}
|
||||
EXPORT_SYMBOL(flush_dcache_page);
|
||||
|
||||
/*
|
||||
* Ensure cache coherency for the kernel mapping of this page. We can
|
||||
* assume that the page is pinned via kmap.
|
||||
*
|
||||
* If the page only exists in the page cache and there are no user
|
||||
* space mappings, this is a no-op since the page was already marked
|
||||
* dirty at creation. Otherwise, we need to flush the dirty kernel
|
||||
* cache lines directly.
|
||||
*/
|
||||
void flush_kernel_dcache_page(struct page *page)
|
||||
{
|
||||
if (cache_is_vivt() || cache_is_vipt_aliasing()) {
|
||||
struct address_space *mapping;
|
||||
|
||||
mapping = page_mapping_file(page);
|
||||
|
||||
if (!mapping || mapping_mapped(mapping)) {
|
||||
void *addr;
|
||||
|
||||
addr = page_address(page);
|
||||
/*
|
||||
* kmap_atomic() doesn't set the page virtual
|
||||
* address for highmem pages, and
|
||||
* kunmap_atomic() takes care of cache
|
||||
* flushing already.
|
||||
*/
|
||||
if (!IS_ENABLED(CONFIG_HIGHMEM) || addr)
|
||||
__cpuc_flush_dcache_area(addr, PAGE_SIZE);
|
||||
}
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(flush_kernel_dcache_page);
|
||||
|
||||
/*
|
||||
* Flush an anonymous page so that users of get_user_pages()
|
||||
* can safely access the data. The expected sequence is:
|
||||
|
|
|
|||
|
|
@ -166,12 +166,6 @@ void flush_dcache_page(struct page *page)
|
|||
}
|
||||
EXPORT_SYMBOL(flush_dcache_page);
|
||||
|
||||
void flush_kernel_dcache_page(struct page *page)
|
||||
{
|
||||
__cpuc_flush_dcache_area(page_address(page), PAGE_SIZE);
|
||||
}
|
||||
EXPORT_SYMBOL(flush_kernel_dcache_page);
|
||||
|
||||
void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
|
||||
unsigned long uaddr, void *dst, const void *src,
|
||||
unsigned long len)
|
||||
|
|
|
|||
|
|
@ -460,3 +460,5 @@
|
|||
444 common landlock_create_ruleset sys_landlock_create_ruleset
|
||||
445 common landlock_add_rule sys_landlock_add_rule
|
||||
446 common landlock_restrict_self sys_landlock_restrict_self
|
||||
# 447 reserved for memfd_secret
|
||||
448 common process_mrelease sys_process_mrelease
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@
|
|||
#define __ARM_NR_compat_set_tls (__ARM_NR_COMPAT_BASE + 5)
|
||||
#define __ARM_NR_COMPAT_END (__ARM_NR_COMPAT_BASE + 0x800)
|
||||
|
||||
#define __NR_compat_syscalls 447
|
||||
#define __NR_compat_syscalls 449
|
||||
#endif
|
||||
|
||||
#define __ARCH_WANT_SYS_CLONE
|
||||
|
|
|
|||
|
|
@ -901,6 +901,8 @@ __SYSCALL(__NR_landlock_create_ruleset, sys_landlock_create_ruleset)
|
|||
__SYSCALL(__NR_landlock_add_rule, sys_landlock_add_rule)
|
||||
#define __NR_landlock_restrict_self 446
|
||||
__SYSCALL(__NR_landlock_restrict_self, sys_landlock_restrict_self)
|
||||
#define __NR_process_mrelease 448
|
||||
__SYSCALL(__NR_process_mrelease, sys_process_mrelease)
|
||||
|
||||
/*
|
||||
* Please add new compat syscalls above this comment and update
|
||||
|
|
|
|||
|
|
@ -92,12 +92,10 @@ void __init kvm_hyp_reserve(void)
|
|||
* this is unmapped from the host stage-2, and fallback to PAGE_SIZE.
|
||||
*/
|
||||
hyp_mem_size = hyp_mem_pages << PAGE_SHIFT;
|
||||
hyp_mem_base = memblock_find_in_range(0, memblock_end_of_DRAM(),
|
||||
ALIGN(hyp_mem_size, PMD_SIZE),
|
||||
hyp_mem_base = memblock_phys_alloc(ALIGN(hyp_mem_size, PMD_SIZE),
|
||||
PMD_SIZE);
|
||||
if (!hyp_mem_base)
|
||||
hyp_mem_base = memblock_find_in_range(0, memblock_end_of_DRAM(),
|
||||
hyp_mem_size, PAGE_SIZE);
|
||||
hyp_mem_base = memblock_phys_alloc(hyp_mem_size, PAGE_SIZE);
|
||||
else
|
||||
hyp_mem_size = ALIGN(hyp_mem_size, PMD_SIZE);
|
||||
|
||||
|
|
@ -105,7 +103,6 @@ void __init kvm_hyp_reserve(void)
|
|||
kvm_err("Failed to reserve hyp memory\n");
|
||||
return;
|
||||
}
|
||||
memblock_reserve(hyp_mem_base, hyp_mem_size);
|
||||
|
||||
kvm_info("Reserved %lld MiB at 0x%llx\n", hyp_mem_size >> 20,
|
||||
hyp_mem_base);
|
||||
|
|
|
|||
|
|
@ -74,6 +74,7 @@ phys_addr_t arm64_dma_phys_limit __ro_after_init;
|
|||
static void __init reserve_crashkernel(void)
|
||||
{
|
||||
unsigned long long crash_base, crash_size;
|
||||
unsigned long long crash_max = arm64_dma_phys_limit;
|
||||
int ret;
|
||||
|
||||
ret = parse_crashkernel(boot_command_line, memblock_phys_mem_size(),
|
||||
|
|
@ -84,33 +85,18 @@ static void __init reserve_crashkernel(void)
|
|||
|
||||
crash_size = PAGE_ALIGN(crash_size);
|
||||
|
||||
if (crash_base == 0) {
|
||||
/* User specifies base address explicitly. */
|
||||
if (crash_base)
|
||||
crash_max = crash_base + crash_size;
|
||||
|
||||
/* Current arm64 boot protocol requires 2MB alignment */
|
||||
crash_base = memblock_find_in_range(0, arm64_dma_phys_limit,
|
||||
crash_size, SZ_2M);
|
||||
if (crash_base == 0) {
|
||||
crash_base = memblock_phys_alloc_range(crash_size, SZ_2M,
|
||||
crash_base, crash_max);
|
||||
if (!crash_base) {
|
||||
pr_warn("cannot allocate crashkernel (size:0x%llx)\n",
|
||||
crash_size);
|
||||
return;
|
||||
}
|
||||
} else {
|
||||
/* User specifies base address explicitly. */
|
||||
if (!memblock_is_region_memory(crash_base, crash_size)) {
|
||||
pr_warn("cannot reserve crashkernel: region is not memory\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (memblock_is_region_reserved(crash_base, crash_size)) {
|
||||
pr_warn("cannot reserve crashkernel: region overlaps reserved memory\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if (!IS_ALIGNED(crash_base, SZ_2M)) {
|
||||
pr_warn("cannot reserve crashkernel: base address is not 2MB aligned\n");
|
||||
return;
|
||||
}
|
||||
}
|
||||
memblock_reserve(crash_base, crash_size);
|
||||
|
||||
pr_info("crashkernel reserved: 0x%016llx - 0x%016llx (%lld MB)\n",
|
||||
crash_base, crash_base + crash_size, crash_size >> 20);
|
||||
|
|
|
|||
|
|
@ -56,17 +56,6 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr,
|
|||
}
|
||||
}
|
||||
|
||||
void flush_kernel_dcache_page(struct page *page)
|
||||
{
|
||||
struct address_space *mapping;
|
||||
|
||||
mapping = page_mapping_file(page);
|
||||
|
||||
if (!mapping || mapping_mapped(mapping))
|
||||
dcache_wbinv_all();
|
||||
}
|
||||
EXPORT_SYMBOL(flush_kernel_dcache_page);
|
||||
|
||||
void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
|
||||
unsigned long end)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -14,12 +14,10 @@ extern void flush_dcache_page(struct page *);
|
|||
#define flush_cache_page(vma, page, pfn) cache_wbinv_all()
|
||||
#define flush_cache_dup_mm(mm) cache_wbinv_all()
|
||||
|
||||
#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
|
||||
extern void flush_kernel_dcache_page(struct page *);
|
||||
|
||||
#define flush_dcache_mmap_lock(mapping) xa_lock_irq(&mapping->i_pages)
|
||||
#define flush_dcache_mmap_unlock(mapping) xa_unlock_irq(&mapping->i_pages)
|
||||
|
||||
#define ARCH_IMPLEMENTS_FLUSH_KERNEL_VMAP_RANGE 1
|
||||
static inline void flush_kernel_vmap_range(void *addr, int size)
|
||||
{
|
||||
dcache_wbinv_all();
|
||||
|
|
|
|||
|
|
@ -283,8 +283,7 @@ int __kprobes kprobe_fault_handler(struct pt_regs *regs, unsigned int trapnr)
|
|||
* normal page fault.
|
||||
*/
|
||||
regs->pc = (unsigned long) cur->addr;
|
||||
if (!instruction_pointer(regs))
|
||||
BUG();
|
||||
BUG_ON(!instruction_pointer(regs));
|
||||
|
||||
if (kcb->kprobe_status == KPROBE_REENTER)
|
||||
restore_previous_kprobe(kcb);
|
||||
|
|
|
|||
|
|
@ -29,7 +29,6 @@ struct rsvd_region {
|
|||
};
|
||||
|
||||
extern struct rsvd_region rsvd_region[IA64_MAX_RSVD_REGIONS + 1];
|
||||
extern int num_rsvd_regions;
|
||||
|
||||
extern void find_memory (void);
|
||||
extern void reserve_memory (void);
|
||||
|
|
@ -40,7 +39,6 @@ extern unsigned long efi_memmap_init(u64 *s, u64 *e);
|
|||
extern int find_max_min_low_pfn (u64, u64, void *);
|
||||
|
||||
extern unsigned long vmcore_find_descriptor_size(unsigned long address);
|
||||
extern int reserve_elfcorehdr(u64 *start, u64 *end);
|
||||
|
||||
/*
|
||||
* For rounding an address to the next IA64_GRANULE_SIZE or order
|
||||
|
|
|
|||
|
|
@ -906,6 +906,6 @@ EXPORT_SYMBOL(acpi_unregister_ioapic);
|
|||
/*
|
||||
* acpi_suspend_lowlevel() - save kernel state and suspend.
|
||||
*
|
||||
* TBD when when IA64 starts to support suspend...
|
||||
* TBD when IA64 starts to support suspend...
|
||||
*/
|
||||
int acpi_suspend_lowlevel(void) { return 0; }
|
||||
|
|
|
|||
|
|
@ -131,7 +131,7 @@ unsigned long ia64_cache_stride_shift = ~0;
|
|||
* We use a special marker for the end of memory and it uses the extra (+1) slot
|
||||
*/
|
||||
struct rsvd_region rsvd_region[IA64_MAX_RSVD_REGIONS + 1] __initdata;
|
||||
int num_rsvd_regions __initdata;
|
||||
static int num_rsvd_regions __initdata;
|
||||
|
||||
|
||||
/*
|
||||
|
|
@ -325,6 +325,31 @@ static inline void __init setup_crashkernel(unsigned long total, int *n)
|
|||
{}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CRASH_DUMP
|
||||
static int __init reserve_elfcorehdr(u64 *start, u64 *end)
|
||||
{
|
||||
u64 length;
|
||||
|
||||
/* We get the address using the kernel command line,
|
||||
* but the size is extracted from the EFI tables.
|
||||
* Both address and size are required for reservation
|
||||
* to work properly.
|
||||
*/
|
||||
|
||||
if (!is_vmcore_usable())
|
||||
return -EINVAL;
|
||||
|
||||
if ((length = vmcore_find_descriptor_size(elfcorehdr_addr)) == 0) {
|
||||
vmcore_unusable();
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
*start = (unsigned long)__va(elfcorehdr_addr);
|
||||
*end = *start + length;
|
||||
return 0;
|
||||
}
|
||||
#endif /* CONFIG_CRASH_DUMP */
|
||||
|
||||
/**
|
||||
* reserve_memory - setup reserved memory areas
|
||||
*
|
||||
|
|
@ -522,32 +547,6 @@ static __init int setup_nomca(char *s)
|
|||
}
|
||||
early_param("nomca", setup_nomca);
|
||||
|
||||
#ifdef CONFIG_CRASH_DUMP
|
||||
int __init reserve_elfcorehdr(u64 *start, u64 *end)
|
||||
{
|
||||
u64 length;
|
||||
|
||||
/* We get the address using the kernel command line,
|
||||
* but the size is extracted from the EFI tables.
|
||||
* Both address and size are required for reservation
|
||||
* to work properly.
|
||||
*/
|
||||
|
||||
if (!is_vmcore_usable())
|
||||
return -EINVAL;
|
||||
|
||||
if ((length = vmcore_find_descriptor_size(elfcorehdr_addr)) == 0) {
|
||||
vmcore_unusable();
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
*start = (unsigned long)__va(elfcorehdr_addr);
|
||||
*end = *start + length;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_PROC_VMCORE */
|
||||
|
||||
void __init
|
||||
setup_arch (char **cmdline_p)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -367,3 +367,5 @@
|
|||
444 common landlock_create_ruleset sys_landlock_create_ruleset
|
||||
445 common landlock_add_rule sys_landlock_add_rule
|
||||
446 common landlock_restrict_self sys_landlock_restrict_self
|
||||
# 447 reserved for memfd_secret
|
||||
448 common process_mrelease sys_process_mrelease
|
||||
|
|
|
|||
|
|
@ -446,3 +446,5 @@
|
|||
444 common landlock_create_ruleset sys_landlock_create_ruleset
|
||||
445 common landlock_add_rule sys_landlock_add_rule
|
||||
446 common landlock_restrict_self sys_landlock_restrict_self
|
||||
# 447 reserved for memfd_secret
|
||||
448 common process_mrelease sys_process_mrelease
|
||||
|
|
|
|||
|
|
@ -112,8 +112,7 @@ extern int page_is_ram(unsigned long pfn);
|
|||
# define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
|
||||
|
||||
# define ARCH_PFN_OFFSET (memory_start >> PAGE_SHIFT)
|
||||
# define pfn_valid(pfn) ((pfn) < (max_mapnr + ARCH_PFN_OFFSET))
|
||||
|
||||
# define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) < (max_mapnr + ARCH_PFN_OFFSET))
|
||||
# endif /* __ASSEMBLY__ */
|
||||
|
||||
#define virt_addr_valid(vaddr) (pfn_valid(virt_to_pfn(vaddr)))
|
||||
|
|
|
|||
|
|
@ -443,8 +443,6 @@ extern int mem_init_done;
|
|||
|
||||
asmlinkage void __init mmu_init(void);
|
||||
|
||||
void __init *early_get_page(void);
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
|
|
|
|||
|
|
@ -452,3 +452,5 @@
|
|||
444 common landlock_create_ruleset sys_landlock_create_ruleset
|
||||
445 common landlock_add_rule sys_landlock_add_rule
|
||||
446 common landlock_restrict_self sys_landlock_restrict_self
|
||||
# 447 reserved for memfd_secret
|
||||
448 common process_mrelease sys_process_mrelease
|
||||
|
|
|
|||
|
|
@ -265,18 +265,6 @@ asmlinkage void __init mmu_init(void)
|
|||
dma_contiguous_reserve(memory_start + lowmem_size - 1);
|
||||
}
|
||||
|
||||
/* This is only called until mem_init is done. */
|
||||
void __init *early_get_page(void)
|
||||
{
|
||||
/*
|
||||
* Mem start + kernel_tlb -> here is limit
|
||||
* because of mem mapping from head.S
|
||||
*/
|
||||
return memblock_alloc_try_nid_raw(PAGE_SIZE, PAGE_SIZE,
|
||||
MEMBLOCK_LOW_LIMIT, memory_start + kernel_tlb,
|
||||
NUMA_NO_NODE);
|
||||
}
|
||||
|
||||
void * __ref zalloc_maybe_bootmem(size_t size, gfp_t mask)
|
||||
{
|
||||
void *p;
|
||||
|
|
|
|||
|
|
@ -33,6 +33,7 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/mm_types.h>
|
||||
#include <linux/pgtable.h>
|
||||
#include <linux/memblock.h>
|
||||
|
||||
#include <asm/pgalloc.h>
|
||||
#include <linux/io.h>
|
||||
|
|
@ -242,15 +243,13 @@ unsigned long iopa(unsigned long addr)
|
|||
|
||||
__ref pte_t *pte_alloc_one_kernel(struct mm_struct *mm)
|
||||
{
|
||||
pte_t *pte;
|
||||
if (mem_init_done) {
|
||||
pte = (pte_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
|
||||
} else {
|
||||
pte = (pte_t *)early_get_page();
|
||||
if (pte)
|
||||
clear_page(pte);
|
||||
}
|
||||
return pte;
|
||||
if (mem_init_done)
|
||||
return (pte_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
|
||||
else
|
||||
return memblock_alloc_try_nid(PAGE_SIZE, PAGE_SIZE,
|
||||
MEMBLOCK_LOW_LIMIT,
|
||||
memory_start + kernel_tlb,
|
||||
NUMA_NO_NODE);
|
||||
}
|
||||
|
||||
void __set_fixmap(enum fixed_addresses idx, phys_addr_t phys, pgprot_t flags)
|
||||
|
|
|
|||
|
|
@ -21,7 +21,6 @@ platform-$(CONFIG_MIPS_MALTA) += mti-malta/
|
|||
platform-$(CONFIG_MACH_NINTENDO64) += n64/
|
||||
platform-$(CONFIG_NLM_COMMON) += netlogic/
|
||||
platform-$(CONFIG_PIC32MZDA) += pic32/
|
||||
platform-$(CONFIG_MACH_PISTACHIO) += pistachio/
|
||||
platform-$(CONFIG_RALINK) += ralink/
|
||||
platform-$(CONFIG_MIKROTIK_RB532) += rb532/
|
||||
platform-$(CONFIG_SGI_IP22) += sgi-ip22/
|
||||
|
|
|
|||
|
|
@ -514,35 +514,6 @@ config MACH_LOONGSON64
|
|||
and Loongson-2F which will be removed), developed by the Institute
|
||||
of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
|
||||
|
||||
config MACH_PISTACHIO
|
||||
bool "IMG Pistachio SoC based boards"
|
||||
select BOOT_ELF32
|
||||
select BOOT_RAW
|
||||
select CEVT_R4K
|
||||
select CLKSRC_MIPS_GIC
|
||||
select COMMON_CLK
|
||||
select CSRC_R4K
|
||||
select DMA_NONCOHERENT
|
||||
select GPIOLIB
|
||||
select IRQ_MIPS_CPU
|
||||
select MFD_SYSCON
|
||||
select MIPS_CPU_SCACHE
|
||||
select MIPS_GIC
|
||||
select PINCTRL
|
||||
select REGULATOR
|
||||
select SYS_HAS_CPU_MIPS32_R2
|
||||
select SYS_SUPPORTS_32BIT_KERNEL
|
||||
select SYS_SUPPORTS_LITTLE_ENDIAN
|
||||
select SYS_SUPPORTS_MIPS_CPS
|
||||
select SYS_SUPPORTS_MULTITHREADING
|
||||
select SYS_SUPPORTS_RELOCATABLE
|
||||
select SYS_SUPPORTS_ZBOOT
|
||||
select SYS_HAS_EARLY_PRINTK
|
||||
select USE_GENERIC_EARLY_PRINTK_8250
|
||||
select USE_OF
|
||||
help
|
||||
This enables support for the IMG Pistachio SoC platform.
|
||||
|
||||
config MIPS_MALTA
|
||||
bool "MIPS Malta board"
|
||||
select ARCH_MAY_HAVE_PC_FDC
|
||||
|
|
@ -1089,7 +1060,6 @@ source "arch/mips/ingenic/Kconfig"
|
|||
source "arch/mips/jazz/Kconfig"
|
||||
source "arch/mips/lantiq/Kconfig"
|
||||
source "arch/mips/pic32/Kconfig"
|
||||
source "arch/mips/pistachio/Kconfig"
|
||||
source "arch/mips/ralink/Kconfig"
|
||||
source "arch/mips/sgi-ip27/Kconfig"
|
||||
source "arch/mips/sibyte/Kconfig"
|
||||
|
|
|
|||
|
|
@ -560,6 +560,9 @@ sead3micro_defconfig-y := micro32r2el_defconfig BOARDS=sead-3
|
|||
legacy_defconfigs += xilfpga_defconfig
|
||||
xilfpga_defconfig-y := 32r2el_defconfig BOARDS=xilfpga
|
||||
|
||||
legacy_defconfigs += pistachio_defconfig
|
||||
pistachio_defconfig-y := 32r2el_defconfig BOARDS=marduk
|
||||
|
||||
.PHONY: $(legacy_defconfigs)
|
||||
$(legacy_defconfigs):
|
||||
$(Q)$(MAKE) -f $(srctree)/Makefile $($@-y)
|
||||
|
|
|
|||
|
|
@ -835,7 +835,7 @@ int __init db1200_dev_setup(void)
|
|||
if (!IS_ERR(c)) {
|
||||
pfc = clk_round_rate(c, 50000000);
|
||||
if ((pfc < 1) || (abs(50000000 - pfc) > 2500000))
|
||||
pr_warn("DB1200: cant get I2C close to 50MHz\n");
|
||||
pr_warn("DB1200: can't get I2C close to 50MHz\n");
|
||||
else
|
||||
clk_set_rate(c, pfc);
|
||||
clk_prepare_enable(c);
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
subdir-$(CONFIG_BMIPS_GENERIC) += brcm
|
||||
subdir-$(CONFIG_CAVIUM_OCTEON_SOC) += cavium-octeon
|
||||
subdir-$(CONFIG_MACH_PISTACHIO) += img
|
||||
subdir-$(CONFIG_FIT_IMAGE_FDT_MARDUK) += img
|
||||
subdir-$(CONFIG_FIT_IMAGE_FDT_BOSTON) += img
|
||||
subdir-$(CONFIG_MACH_INGENIC) += ingenic
|
||||
subdir-$(CONFIG_LANTIQ) += lantiq
|
||||
|
|
|
|||
|
|
@ -1,5 +1,4 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
dtb-$(CONFIG_FIT_IMAGE_FDT_BOSTON) += boston.dtb
|
||||
|
||||
dtb-$(CONFIG_MACH_PISTACHIO) += pistachio_marduk.dtb
|
||||
obj-$(CONFIG_MACH_PISTACHIO) += pistachio_marduk.dtb.o
|
||||
dtb-$(CONFIG_FIT_IMAGE_FDT_MARDUK) += pistachio_marduk.dtb
|
||||
|
|
|
|||
|
|
@ -900,6 +900,16 @@ timer {
|
|||
};
|
||||
};
|
||||
|
||||
cpc: cpc@1bde0000 {
|
||||
compatible = "mti,mips-cpc";
|
||||
reg = <0x1bde0000 0x10000>;
|
||||
};
|
||||
|
||||
cdmm: cdmm@1bdf0000 {
|
||||
compatible = "mti,mips-cdmm";
|
||||
reg = <0x1bdf0000 0x10000>;
|
||||
};
|
||||
|
||||
usb_phy: usb-phy {
|
||||
compatible = "img,pistachio-usb-phy";
|
||||
clocks = <&clk_core CLK_USB_PHY>;
|
||||
|
|
|
|||
|
|
@ -150,36 +150,47 @@ ethernet-ports {
|
|||
|
||||
port0: port@0 {
|
||||
reg = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
port1: port@1 {
|
||||
reg = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
port2: port@2 {
|
||||
reg = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
port3: port@3 {
|
||||
reg = <3>;
|
||||
status = "disabled";
|
||||
};
|
||||
port4: port@4 {
|
||||
reg = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
port5: port@5 {
|
||||
reg = <5>;
|
||||
status = "disabled";
|
||||
};
|
||||
port6: port@6 {
|
||||
reg = <6>;
|
||||
status = "disabled";
|
||||
};
|
||||
port7: port@7 {
|
||||
reg = <7>;
|
||||
status = "disabled";
|
||||
};
|
||||
port8: port@8 {
|
||||
reg = <8>;
|
||||
status = "disabled";
|
||||
};
|
||||
port9: port@9 {
|
||||
reg = <9>;
|
||||
status = "disabled";
|
||||
};
|
||||
port10: port@10 {
|
||||
reg = <10>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -69,40 +69,52 @@ phy4: ethernet-phy@3 {
|
|||
};
|
||||
|
||||
&port0 {
|
||||
status = "okay";
|
||||
phy-handle = <&phy0>;
|
||||
phy-mode = "internal";
|
||||
};
|
||||
|
||||
&port1 {
|
||||
status = "okay";
|
||||
phy-handle = <&phy1>;
|
||||
phy-mode = "internal";
|
||||
};
|
||||
|
||||
&port2 {
|
||||
status = "okay";
|
||||
phy-handle = <&phy2>;
|
||||
phy-mode = "internal";
|
||||
};
|
||||
|
||||
&port3 {
|
||||
status = "okay";
|
||||
phy-handle = <&phy3>;
|
||||
phy-mode = "internal";
|
||||
};
|
||||
|
||||
&port4 {
|
||||
status = "okay";
|
||||
phy-handle = <&phy7>;
|
||||
phy-mode = "sgmii";
|
||||
phys = <&serdes 4 SERDES1G(2)>;
|
||||
};
|
||||
|
||||
&port5 {
|
||||
status = "okay";
|
||||
phy-handle = <&phy4>;
|
||||
phy-mode = "sgmii";
|
||||
phys = <&serdes 5 SERDES1G(5)>;
|
||||
};
|
||||
|
||||
&port6 {
|
||||
status = "okay";
|
||||
phy-handle = <&phy6>;
|
||||
phy-mode = "sgmii";
|
||||
phys = <&serdes 6 SERDES1G(3)>;
|
||||
};
|
||||
|
||||
&port9 {
|
||||
status = "okay";
|
||||
phy-handle = <&phy5>;
|
||||
phy-mode = "sgmii";
|
||||
phys = <&serdes 9 SERDES1G(4)>;
|
||||
|
|
|
|||
|
|
@ -47,17 +47,25 @@ &mdio0 {
|
|||
};
|
||||
|
||||
&port0 {
|
||||
status = "okay";
|
||||
phy-handle = <&phy0>;
|
||||
phy-mode = "internal";
|
||||
};
|
||||
|
||||
&port1 {
|
||||
status = "okay";
|
||||
phy-handle = <&phy1>;
|
||||
phy-mode = "internal";
|
||||
};
|
||||
|
||||
&port2 {
|
||||
status = "okay";
|
||||
phy-handle = <&phy2>;
|
||||
phy-mode = "internal";
|
||||
};
|
||||
|
||||
&port3 {
|
||||
status = "okay";
|
||||
phy-handle = <&phy3>;
|
||||
phy-mode = "internal";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -44,7 +44,7 @@ static struct cvmx_bootmem_desc *cvmx_bootmem_desc;
|
|||
|
||||
/* See header file for descriptions of functions */
|
||||
|
||||
/**
|
||||
/*
|
||||
* This macro returns a member of the
|
||||
* cvmx_bootmem_named_block_desc_t structure. These members can't
|
||||
* be directly addressed as they might be in memory not directly
|
||||
|
|
@ -60,7 +60,7 @@ static struct cvmx_bootmem_desc *cvmx_bootmem_desc;
|
|||
offsetof(struct cvmx_bootmem_named_block_desc, field), \
|
||||
sizeof_field(struct cvmx_bootmem_named_block_desc, field))
|
||||
|
||||
/**
|
||||
/*
|
||||
* This function is the implementation of the get macros defined
|
||||
* for individual structure members. The argument are generated
|
||||
* by the macros inorder to read only the needed memory.
|
||||
|
|
@ -115,7 +115,7 @@ static uint64_t cvmx_bootmem_phy_get_next(uint64_t addr)
|
|||
return cvmx_read64_uint64((addr + NEXT_OFFSET) | (1ull << 63));
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Allocate a block of memory from the free list that was
|
||||
* passed to the application by the bootloader within a specified
|
||||
* address range. This is an allocate-only algorithm, so
|
||||
|
|
@ -550,7 +550,7 @@ int __cvmx_bootmem_phy_free(uint64_t phy_addr, uint64_t size, uint32_t flags)
|
|||
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Finds a named memory block by name.
|
||||
* Also used for finding an unused entry in the named block table.
|
||||
*
|
||||
|
|
@ -657,7 +657,7 @@ struct cvmx_bootmem_named_block_desc *cvmx_bootmem_find_named_block(char *name)
|
|||
}
|
||||
EXPORT_SYMBOL(cvmx_bootmem_find_named_block);
|
||||
|
||||
/**
|
||||
/*
|
||||
* Frees a named block.
|
||||
*
|
||||
* @name: name of block to free
|
||||
|
|
|
|||
|
|
@ -42,14 +42,14 @@
|
|||
#include <asm/octeon/cvmx-pexp-defs.h>
|
||||
#include <asm/octeon/cvmx-pko-defs.h>
|
||||
|
||||
/**
|
||||
/*
|
||||
* This application uses this pointer to access the global queue
|
||||
* state. It points to a bootmem named block.
|
||||
*/
|
||||
__cvmx_cmd_queue_all_state_t *__cvmx_cmd_queue_state_ptr;
|
||||
EXPORT_SYMBOL_GPL(__cvmx_cmd_queue_state_ptr);
|
||||
|
||||
/**
|
||||
/*
|
||||
* Initialize the Global queue state pointer.
|
||||
*
|
||||
* Returns CVMX_CMD_QUEUE_SUCCESS or a failure code
|
||||
|
|
@ -57,23 +57,10 @@ EXPORT_SYMBOL_GPL(__cvmx_cmd_queue_state_ptr);
|
|||
static cvmx_cmd_queue_result_t __cvmx_cmd_queue_init_state_ptr(void)
|
||||
{
|
||||
char *alloc_name = "cvmx_cmd_queues";
|
||||
#if defined(CONFIG_CAVIUM_RESERVE32) && CONFIG_CAVIUM_RESERVE32
|
||||
extern uint64_t octeon_reserve32_memory;
|
||||
#endif
|
||||
|
||||
if (likely(__cvmx_cmd_queue_state_ptr))
|
||||
return CVMX_CMD_QUEUE_SUCCESS;
|
||||
|
||||
#if defined(CONFIG_CAVIUM_RESERVE32) && CONFIG_CAVIUM_RESERVE32
|
||||
if (octeon_reserve32_memory)
|
||||
__cvmx_cmd_queue_state_ptr =
|
||||
cvmx_bootmem_alloc_named_range(sizeof(*__cvmx_cmd_queue_state_ptr),
|
||||
octeon_reserve32_memory,
|
||||
octeon_reserve32_memory +
|
||||
(CONFIG_CAVIUM_RESERVE32 <<
|
||||
20) - 1, 128, alloc_name);
|
||||
else
|
||||
#endif
|
||||
__cvmx_cmd_queue_state_ptr =
|
||||
cvmx_bootmem_alloc_named(sizeof(*__cvmx_cmd_queue_state_ptr),
|
||||
128,
|
||||
|
|
@ -97,7 +84,7 @@ static cvmx_cmd_queue_result_t __cvmx_cmd_queue_init_state_ptr(void)
|
|||
return CVMX_CMD_QUEUE_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Initialize a command queue for use. The initial FPA buffer is
|
||||
* allocated and the hardware unit is configured to point to the
|
||||
* new command queue.
|
||||
|
|
@ -195,7 +182,7 @@ cvmx_cmd_queue_result_t cvmx_cmd_queue_initialize(cvmx_cmd_queue_id_t queue_id,
|
|||
}
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Shutdown a queue a free it's command buffers to the FPA. The
|
||||
* hardware connected to the queue must be stopped before this
|
||||
* function is called.
|
||||
|
|
@ -231,7 +218,7 @@ cvmx_cmd_queue_result_t cvmx_cmd_queue_shutdown(cvmx_cmd_queue_id_t queue_id)
|
|||
return CVMX_CMD_QUEUE_SUCCESS;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Return the number of command words pending in the queue. This
|
||||
* function may be relatively slow for some hardware units.
|
||||
*
|
||||
|
|
@ -287,7 +274,7 @@ int cvmx_cmd_queue_length(cvmx_cmd_queue_id_t queue_id)
|
|||
return CVMX_CMD_QUEUE_INVALID_PARAM;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Return the command buffer to be written to. The purpose of this
|
||||
* function is to allow CVMX routine access t othe low level buffer
|
||||
* for initial hardware setup. User applications should not call this
|
||||
|
|
|
|||
|
|
@ -44,7 +44,7 @@
|
|||
#include <asm/octeon/cvmx-gmxx-defs.h>
|
||||
#include <asm/octeon/cvmx-asxx-defs.h>
|
||||
|
||||
/**
|
||||
/*
|
||||
* Return the MII PHY address associated with the given IPD
|
||||
* port. A result of -1 means there isn't a MII capable PHY
|
||||
* connected to this port. On chips supporting multiple MII
|
||||
|
|
@ -189,7 +189,7 @@ int cvmx_helper_board_get_mii_address(int ipd_port)
|
|||
return -1;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* This function is the board specific method of determining an
|
||||
* ethernet ports link speed. Most Octeon boards have Marvell PHYs
|
||||
* and are handled by the fall through case. This function must be
|
||||
|
|
@ -274,7 +274,7 @@ union cvmx_helper_link_info __cvmx_helper_board_link_get(int ipd_port)
|
|||
return result;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* This function is called by cvmx_helper_interface_probe() after it
|
||||
* determines the number of ports Octeon can support on a specific
|
||||
* interface. This function is the per board location to override
|
||||
|
|
@ -320,7 +320,7 @@ int __cvmx_helper_board_interface_probe(int interface, int supported_ports)
|
|||
return supported_ports;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Get the clock type used for the USB block based on board type.
|
||||
* Used by the USB code for auto configuration of clock type.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -42,7 +42,7 @@
|
|||
#include <asm/octeon/cvmx-asxx-defs.h>
|
||||
#include <asm/octeon/cvmx-dbg-defs.h>
|
||||
|
||||
/**
|
||||
/*
|
||||
* Probe RGMII ports and determine the number present
|
||||
*
|
||||
* @interface: Interface to probe
|
||||
|
|
@ -88,7 +88,7 @@ int __cvmx_helper_rgmii_probe(int interface)
|
|||
return num_ports;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Put an RGMII interface in loopback mode. Internal packets sent
|
||||
* out will be received back again on the same port. Externally
|
||||
* received packets will echo back out.
|
||||
|
|
@ -120,7 +120,7 @@ void cvmx_helper_rgmii_internal_loopback(int port)
|
|||
cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Workaround ASX setup errata with CN38XX pass1
|
||||
*
|
||||
* @interface: Interface to setup
|
||||
|
|
@ -148,7 +148,7 @@ static int __cvmx_helper_errata_asx_pass1(int interface, int port,
|
|||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Configure all of the ASX, GMX, and PKO registers required
|
||||
* to get RGMII to function on the supplied interface.
|
||||
*
|
||||
|
|
@ -251,7 +251,7 @@ int __cvmx_helper_rgmii_enable(int interface)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Return the link state of an IPD/PKO port as returned by
|
||||
* auto negotiation. The result of this function may not match
|
||||
* Octeon's link config if auto negotiation has changed since
|
||||
|
|
@ -280,7 +280,7 @@ union cvmx_helper_link_info __cvmx_helper_rgmii_link_get(int ipd_port)
|
|||
return __cvmx_helper_board_link_get(ipd_port);
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Configure an IPD/PKO port for the specified link state. This
|
||||
* function does not influence auto negotiation at the PHY level.
|
||||
* The passed link state must always match the link state returned
|
||||
|
|
|
|||
|
|
@ -54,7 +54,7 @@ int __cvmx_helper_xaui_enumerate(int interface)
|
|||
return 1;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Probe a XAUI interface and determine the number of ports
|
||||
* connected to it. The XAUI interface should still be down
|
||||
* after this call.
|
||||
|
|
@ -102,7 +102,7 @@ int __cvmx_helper_xaui_probe(int interface)
|
|||
return __cvmx_helper_xaui_enumerate(interface);
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Bringup and enable a XAUI interface. After this call packet
|
||||
* I/O should be fully functional. This is called with IPD
|
||||
* enabled but PKO disabled.
|
||||
|
|
@ -249,7 +249,7 @@ int __cvmx_helper_xaui_enable(int interface)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Return the link state of an IPD/PKO port as returned by
|
||||
* auto negotiation. The result of this function may not match
|
||||
* Octeon's link config if auto negotiation has changed since
|
||||
|
|
@ -288,7 +288,7 @@ union cvmx_helper_link_info __cvmx_helper_xaui_link_get(int ipd_port)
|
|||
return result;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Configure an IPD/PKO port for the specified link state. This
|
||||
* function does not influence auto negotiation at the PHY level.
|
||||
* The passed link state must always match the link state returned
|
||||
|
|
|
|||
|
|
@ -46,7 +46,9 @@
|
|||
|
||||
|
||||
/**
|
||||
* __cvmx_interrupt_gmxx_rxx_int_en_enable enables all interrupt bits in cvmx_gmxx_rxx_int_en_t
|
||||
* __cvmx_interrupt_gmxx_rxx_int_en_enable - enable all interrupt bits in cvmx_gmxx_rxx_int_en_t
|
||||
* @index: interrupt register offset
|
||||
* @block: interrupt register block_id
|
||||
*/
|
||||
void __cvmx_interrupt_gmxx_rxx_int_en_enable(int index, int block)
|
||||
{
|
||||
|
|
@ -227,7 +229,9 @@ void __cvmx_interrupt_gmxx_rxx_int_en_enable(int index, int block)
|
|||
cvmx_write_csr(CVMX_GMXX_RXX_INT_EN(index, block), gmx_rx_int_en.u64);
|
||||
}
|
||||
/**
|
||||
* __cvmx_interrupt_pcsx_intx_en_reg_enable enables all interrupt bits in cvmx_pcsx_intx_en_reg_t
|
||||
* __cvmx_interrupt_pcsx_intx_en_reg_enable - enable all interrupt bits in cvmx_pcsx_intx_en_reg_t
|
||||
* @index: interrupt register offset
|
||||
* @block: interrupt register block_id
|
||||
*/
|
||||
void __cvmx_interrupt_pcsx_intx_en_reg_enable(int index, int block)
|
||||
{
|
||||
|
|
@ -268,7 +272,8 @@ void __cvmx_interrupt_pcsx_intx_en_reg_enable(int index, int block)
|
|||
cvmx_write_csr(CVMX_PCSX_INTX_EN_REG(index, block), pcs_int_en_reg.u64);
|
||||
}
|
||||
/**
|
||||
* __cvmx_interrupt_pcsxx_int_en_reg_enable enables all interrupt bits in cvmx_pcsxx_int_en_reg_t
|
||||
* __cvmx_interrupt_pcsxx_int_en_reg_enable - enable all interrupt bits in cvmx_pcsxx_int_en_reg_t
|
||||
* @index: interrupt register block_id
|
||||
*/
|
||||
void __cvmx_interrupt_pcsxx_int_en_reg_enable(int index)
|
||||
{
|
||||
|
|
@ -298,7 +303,8 @@ void __cvmx_interrupt_pcsxx_int_en_reg_enable(int index)
|
|||
}
|
||||
|
||||
/**
|
||||
* __cvmx_interrupt_spxx_int_msk_enable enables all interrupt bits in cvmx_spxx_int_msk_t
|
||||
* __cvmx_interrupt_spxx_int_msk_enable - enable all interrupt bits in cvmx_spxx_int_msk_t
|
||||
* @index: interrupt register block_id
|
||||
*/
|
||||
void __cvmx_interrupt_spxx_int_msk_enable(int index)
|
||||
{
|
||||
|
|
@ -337,7 +343,8 @@ void __cvmx_interrupt_spxx_int_msk_enable(int index)
|
|||
cvmx_write_csr(CVMX_SPXX_INT_MSK(index), spx_int_msk.u64);
|
||||
}
|
||||
/**
|
||||
* __cvmx_interrupt_stxx_int_msk_enable enables all interrupt bits in cvmx_stxx_int_msk_t
|
||||
* __cvmx_interrupt_stxx_int_msk_enable - enable all interrupt bits in cvmx_stxx_int_msk_t
|
||||
* @index: interrupt register block_id
|
||||
*/
|
||||
void __cvmx_interrupt_stxx_int_msk_enable(int index)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -281,7 +281,7 @@ uint64_t cvmx_l2c_read_perf(uint32_t counter)
|
|||
}
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* @INTERNAL
|
||||
* Helper function use to fault in cache lines for L2 cache locking
|
||||
*
|
||||
|
|
@ -575,7 +575,7 @@ union __cvmx_l2c_tag {
|
|||
};
|
||||
|
||||
|
||||
/**
|
||||
/*
|
||||
* @INTERNAL
|
||||
* Function to read a L2C tag. This code make the current core
|
||||
* the 'debug core' for the L2. This code must only be executed by
|
||||
|
|
@ -764,9 +764,8 @@ int cvmx_l2c_get_cache_size_bytes(void)
|
|||
CVMX_CACHE_LINE_SIZE;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Return log base 2 of the number of sets in the L2 cache
|
||||
* Returns
|
||||
*/
|
||||
int cvmx_l2c_get_set_bits(void)
|
||||
{
|
||||
|
|
@ -857,7 +856,7 @@ int cvmx_l2c_get_num_assoc(void)
|
|||
return l2_assoc;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Flush a line from the L2 cache
|
||||
* This should only be called from one core at a time, as this routine
|
||||
* sets the core to the 'debug' core in order to flush the line.
|
||||
|
|
|
|||
|
|
@ -35,7 +35,7 @@
|
|||
#include <asm/octeon/cvmx-pko.h>
|
||||
#include <asm/octeon/cvmx-helper.h>
|
||||
|
||||
/**
|
||||
/*
|
||||
* Internal state of packet output
|
||||
*/
|
||||
|
||||
|
|
@ -176,7 +176,7 @@ static void __cvmx_pko_chip_init(void)
|
|||
}
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Call before any other calls to initialize the packet
|
||||
* output system. This does chip global config, and should only be
|
||||
* done by one core.
|
||||
|
|
@ -229,7 +229,7 @@ void cvmx_pko_initialize_global(void)
|
|||
}
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* This function does per-core initialization required by the PKO routines.
|
||||
* This must be called on all cores that will do packet output, and must
|
||||
* be called after the FPA has been initialized and filled with pages.
|
||||
|
|
@ -243,7 +243,7 @@ int cvmx_pko_initialize_local(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Enables the packet output hardware. It must already be
|
||||
* configured.
|
||||
*/
|
||||
|
|
@ -266,7 +266,7 @@ void cvmx_pko_enable(void)
|
|||
cvmx_write_csr(CVMX_PKO_REG_FLAGS, flags.u64);
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Disables the packet output. Does not affect any configuration.
|
||||
*/
|
||||
void cvmx_pko_disable(void)
|
||||
|
|
@ -278,7 +278,7 @@ void cvmx_pko_disable(void)
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(cvmx_pko_disable);
|
||||
|
||||
/**
|
||||
/*
|
||||
* Reset the packet output.
|
||||
*/
|
||||
static void __cvmx_pko_reset(void)
|
||||
|
|
@ -289,7 +289,7 @@ static void __cvmx_pko_reset(void)
|
|||
cvmx_write_csr(CVMX_PKO_REG_FLAGS, pko_reg_flags.u64);
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Shutdown and free resources required by packet output.
|
||||
*/
|
||||
void cvmx_pko_shutdown(void)
|
||||
|
|
@ -320,7 +320,7 @@ void cvmx_pko_shutdown(void)
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(cvmx_pko_shutdown);
|
||||
|
||||
/**
|
||||
/*
|
||||
* Configure a output port and the associated queues for use.
|
||||
*
|
||||
* @port: Port to configure.
|
||||
|
|
@ -548,7 +548,7 @@ cvmx_pko_status_t cvmx_pko_config_port(uint64_t port, uint64_t base_queue,
|
|||
}
|
||||
|
||||
#ifdef PKO_DEBUG
|
||||
/**
|
||||
/*
|
||||
* Show map of ports -> queues for different cores.
|
||||
*/
|
||||
void cvmx_pko_show_queue_map()
|
||||
|
|
@ -573,7 +573,7 @@ void cvmx_pko_show_queue_map()
|
|||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
/*
|
||||
* Rate limit a PKO port to a max packets/sec. This function is only
|
||||
* supported on CN51XX and higher, excluding CN58XX.
|
||||
*
|
||||
|
|
@ -606,7 +606,7 @@ int cvmx_pko_rate_limit_packets(int port, int packets_s, int burst)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Rate limit a PKO port to a max bits/sec. This function is only
|
||||
* supported on CN51XX and higher, excluding CN58XX.
|
||||
*
|
||||
|
|
|
|||
|
|
@ -66,7 +66,7 @@ static cvmx_spi_callbacks_t cvmx_spi_callbacks = {
|
|||
.interface_up_cb = cvmx_spi_interface_up_cb
|
||||
};
|
||||
|
||||
/**
|
||||
/*
|
||||
* Get current SPI4 initialization callbacks
|
||||
*
|
||||
* @callbacks: Pointer to the callbacks structure.to fill
|
||||
|
|
@ -78,7 +78,7 @@ void cvmx_spi_get_callbacks(cvmx_spi_callbacks_t *callbacks)
|
|||
memcpy(callbacks, &cvmx_spi_callbacks, sizeof(cvmx_spi_callbacks));
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Set new SPI4 initialization callbacks
|
||||
*
|
||||
* @new_callbacks: Pointer to an updated callbacks structure.
|
||||
|
|
@ -88,7 +88,7 @@ void cvmx_spi_set_callbacks(cvmx_spi_callbacks_t *new_callbacks)
|
|||
memcpy(&cvmx_spi_callbacks, new_callbacks, sizeof(cvmx_spi_callbacks));
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Initialize and start the SPI interface.
|
||||
*
|
||||
* @interface: The identifier of the packet interface to configure and
|
||||
|
|
@ -133,7 +133,7 @@ int cvmx_spi_start_interface(int interface, cvmx_spi_mode_t mode, int timeout,
|
|||
return res;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* This routine restarts the SPI interface after it has lost synchronization
|
||||
* with its correspondent system.
|
||||
*
|
||||
|
|
@ -179,7 +179,7 @@ int cvmx_spi_restart_interface(int interface, cvmx_spi_mode_t mode, int timeout)
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(cvmx_spi_restart_interface);
|
||||
|
||||
/**
|
||||
/*
|
||||
* Callback to perform SPI4 reset
|
||||
*
|
||||
* @interface: The identifier of the packet interface to configure and
|
||||
|
|
@ -294,7 +294,7 @@ int cvmx_spi_reset_cb(int interface, cvmx_spi_mode_t mode)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Callback to setup calendar and miscellaneous settings before clock detection
|
||||
*
|
||||
* @interface: The identifier of the packet interface to configure and
|
||||
|
|
@ -413,7 +413,7 @@ int cvmx_spi_calendar_setup_cb(int interface, cvmx_spi_mode_t mode,
|
|||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Callback to perform clock detection
|
||||
*
|
||||
* @interface: The identifier of the packet interface to configure and
|
||||
|
|
@ -491,7 +491,7 @@ int cvmx_spi_clock_detect_cb(int interface, cvmx_spi_mode_t mode, int timeout)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Callback to perform link training
|
||||
*
|
||||
* @interface: The identifier of the packet interface to configure and
|
||||
|
|
@ -560,7 +560,7 @@ int cvmx_spi_training_cb(int interface, cvmx_spi_mode_t mode, int timeout)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Callback to perform calendar data synchronization
|
||||
*
|
||||
* @interface: The identifier of the packet interface to configure and
|
||||
|
|
@ -617,7 +617,7 @@ int cvmx_spi_calendar_sync_cb(int interface, cvmx_spi_mode_t mode, int timeout)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Callback to handle interface up
|
||||
*
|
||||
* @interface: The identifier of the packet interface to configure and
|
||||
|
|
|
|||
|
|
@ -62,7 +62,7 @@ static void octeon_flash_map_copy_to(struct map_info *map, unsigned long to,
|
|||
up(&octeon_bootbus_sem);
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Module/ driver initialization.
|
||||
*
|
||||
* Returns Zero on success
|
||||
|
|
|
|||
|
|
@ -284,11 +284,6 @@ void octeon_crash_smp_send_stop(void)
|
|||
|
||||
#endif /* CONFIG_KEXEC */
|
||||
|
||||
#ifdef CONFIG_CAVIUM_RESERVE32
|
||||
uint64_t octeon_reserve32_memory;
|
||||
EXPORT_SYMBOL(octeon_reserve32_memory);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_KEXEC
|
||||
/* crashkernel cmdline parameter is parsed _after_ memory setup
|
||||
* we also parse it here (workaround for EHB5200) */
|
||||
|
|
@ -300,9 +295,10 @@ static int octeon_uart;
|
|||
extern asmlinkage void handle_int(void);
|
||||
|
||||
/**
|
||||
* Return non zero if we are currently running in the Octeon simulator
|
||||
* octeon_is_simulation - Return non-zero if we are currently running
|
||||
* in the Octeon simulator
|
||||
*
|
||||
* Returns
|
||||
* Return: non-0 if running in the Octeon simulator, 0 otherwise
|
||||
*/
|
||||
int octeon_is_simulation(void)
|
||||
{
|
||||
|
|
@ -311,10 +307,10 @@ int octeon_is_simulation(void)
|
|||
EXPORT_SYMBOL(octeon_is_simulation);
|
||||
|
||||
/**
|
||||
* Return true if Octeon is in PCI Host mode. This means
|
||||
* octeon_is_pci_host - Return true if Octeon is in PCI Host mode. This means
|
||||
* Linux can control the PCI bus.
|
||||
*
|
||||
* Returns Non zero if Octeon in host mode.
|
||||
* Return: Non-zero if Octeon is in host mode.
|
||||
*/
|
||||
int octeon_is_pci_host(void)
|
||||
{
|
||||
|
|
@ -326,9 +322,9 @@ int octeon_is_pci_host(void)
|
|||
}
|
||||
|
||||
/**
|
||||
* Get the clock rate of Octeon
|
||||
* octeon_get_clock_rate - Get the clock rate of Octeon
|
||||
*
|
||||
* Returns Clock rate in HZ
|
||||
* Return: Clock rate in HZ
|
||||
*/
|
||||
uint64_t octeon_get_clock_rate(void)
|
||||
{
|
||||
|
|
@ -348,11 +344,11 @@ EXPORT_SYMBOL(octeon_get_io_clock_rate);
|
|||
|
||||
|
||||
/**
|
||||
* Write to the LCD display connected to the bootbus. This display
|
||||
* exists on most Cavium evaluation boards. If it doesn't exist, then
|
||||
* this function doesn't do anything.
|
||||
*
|
||||
* octeon_write_lcd - Write to the LCD display connected to the bootbus.
|
||||
* @s: String to write
|
||||
*
|
||||
* This display exists on most Cavium evaluation boards. If it doesn't exist,
|
||||
* then this function doesn't do anything.
|
||||
*/
|
||||
static void octeon_write_lcd(const char *s)
|
||||
{
|
||||
|
|
@ -372,9 +368,9 @@ static void octeon_write_lcd(const char *s)
|
|||
}
|
||||
|
||||
/**
|
||||
* Return the console uart passed by the bootloader
|
||||
* octeon_get_boot_uart - Return the console uart passed by the bootloader
|
||||
*
|
||||
* Returns uart (0 or 1)
|
||||
* Return: uart number (0 or 1)
|
||||
*/
|
||||
static int octeon_get_boot_uart(void)
|
||||
{
|
||||
|
|
@ -383,9 +379,9 @@ static int octeon_get_boot_uart(void)
|
|||
}
|
||||
|
||||
/**
|
||||
* Get the coremask Linux was booted on.
|
||||
* octeon_get_boot_coremask - Get the coremask Linux was booted on.
|
||||
*
|
||||
* Returns Core mask
|
||||
* Return: Core mask
|
||||
*/
|
||||
int octeon_get_boot_coremask(void)
|
||||
{
|
||||
|
|
@ -393,7 +389,7 @@ int octeon_get_boot_coremask(void)
|
|||
}
|
||||
|
||||
/**
|
||||
* Check the hardware BIST results for a CPU
|
||||
* octeon_check_cpu_bist - Check the hardware BIST results for a CPU
|
||||
*/
|
||||
void octeon_check_cpu_bist(void)
|
||||
{
|
||||
|
|
@ -424,7 +420,7 @@ void octeon_check_cpu_bist(void)
|
|||
}
|
||||
|
||||
/**
|
||||
* Reboot Octeon
|
||||
* octeon_restart - Reboot Octeon
|
||||
*
|
||||
* @command: Command to pass to the bootloader. Currently ignored.
|
||||
*/
|
||||
|
|
@ -449,7 +445,7 @@ static void octeon_restart(char *command)
|
|||
|
||||
|
||||
/**
|
||||
* Permanently stop a core.
|
||||
* octeon_kill_core - Permanently stop a core.
|
||||
*
|
||||
* @arg: Ignored.
|
||||
*/
|
||||
|
|
@ -469,7 +465,7 @@ static void octeon_kill_core(void *arg)
|
|||
|
||||
|
||||
/**
|
||||
* Halt the system
|
||||
* octeon_halt - Halt the system
|
||||
*/
|
||||
static void octeon_halt(void)
|
||||
{
|
||||
|
|
@ -512,9 +508,9 @@ static void __init init_octeon_system_type(void)
|
|||
}
|
||||
|
||||
/**
|
||||
* Return a string representing the system type
|
||||
* octeon_board_type_string - Return a string representing the system type
|
||||
*
|
||||
* Returns
|
||||
* Return: system type string
|
||||
*/
|
||||
const char *octeon_board_type_string(void)
|
||||
{
|
||||
|
|
@ -655,7 +651,7 @@ void octeon_user_io_init(void)
|
|||
}
|
||||
|
||||
/**
|
||||
* Early entry point for arch setup
|
||||
* prom_init - Early entry point for arch setup
|
||||
*/
|
||||
void __init prom_init(void)
|
||||
{
|
||||
|
|
@ -665,9 +661,7 @@ void __init prom_init(void)
|
|||
int i;
|
||||
u64 t;
|
||||
int argc;
|
||||
#ifdef CONFIG_CAVIUM_RESERVE32
|
||||
int64_t addr = -1;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The bootloader passes a pointer to the boot descriptor in
|
||||
* $a3, this is available as fw_arg3.
|
||||
|
|
@ -782,25 +776,6 @@ void __init prom_init(void)
|
|||
cvmx_write_csr(CVMX_LED_UDD_DATX(1), 0);
|
||||
cvmx_write_csr(CVMX_LED_EN, 1);
|
||||
}
|
||||
#ifdef CONFIG_CAVIUM_RESERVE32
|
||||
/*
|
||||
* We need to temporarily allocate all memory in the reserve32
|
||||
* region. This makes sure the kernel doesn't allocate this
|
||||
* memory when it is getting memory from the
|
||||
* bootloader. Later, after the memory allocations are
|
||||
* complete, the reserve32 will be freed.
|
||||
*
|
||||
* Allocate memory for RESERVED32 aligned on 2MB boundary. This
|
||||
* is in case we later use hugetlb entries with it.
|
||||
*/
|
||||
addr = cvmx_bootmem_phy_named_block_alloc(CONFIG_CAVIUM_RESERVE32 << 20,
|
||||
0, 0, 2 << 20,
|
||||
"CAVIUM_RESERVE32", 0);
|
||||
if (addr < 0)
|
||||
pr_err("Failed to allocate CAVIUM_RESERVE32 memory area\n");
|
||||
else
|
||||
octeon_reserve32_memory = addr;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CAVIUM_OCTEON_LOCK_L2
|
||||
if (cvmx_read_csr(CVMX_L2D_FUS3) & (3ull << 34)) {
|
||||
|
|
@ -1078,16 +1053,6 @@ void __init plat_mem_setup(void)
|
|||
cvmx_bootmem_unlock();
|
||||
#endif /* CONFIG_CRASH_DUMP */
|
||||
|
||||
#ifdef CONFIG_CAVIUM_RESERVE32
|
||||
/*
|
||||
* Now that we've allocated the kernel memory it is safe to
|
||||
* free the reserved region. We free it here so that builtin
|
||||
* drivers can use the memory.
|
||||
*/
|
||||
if (octeon_reserve32_memory)
|
||||
cvmx_bootmem_free_named("CAVIUM_RESERVE32");
|
||||
#endif /* CONFIG_CAVIUM_RESERVE32 */
|
||||
|
||||
if (total == 0)
|
||||
panic("Unable to allocate memory from "
|
||||
"cvmx_bootmem_phy_alloc");
|
||||
|
|
|
|||
|
|
@ -91,7 +91,7 @@ static irqreturn_t mailbox_interrupt(int irq, void *dev_id)
|
|||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Cause the function described by call_data to be executed on the passed
|
||||
* cpu. When the function has finished, increment the finished field of
|
||||
* call_data.
|
||||
|
|
@ -115,7 +115,7 @@ static inline void octeon_send_ipi_mask(const struct cpumask *mask,
|
|||
octeon_send_ipi_single(i, action);
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Detect available CPUs, populate cpu_possible_mask
|
||||
*/
|
||||
static void octeon_smp_hotplug_setup(void)
|
||||
|
|
@ -202,9 +202,8 @@ int plat_post_relocation(long offset)
|
|||
}
|
||||
#endif /* CONFIG_RELOCATABLE */
|
||||
|
||||
/**
|
||||
/*
|
||||
* Firmware CPU startup hook
|
||||
*
|
||||
*/
|
||||
static int octeon_boot_secondary(int cpu, struct task_struct *idle)
|
||||
{
|
||||
|
|
@ -232,7 +231,7 @@ static int octeon_boot_secondary(int cpu, struct task_struct *idle)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* After we've done initial boot, this function is called to allow the
|
||||
* board code to clean up state, if needed
|
||||
*/
|
||||
|
|
@ -250,9 +249,8 @@ static void octeon_init_secondary(void)
|
|||
octeon_irq_setup_secondary();
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Callout to firmware before smp_init
|
||||
*
|
||||
*/
|
||||
static void __init octeon_prepare_cpus(unsigned int max_cpus)
|
||||
{
|
||||
|
|
@ -268,7 +266,7 @@ static void __init octeon_prepare_cpus(unsigned int max_cpus)
|
|||
}
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Last chance for the board code to finish SMP initialization before
|
||||
* the CPU is "online".
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -0,0 +1,53 @@
|
|||
CONFIG_FIT_IMAGE_FDT_MARDUK=y
|
||||
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
|
||||
CONFIG_CLKSRC_PISTACHIO=y
|
||||
|
||||
CONFIG_COMMON_CLK_PISTACHIO=y
|
||||
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_IMG_MDC_DMA=y
|
||||
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_GPIO_PCH=y
|
||||
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_IMG=y
|
||||
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_PLTFM=y
|
||||
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_STMMAC_ETH=y
|
||||
CONFIG_STMMAC_PLATFORM=y
|
||||
|
||||
CONFIG_PHY_PISTACHIO_USB=y
|
||||
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_PISTACHIO=y
|
||||
|
||||
CONFIG_RESET_PISTACHIO=y
|
||||
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_SERIAL_8250_DW=y
|
||||
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SRAM=y
|
||||
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_DWC2=y
|
||||
|
||||
CONFIG_CRYPTO_DEV_IMGTEC_HASH=y
|
||||
CONFIG_IMGPDC_WDT=y
|
||||
CONFIG_IR_IMG=y
|
||||
CONFIG_CC10001_ADC=y
|
||||
CONFIG_SND_SOC_IMG=y
|
||||
|
|
@ -1,316 +0,0 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_DEFAULT_HOSTNAME="localhost"
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_PREEMPT_VOLUNTARY=y
|
||||
CONFIG_IKCONFIG=m
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_LOG_BUF_SHIFT=18
|
||||
CONFIG_CGROUPS=y
|
||||
CONFIG_CGROUP_SCHED=y
|
||||
CONFIG_CFS_BANDWIDTH=y
|
||||
CONFIG_CGROUP_FREEZER=y
|
||||
CONFIG_NAMESPACES=y
|
||||
CONFIG_USER_NS=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
# CONFIG_RD_BZIP2 is not set
|
||||
# CONFIG_RD_LZMA is not set
|
||||
# CONFIG_RD_LZO is not set
|
||||
# CONFIG_RD_LZ4 is not set
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_EMBEDDED=y
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_MACH_PISTACHIO=y
|
||||
CONFIG_MIPS_CPS=y
|
||||
CONFIG_NR_CPUS=4
|
||||
CONFIG_PM_DEBUG=y
|
||||
CONFIG_PM_ADVANCED_DEBUG=y
|
||||
CONFIG_CPU_IDLE=y
|
||||
# CONFIG_MIPS_CPS_CPUIDLE is not set
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
CONFIG_MODULE_FORCE_UNLOAD=y
|
||||
CONFIG_PARTITION_ADVANCED=y
|
||||
# CONFIG_COMPACTION is not set
|
||||
CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
|
||||
CONFIG_ZSMALLOC=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_NET_KEY=m
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
CONFIG_IP_ADVANCED_ROUTER=y
|
||||
CONFIG_IP_MULTIPLE_TABLES=y
|
||||
CONFIG_IP_ROUTE_MULTIPATH=y
|
||||
CONFIG_IP_ROUTE_VERBOSE=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_MROUTE=y
|
||||
CONFIG_IP_PIMSM_V1=y
|
||||
CONFIG_IP_PIMSM_V2=y
|
||||
CONFIG_SYN_COOKIES=y
|
||||
CONFIG_INET_AH=m
|
||||
CONFIG_INET_ESP=m
|
||||
CONFIG_INET_IPCOMP=m
|
||||
CONFIG_INET_XFRM_MODE_TRANSPORT=m
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=m
|
||||
CONFIG_INET_XFRM_MODE_BEET=m
|
||||
# CONFIG_INET_DIAG is not set
|
||||
CONFIG_TCP_CONG_ADVANCED=y
|
||||
# CONFIG_TCP_CONG_BIC is not set
|
||||
# CONFIG_TCP_CONG_WESTWOOD is not set
|
||||
# CONFIG_TCP_CONG_HTCP is not set
|
||||
CONFIG_TCP_CONG_LP=m
|
||||
CONFIG_TCP_MD5SIG=y
|
||||
CONFIG_INET6_AH=m
|
||||
CONFIG_INET6_ESP=m
|
||||
CONFIG_INET6_XFRM_MODE_TRANSPORT=m
|
||||
CONFIG_INET6_XFRM_MODE_TUNNEL=m
|
||||
CONFIG_INET6_XFRM_MODE_BEET=m
|
||||
CONFIG_IPV6_SIT=m
|
||||
CONFIG_NETWORK_SECMARK=y
|
||||
CONFIG_NETFILTER=y
|
||||
# CONFIG_BRIDGE_NETFILTER is not set
|
||||
CONFIG_NF_CONNTRACK=y
|
||||
CONFIG_NF_CT_NETLINK=y
|
||||
CONFIG_NETFILTER_XT_MARK=m
|
||||
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
|
||||
CONFIG_NETFILTER_XT_TARGET_DSCP=y
|
||||
CONFIG_NETFILTER_XT_TARGET_NFLOG=y
|
||||
CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
|
||||
CONFIG_NETFILTER_XT_TARGET_SECMARK=y
|
||||
CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
|
||||
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
|
||||
CONFIG_NETFILTER_XT_MATCH_DSCP=y
|
||||
CONFIG_NETFILTER_XT_MATCH_POLICY=y
|
||||
CONFIG_NETFILTER_XT_MATCH_STATE=y
|
||||
CONFIG_NF_NAT_IPV4=m
|
||||
CONFIG_IP_NF_IPTABLES=y
|
||||
CONFIG_IP_NF_FILTER=y
|
||||
CONFIG_IP_NF_TARGET_REJECT=y
|
||||
CONFIG_IP_NF_MANGLE=y
|
||||
CONFIG_NF_NAT_IPV6=m
|
||||
CONFIG_IP6_NF_IPTABLES=m
|
||||
CONFIG_IP6_NF_MATCH_IPV6HEADER=m
|
||||
CONFIG_IP6_NF_FILTER=m
|
||||
CONFIG_IP6_NF_TARGET_REJECT=m
|
||||
CONFIG_IP6_NF_MANGLE=m
|
||||
CONFIG_BRIDGE=m
|
||||
CONFIG_VLAN_8021Q=m
|
||||
CONFIG_NET_SCHED=y
|
||||
CONFIG_NET_SCH_HTB=m
|
||||
CONFIG_NET_SCH_CODEL=m
|
||||
CONFIG_NET_SCH_FQ_CODEL=m
|
||||
CONFIG_NET_CLS_U32=m
|
||||
CONFIG_CLS_U32_MARK=y
|
||||
CONFIG_BT=m
|
||||
CONFIG_BT_RFCOMM=m
|
||||
CONFIG_BT_HCIBTUSB=m
|
||||
CONFIG_BT_HCIBFUSB=m
|
||||
CONFIG_BT_HCIVHCI=m
|
||||
CONFIG_CFG80211=m
|
||||
CONFIG_NL80211_TESTMODE=y
|
||||
CONFIG_CFG80211_DEBUGFS=y
|
||||
CONFIG_CFG80211_WEXT=y
|
||||
CONFIG_MAC80211=m
|
||||
CONFIG_MAC80211_LEDS=y
|
||||
CONFIG_MAC80211_DEBUGFS=y
|
||||
CONFIG_MAC80211_DEBUG_MENU=y
|
||||
CONFIG_MAC80211_VERBOSE_DEBUG=y
|
||||
CONFIG_RFKILL=y
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
CONFIG_DEBUG_DEVRES=y
|
||||
CONFIG_CONNECTOR=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_SPI_NOR=y
|
||||
CONFIG_MTD_UBI=y
|
||||
CONFIG_MTD_UBI_BLOCK=y
|
||||
CONFIG_ZRAM=m
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_BLK_DEV_SR=m
|
||||
CONFIG_SCSI_SPI_ATTRS=y
|
||||
CONFIG_MD=y
|
||||
CONFIG_BLK_DEV_DM=y
|
||||
CONFIG_DM_CRYPT=y
|
||||
CONFIG_DM_VERITY=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_TUN=m
|
||||
CONFIG_VETH=m
|
||||
# CONFIG_NET_VENDOR_MARVELL is not set
|
||||
# CONFIG_NET_VENDOR_MICREL is not set
|
||||
# CONFIG_NET_VENDOR_MICROCHIP is not set
|
||||
# CONFIG_NET_VENDOR_NATSEMI is not set
|
||||
# CONFIG_NET_VENDOR_SEEQ is not set
|
||||
# CONFIG_NET_VENDOR_SMSC is not set
|
||||
CONFIG_STMMAC_ETH=y
|
||||
# CONFIG_NET_VENDOR_VIA is not set
|
||||
CONFIG_PPP=m
|
||||
CONFIG_PPP_ASYNC=m
|
||||
CONFIG_USB_PEGASUS=m
|
||||
CONFIG_USB_RTL8150=m
|
||||
CONFIG_USB_RTL8152=m
|
||||
CONFIG_USB_NET_DM9601=m
|
||||
CONFIG_USB_NET_SMSC75XX=m
|
||||
CONFIG_USB_NET_SMSC95XX=m
|
||||
CONFIG_USB_NET_MCS7830=m
|
||||
# CONFIG_USB_NET_CDC_SUBSET is not set
|
||||
# CONFIG_USB_NET_ZAURUS is not set
|
||||
CONFIG_HOSTAP=m
|
||||
CONFIG_HOSTAP_FIRMWARE=y
|
||||
CONFIG_HOSTAP_FIRMWARE_NVRAM=y
|
||||
CONFIG_LIBERTAS_THINFIRM=m
|
||||
CONFIG_RT2X00=m
|
||||
CONFIG_RT2800USB=m
|
||||
CONFIG_MAC80211_HWSIM=m
|
||||
CONFIG_USB_NET_RNDIS_WLAN=m
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
# CONFIG_KEYBOARD_ATKBD is not set
|
||||
CONFIG_KEYBOARD_GPIO=y
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_VT is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_8250=y
|
||||
# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_8250_DW=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_TCG_TPM=y
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=m
|
||||
CONFIG_I2C_IMG=y
|
||||
CONFIG_I2C_STUB=m
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_BITBANG=m
|
||||
CONFIG_SPI_IMG_SPFI=y
|
||||
CONFIG_SPI_SPIDEV=y
|
||||
CONFIG_DEBUG_GPIO=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_POWER_SUPPLY=y
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_WATCHDOG=y
|
||||
CONFIG_IMGPDC_WDT=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_REGULATOR_GPIO=y
|
||||
CONFIG_RC_CORE=y
|
||||
CONFIG_RC_DEVICES=y
|
||||
CONFIG_IR_IMG=y
|
||||
CONFIG_IR_IMG_NEC=y
|
||||
CONFIG_IR_IMG_JVC=y
|
||||
CONFIG_IR_IMG_SONY=y
|
||||
CONFIG_IR_IMG_SHARP=y
|
||||
CONFIG_IR_IMG_SANYO=y
|
||||
CONFIG_IR_IMG_RC5=y
|
||||
CONFIG_IR_IMG_RC6=y
|
||||
CONFIG_MEDIA_SUPPORT=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_MODE_HELPERS=y
|
||||
# CONFIG_LCD_CLASS_DEVICE is not set
|
||||
CONFIG_BACKLIGHT_CLASS_DEVICE=y
|
||||
CONFIG_SOUND=y
|
||||
CONFIG_SND=y
|
||||
CONFIG_SND_HRTIMER=m
|
||||
CONFIG_SND_DYNAMIC_MINORS=y
|
||||
CONFIG_SND_SEQUENCER=m
|
||||
CONFIG_SND_SEQ_DUMMY=m
|
||||
# CONFIG_SND_SPI is not set
|
||||
CONFIG_SND_USB_AUDIO=m
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
|
||||
# CONFIG_USB_DEFAULT_PERSIST is not set
|
||||
CONFIG_USB_MON=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_ROOT_HUB_TT=y
|
||||
CONFIG_USB_ACM=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_DWC2=y
|
||||
CONFIG_USB_SERIAL=y
|
||||
CONFIG_USB_SERIAL_GENERIC=y
|
||||
CONFIG_USB_SERIAL_CP210X=m
|
||||
CONFIG_USB_SERIAL_FTDI_SIO=m
|
||||
CONFIG_USB_SERIAL_KEYSPAN=m
|
||||
CONFIG_USB_SERIAL_PL2303=m
|
||||
CONFIG_USB_SERIAL_OTI6858=m
|
||||
CONFIG_USB_SERIAL_QUALCOMM=m
|
||||
CONFIG_USB_SERIAL_SIERRAWIRELESS=m
|
||||
CONFIG_USB_SERIAL_OPTION=m
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_BLOCK_MINORS=16
|
||||
CONFIG_MMC_TEST=m
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_IMG_MDC_DMA=y
|
||||
CONFIG_STAGING=y
|
||||
CONFIG_ASHMEM=y
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
CONFIG_MEMORY=y
|
||||
CONFIG_IIO=y
|
||||
CONFIG_CC10001_ADC=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_IMG=y
|
||||
CONFIG_PHY_PISTACHIO_USB=y
|
||||
CONFIG_ANDROID=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_EXT4_FS_POSIX_ACL=y
|
||||
CONFIG_EXT4_FS_SECURITY=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_ZISOFS=y
|
||||
CONFIG_UDF_FS=m
|
||||
CONFIG_VFAT_FS=m
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_TMPFS_POSIX_ACL=y
|
||||
CONFIG_ECRYPT_FS=y
|
||||
CONFIG_HFSPLUS_FS=m
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_SQUASHFS=y
|
||||
CONFIG_SQUASHFS_FILE_DIRECT=y
|
||||
CONFIG_SQUASHFS_LZO=y
|
||||
CONFIG_PSTORE=y
|
||||
CONFIG_PSTORE_CONSOLE=y
|
||||
CONFIG_PSTORE_RAM=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NLS_DEFAULT="utf8"
|
||||
CONFIG_NLS_CODEPAGE_437=m
|
||||
CONFIG_NLS_ASCII=m
|
||||
CONFIG_NLS_ISO8859_1=m
|
||||
CONFIG_SECURITY=y
|
||||
CONFIG_SECURITY_NETWORK=y
|
||||
CONFIG_SECURITY_YAMA=y
|
||||
CONFIG_CRYPTO_AUTHENC=y
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_SHA1=y
|
||||
CONFIG_CRYPTO_SHA256=y
|
||||
CONFIG_CRYPTO_SHA512=m
|
||||
CONFIG_CRYPTO_ARC4=y
|
||||
CONFIG_CRYPTO_DES=y
|
||||
CONFIG_CRC_CCITT=y
|
||||
CONFIG_CRC_T10DIF=m
|
||||
CONFIG_CRC7=m
|
||||
# CONFIG_XZ_DEC_X86 is not set
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0
|
||||
# CONFIG_SCHED_DEBUG is not set
|
||||
CONFIG_SCHEDSTATS=y
|
||||
CONFIG_DEBUG_SPINLOCK=y
|
||||
CONFIG_DEBUG_CREDENTIALS=y
|
||||
CONFIG_FUNCTION_TRACER=y
|
||||
CONFIG_BLK_DEV_IO_TRACE=y
|
||||
CONFIG_LKDTM=y
|
||||
CONFIG_TEST_UDELAY=m
|
||||
|
|
@ -58,6 +58,12 @@ config FIT_IMAGE_FDT_BOSTON
|
|||
enable this if you wish to boot on a MIPS Boston board, as it is
|
||||
expected by the bootloader.
|
||||
|
||||
config FIT_IMAGE_FDT_MARDUK
|
||||
bool "Include FDT for IMG Pistachio Marduk (CI40) boards"
|
||||
help
|
||||
Enable this to include the FDT for the IMG Pistachio Marduk (CI40)
|
||||
from Imagination Technologies in the FIT kernel image.
|
||||
|
||||
config FIT_IMAGE_FDT_NI169445
|
||||
bool "Include FDT for NI 169445"
|
||||
help
|
||||
|
|
|
|||
|
|
@ -24,3 +24,4 @@ its-$(CONFIG_FIT_IMAGE_FDT_LUTON) += board-luton.its.S
|
|||
its-$(CONFIG_FIT_IMAGE_FDT_JAGUAR2) += board-jaguar2.its.S
|
||||
its-$(CONFIG_FIT_IMAGE_FDT_SERVAL) += board-serval.its.S
|
||||
its-$(CONFIG_FIT_IMAGE_FDT_XILFPGA) += board-xilfpga.its.S
|
||||
its-$(CONFIG_FIT_IMAGE_FDT_MARDUK) += board-marduk.its.S
|
||||
|
|
|
|||
|
|
@ -7,6 +7,8 @@
|
|||
* Copyright (C) 2020 Paul Cercueil <paul@crapouillou.net>
|
||||
*/
|
||||
|
||||
#include <linux/clk.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_fdt.h>
|
||||
#include <linux/pm.h>
|
||||
|
|
@ -21,6 +23,10 @@
|
|||
static __init char *ingenic_get_system_type(unsigned long machtype)
|
||||
{
|
||||
switch (machtype) {
|
||||
case MACH_INGENIC_X2100:
|
||||
return "X2100";
|
||||
case MACH_INGENIC_X2000H:
|
||||
return "X2000H";
|
||||
case MACH_INGENIC_X2000E:
|
||||
return "X2000E";
|
||||
case MACH_INGENIC_X2000:
|
||||
|
|
@ -37,8 +43,18 @@ static __init char *ingenic_get_system_type(unsigned long machtype)
|
|||
return "JZ4775";
|
||||
case MACH_INGENIC_JZ4770:
|
||||
return "JZ4770";
|
||||
case MACH_INGENIC_JZ4760B:
|
||||
return "JZ4760B";
|
||||
case MACH_INGENIC_JZ4760:
|
||||
return "JZ4760";
|
||||
case MACH_INGENIC_JZ4755:
|
||||
return "JZ4755";
|
||||
case MACH_INGENIC_JZ4750:
|
||||
return "JZ4750";
|
||||
case MACH_INGENIC_JZ4725B:
|
||||
return "JZ4725B";
|
||||
case MACH_INGENIC_JZ4730:
|
||||
return "JZ4730";
|
||||
default:
|
||||
return "JZ4740";
|
||||
}
|
||||
|
|
@ -61,8 +77,13 @@ static __init const void *ingenic_fixup_fdt(const void *fdt, const void *match_d
|
|||
}
|
||||
|
||||
static const struct of_device_id ingenic_of_match[] __initconst = {
|
||||
{ .compatible = "ingenic,jz4730", .data = (void *)MACH_INGENIC_JZ4730 },
|
||||
{ .compatible = "ingenic,jz4740", .data = (void *)MACH_INGENIC_JZ4740 },
|
||||
{ .compatible = "ingenic,jz4725b", .data = (void *)MACH_INGENIC_JZ4725B },
|
||||
{ .compatible = "ingenic,jz4750", .data = (void *)MACH_INGENIC_JZ4750 },
|
||||
{ .compatible = "ingenic,jz4755", .data = (void *)MACH_INGENIC_JZ4755 },
|
||||
{ .compatible = "ingenic,jz4760", .data = (void *)MACH_INGENIC_JZ4760 },
|
||||
{ .compatible = "ingenic,jz4760b", .data = (void *)MACH_INGENIC_JZ4760B },
|
||||
{ .compatible = "ingenic,jz4770", .data = (void *)MACH_INGENIC_JZ4770 },
|
||||
{ .compatible = "ingenic,jz4775", .data = (void *)MACH_INGENIC_JZ4775 },
|
||||
{ .compatible = "ingenic,jz4780", .data = (void *)MACH_INGENIC_JZ4780 },
|
||||
|
|
@ -71,6 +92,8 @@ static const struct of_device_id ingenic_of_match[] __initconst = {
|
|||
{ .compatible = "ingenic,x1830", .data = (void *)MACH_INGENIC_X1830 },
|
||||
{ .compatible = "ingenic,x2000", .data = (void *)MACH_INGENIC_X2000 },
|
||||
{ .compatible = "ingenic,x2000e", .data = (void *)MACH_INGENIC_X2000E },
|
||||
{ .compatible = "ingenic,x2000h", .data = (void *)MACH_INGENIC_X2000H },
|
||||
{ .compatible = "ingenic,x2100", .data = (void *)MACH_INGENIC_X2100 },
|
||||
{}
|
||||
};
|
||||
|
||||
|
|
@ -108,10 +131,36 @@ static const struct platform_suspend_ops ingenic_pm_ops __maybe_unused = {
|
|||
|
||||
static int __init ingenic_pm_init(void)
|
||||
{
|
||||
struct device_node *cpu_node;
|
||||
struct clk *cpu0_clk;
|
||||
int ret;
|
||||
|
||||
if (boot_cpu_type() == CPU_XBURST) {
|
||||
if (IS_ENABLED(CONFIG_PM_SLEEP))
|
||||
suspend_set_ops(&ingenic_pm_ops);
|
||||
_machine_halt = ingenic_halt;
|
||||
|
||||
/*
|
||||
* Unconditionally enable the clock for the first CPU.
|
||||
* This makes sure that the PLL that feeds the CPU won't be
|
||||
* stopped while the kernel is running.
|
||||
*/
|
||||
cpu_node = of_get_cpu_node(0, NULL);
|
||||
if (!cpu_node) {
|
||||
pr_err("Unable to get CPU node\n");
|
||||
} else {
|
||||
cpu0_clk = of_clk_get(cpu_node, 0);
|
||||
if (IS_ERR(cpu0_clk)) {
|
||||
pr_err("Unable to get CPU0 clock\n");
|
||||
return PTR_ERR(cpu0_clk);
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(cpu0_clk);
|
||||
if (ret) {
|
||||
pr_err("Unable to enable CPU0 clock\n");
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,22 @@
|
|||
/ {
|
||||
images {
|
||||
fdt-marduk {
|
||||
description = "img,pistachio-marduk Device Tree";
|
||||
data = /incbin/("boot/dts/img/pistachio_marduk.dtb");
|
||||
type = "flat_dt";
|
||||
arch = "mips";
|
||||
compression = "none";
|
||||
hash {
|
||||
algo = "sha1";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
configurations {
|
||||
conf-marduk {
|
||||
description = "Marduk Linux kernel";
|
||||
kernel = "kernel";
|
||||
fdt = "fdt-marduk";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -26,13 +26,13 @@ static __init bool ocelot_detect(void)
|
|||
tlb_probe_hazard();
|
||||
idx = read_c0_index();
|
||||
if (idx < 0)
|
||||
return 0;
|
||||
return false;
|
||||
|
||||
/* A TLB entry exists, lets assume its usable and check the CHIP ID */
|
||||
rev = __raw_readl((void __iomem *)DEVCPU_GCB_CHIP_REGS_CHIP_ID);
|
||||
|
||||
if ((rev & CHIP_ID_PART_ID) != OCELOT_PART_ID)
|
||||
return 0;
|
||||
return false;
|
||||
|
||||
/* Copy command line from bootloader early for Initrd detection */
|
||||
if (fw_arg0 < 10 && (fw_arg1 & 0xFFF00000) == 0x80000000) {
|
||||
|
|
@ -44,7 +44,7 @@ static __init bool ocelot_detect(void)
|
|||
strcpy(arcs_cmdline, prom_argv[1]);
|
||||
}
|
||||
|
||||
return 1;
|
||||
return true;
|
||||
}
|
||||
|
||||
static void __init ocelot_earlyprintk_init(void)
|
||||
|
|
|
|||
|
|
@ -206,7 +206,7 @@ ATOMIC_OPS(atomic64, xor, s64, ^=, xor, lld, scd)
|
|||
* The function returns the old value of @v minus @i.
|
||||
*/
|
||||
#define ATOMIC_SIP_OP(pfx, type, op, ll, sc) \
|
||||
static __inline__ int arch_##pfx##_sub_if_positive(type i, pfx##_t * v) \
|
||||
static __inline__ type arch_##pfx##_sub_if_positive(type i, pfx##_t * v) \
|
||||
{ \
|
||||
type temp, result; \
|
||||
\
|
||||
|
|
|
|||
|
|
@ -75,6 +75,7 @@ enum ingenic_machine_type {
|
|||
MACH_INGENIC_JZ4750,
|
||||
MACH_INGENIC_JZ4755,
|
||||
MACH_INGENIC_JZ4760,
|
||||
MACH_INGENIC_JZ4760B,
|
||||
MACH_INGENIC_JZ4770,
|
||||
MACH_INGENIC_JZ4775,
|
||||
MACH_INGENIC_JZ4780,
|
||||
|
|
@ -83,6 +84,8 @@ enum ingenic_machine_type {
|
|||
MACH_INGENIC_X1830,
|
||||
MACH_INGENIC_X2000,
|
||||
MACH_INGENIC_X2000E,
|
||||
MACH_INGENIC_X2000H,
|
||||
MACH_INGENIC_X2100,
|
||||
};
|
||||
|
||||
extern char *system_type;
|
||||
|
|
|
|||
|
|
@ -125,13 +125,7 @@ static inline void kunmap_noncoherent(void)
|
|||
kunmap_coherent();
|
||||
}
|
||||
|
||||
#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
|
||||
static inline void flush_kernel_dcache_page(struct page *page)
|
||||
{
|
||||
BUG_ON(cpu_has_dc_aliases && PageHighMem(page));
|
||||
flush_dcache_page(page);
|
||||
}
|
||||
|
||||
#define ARCH_IMPLEMENTS_FLUSH_KERNEL_VMAP_RANGE 1
|
||||
/*
|
||||
* For now flush_kernel_vmap_range and invalidate_kernel_vmap_range both do a
|
||||
* cache writeback and invalidate operation.
|
||||
|
|
|
|||
|
|
@ -46,8 +46,8 @@
|
|||
#define PRID_COMP_NETLOGIC 0x0c0000
|
||||
#define PRID_COMP_CAVIUM 0x0d0000
|
||||
#define PRID_COMP_LOONGSON 0x140000
|
||||
#define PRID_COMP_INGENIC_13 0x130000 /* X2000 */
|
||||
#define PRID_COMP_INGENIC_D0 0xd00000 /* JZ4740, JZ4750, X1830 */
|
||||
#define PRID_COMP_INGENIC_13 0x130000 /* X2000, X2100 */
|
||||
#define PRID_COMP_INGENIC_D0 0xd00000 /* JZ4730, JZ4740, JZ4750, JZ4755, JZ4760, X1830 */
|
||||
#define PRID_COMP_INGENIC_D1 0xd10000 /* JZ4770, JZ4775, X1000 */
|
||||
#define PRID_COMP_INGENIC_E1 0xe10000 /* JZ4780 */
|
||||
|
||||
|
|
|
|||
|
|
@ -76,13 +76,13 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len,
|
|||
if (copy_from_user(&new_mask, user_mask_ptr, sizeof(new_mask)))
|
||||
return -EFAULT;
|
||||
|
||||
get_online_cpus();
|
||||
cpus_read_lock();
|
||||
rcu_read_lock();
|
||||
|
||||
p = find_process_by_pid(pid);
|
||||
if (!p) {
|
||||
rcu_read_unlock();
|
||||
put_online_cpus();
|
||||
cpus_read_unlock();
|
||||
return -ESRCH;
|
||||
}
|
||||
|
||||
|
|
@ -147,7 +147,7 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len,
|
|||
free_cpumask_var(cpus_allowed);
|
||||
out_put_task:
|
||||
put_task_struct(p);
|
||||
put_online_cpus();
|
||||
cpus_read_unlock();
|
||||
return retval;
|
||||
}
|
||||
|
||||
|
|
@ -166,7 +166,7 @@ asmlinkage long mipsmt_sys_sched_getaffinity(pid_t pid, unsigned int len,
|
|||
if (len < real_len)
|
||||
return -EINVAL;
|
||||
|
||||
get_online_cpus();
|
||||
cpus_read_lock();
|
||||
rcu_read_lock();
|
||||
|
||||
retval = -ESRCH;
|
||||
|
|
@ -182,7 +182,7 @@ asmlinkage long mipsmt_sys_sched_getaffinity(pid_t pid, unsigned int len,
|
|||
|
||||
out_unlock:
|
||||
rcu_read_unlock();
|
||||
put_online_cpus();
|
||||
cpus_read_unlock();
|
||||
if (retval)
|
||||
return retval;
|
||||
if (copy_to_user(user_mask_ptr, &mask, real_len))
|
||||
|
|
|
|||
|
|
@ -859,10 +859,10 @@ int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
|
|||
* scheduled in then it will already have picked up the new FP mode
|
||||
* whilst doing so.
|
||||
*/
|
||||
get_online_cpus();
|
||||
cpus_read_lock();
|
||||
for_each_cpu_and(cpu, &process_cpus, cpu_online_mask)
|
||||
work_on_cpu(cpu, prepare_for_fp_mode_switch, NULL);
|
||||
put_online_cpus();
|
||||
cpus_read_unlock();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -452,8 +452,9 @@ static void __init mips_parse_crashkernel(void)
|
|||
return;
|
||||
|
||||
if (crash_base <= 0) {
|
||||
crash_base = memblock_find_in_range(CRASH_ALIGN, CRASH_ADDR_MAX,
|
||||
crash_size, CRASH_ALIGN);
|
||||
crash_base = memblock_phys_alloc_range(crash_size, CRASH_ALIGN,
|
||||
CRASH_ALIGN,
|
||||
CRASH_ADDR_MAX);
|
||||
if (!crash_base) {
|
||||
pr_warn("crashkernel reservation failed - No suitable area found.\n");
|
||||
return;
|
||||
|
|
@ -461,8 +462,9 @@ static void __init mips_parse_crashkernel(void)
|
|||
} else {
|
||||
unsigned long long start;
|
||||
|
||||
start = memblock_find_in_range(crash_base, crash_base + crash_size,
|
||||
crash_size, 1);
|
||||
start = memblock_phys_alloc_range(crash_size, 1,
|
||||
crash_base,
|
||||
crash_base + crash_size);
|
||||
if (start != crash_base) {
|
||||
pr_warn("Invalid memory region reserved for crash kernel\n");
|
||||
return;
|
||||
|
|
@ -656,10 +658,6 @@ static void __init arch_mem_init(char **cmdline_p)
|
|||
mips_reserve_vmcore();
|
||||
|
||||
mips_parse_crashkernel();
|
||||
#ifdef CONFIG_KEXEC
|
||||
if (crashk_res.start != crashk_res.end)
|
||||
memblock_reserve(crashk_res.start, resource_size(&crashk_res));
|
||||
#endif
|
||||
device_tree_init();
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -385,3 +385,5 @@
|
|||
444 n32 landlock_create_ruleset sys_landlock_create_ruleset
|
||||
445 n32 landlock_add_rule sys_landlock_add_rule
|
||||
446 n32 landlock_restrict_self sys_landlock_restrict_self
|
||||
# 447 reserved for memfd_secret
|
||||
448 n32 process_mrelease sys_process_mrelease
|
||||
|
|
|
|||
|
|
@ -361,3 +361,5 @@
|
|||
444 n64 landlock_create_ruleset sys_landlock_create_ruleset
|
||||
445 n64 landlock_add_rule sys_landlock_add_rule
|
||||
446 n64 landlock_restrict_self sys_landlock_restrict_self
|
||||
# 447 reserved for memfd_secret
|
||||
448 n64 process_mrelease sys_process_mrelease
|
||||
|
|
|
|||
|
|
@ -434,3 +434,5 @@
|
|||
444 o32 landlock_create_ruleset sys_landlock_create_ruleset
|
||||
445 o32 landlock_add_rule sys_landlock_add_rule
|
||||
446 o32 landlock_restrict_self sys_landlock_restrict_self
|
||||
# 447 reserved for memfd_secret
|
||||
448 o32 process_mrelease sys_process_mrelease
|
||||
|
|
|
|||
|
|
@ -75,7 +75,7 @@ bool is_trap_insn(uprobe_opcode_t *insn)
|
|||
case tlt_op:
|
||||
case tltu_op:
|
||||
case tne_op:
|
||||
return 1;
|
||||
return true;
|
||||
}
|
||||
break;
|
||||
|
||||
|
|
@ -87,12 +87,12 @@ bool is_trap_insn(uprobe_opcode_t *insn)
|
|||
case tlti_op:
|
||||
case tltiu_op:
|
||||
case tnei_op:
|
||||
return 1;
|
||||
return true;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
return 0;
|
||||
return false;
|
||||
}
|
||||
|
||||
#define UPROBE_TRAP_NR ULONG_MAX
|
||||
|
|
@ -254,9 +254,9 @@ unsigned long uprobe_get_swbp_addr(struct pt_regs *regs)
|
|||
* See if the instruction can be emulated.
|
||||
* Returns true if instruction was emulated, false otherwise.
|
||||
*
|
||||
* For now we always emulate so this function just returns 0.
|
||||
* For now we always emulate so this function just returns false.
|
||||
*/
|
||||
bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)
|
||||
{
|
||||
return 0;
|
||||
return false;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,21 +2,18 @@
|
|||
# Makefile for KVM support for MIPS
|
||||
#
|
||||
|
||||
common-objs-y = $(addprefix ../../../virt/kvm/, kvm_main.o coalesced_mmio.o eventfd.o binary_stats.o)
|
||||
ccflags-y += -Ivirt/kvm -Iarch/mips/kvm
|
||||
|
||||
EXTRA_CFLAGS += -Ivirt/kvm -Iarch/mips/kvm
|
||||
kvm-y := $(addprefix ../../../virt/kvm/, kvm_main.o coalesced_mmio.o eventfd.o binary_stats.o)
|
||||
kvm-$(CONFIG_CPU_HAS_MSA) += msa.o
|
||||
|
||||
common-objs-$(CONFIG_CPU_HAS_MSA) += msa.o
|
||||
|
||||
kvm-objs := $(common-objs-y) mips.o emulate.o entry.o \
|
||||
kvm-y += mips.o emulate.o entry.o \
|
||||
interrupt.o stats.o \
|
||||
fpu.o
|
||||
kvm-objs += hypcall.o
|
||||
kvm-objs += mmu.o
|
||||
ifdef CONFIG_CPU_LOONGSON64
|
||||
kvm-objs += loongson_ipi.o
|
||||
endif
|
||||
kvm-y += hypcall.o
|
||||
kvm-y += mmu.o
|
||||
kvm-$(CONFIG_CPU_LOONGSON64) += loongson_ipi.o
|
||||
|
||||
kvm-objs += vz.o
|
||||
kvm-y += vz.o
|
||||
obj-$(CONFIG_KVM) += kvm.o
|
||||
obj-y += callback.o tlb.o
|
||||
|
|
|
|||
|
|
@ -442,7 +442,7 @@ static int kvm_mips_mkold_gpa_pt(struct kvm *kvm, gfn_t start_gfn,
|
|||
bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range)
|
||||
{
|
||||
kvm_mips_flush_gpa_pt(kvm, range->start, range->end);
|
||||
return 1;
|
||||
return true;
|
||||
}
|
||||
|
||||
bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
|
||||
|
|
@ -486,7 +486,7 @@ bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
|
|||
pte_t *gpa_pte = kvm_mips_pte_for_gpa(kvm, NULL, gpa);
|
||||
|
||||
if (!gpa_pte)
|
||||
return 0;
|
||||
return false;
|
||||
return pte_young(*gpa_pte);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -4,12 +4,14 @@
|
|||
#
|
||||
|
||||
obj-y += setup.o init.o env.o time.o reset.o irq.o \
|
||||
bonito-irq.o mem.o machtype.o platform.o serial.o
|
||||
bonito-irq.o mem.o machtype.o platform.o
|
||||
obj-$(CONFIG_PCI) += pci.o
|
||||
|
||||
#
|
||||
# Serial port support
|
||||
#
|
||||
obj-$(CONFIG_LOONGSON_UART_BASE) += serial.o
|
||||
obj-$(CONFIG_EARLY_PRINTK) += serial.o
|
||||
obj-$(CONFIG_LOONGSON_UART_BASE) += uart_base.o
|
||||
obj-$(CONFIG_LOONGSON_MC146818) += rtc.o
|
||||
|
||||
|
|
|
|||
|
|
@ -30,7 +30,7 @@
|
|||
unsigned long long cache_err_dcache[NR_CPUS];
|
||||
EXPORT_SYMBOL_GPL(cache_err_dcache);
|
||||
|
||||
/**
|
||||
/*
|
||||
* Octeon automatically flushes the dcache on tlb changes, so
|
||||
* from Linux's viewpoint it acts much like a physically
|
||||
* tagged cache. No flushing is needed
|
||||
|
|
@ -56,8 +56,8 @@ static void local_octeon_flush_icache_range(unsigned long start,
|
|||
}
|
||||
|
||||
/**
|
||||
* Flush caches as necessary for all cores affected by a
|
||||
* vma. If no vma is supplied, all cores are flushed.
|
||||
* octeon_flush_icache_all_cores - Flush caches as necessary for all cores
|
||||
* affected by a vma. If no vma is supplied, all cores are flushed.
|
||||
*
|
||||
* @vma: VMA to flush or NULL to flush all icaches.
|
||||
*/
|
||||
|
|
@ -92,7 +92,7 @@ static void octeon_flush_icache_all_cores(struct vm_area_struct *vma)
|
|||
}
|
||||
|
||||
|
||||
/**
|
||||
/*
|
||||
* Called to flush the icache on all cores
|
||||
*/
|
||||
static void octeon_flush_icache_all(void)
|
||||
|
|
@ -102,8 +102,7 @@ static void octeon_flush_icache_all(void)
|
|||
|
||||
|
||||
/**
|
||||
* Called to flush all memory associated with a memory
|
||||
* context.
|
||||
* octeon_flush_cache_mm - flush all memory associated with a memory context.
|
||||
*
|
||||
* @mm: Memory context to flush
|
||||
*/
|
||||
|
|
@ -116,7 +115,7 @@ static void octeon_flush_cache_mm(struct mm_struct *mm)
|
|||
}
|
||||
|
||||
|
||||
/**
|
||||
/*
|
||||
* Flush a range of kernel addresses out of the icache
|
||||
*
|
||||
*/
|
||||
|
|
@ -127,11 +126,11 @@ static void octeon_flush_icache_range(unsigned long start, unsigned long end)
|
|||
|
||||
|
||||
/**
|
||||
* Flush a range out of a vma
|
||||
* octeon_flush_cache_range - Flush a range out of a vma
|
||||
*
|
||||
* @vma: VMA to flush
|
||||
* @start:
|
||||
* @end:
|
||||
* @start: beginning address for flush
|
||||
* @end: ending address for flush
|
||||
*/
|
||||
static void octeon_flush_cache_range(struct vm_area_struct *vma,
|
||||
unsigned long start, unsigned long end)
|
||||
|
|
@ -142,11 +141,11 @@ static void octeon_flush_cache_range(struct vm_area_struct *vma,
|
|||
|
||||
|
||||
/**
|
||||
* Flush a specific page of a vma
|
||||
* octeon_flush_cache_page - Flush a specific page of a vma
|
||||
*
|
||||
* @vma: VMA to flush page for
|
||||
* @page: Page to flush
|
||||
* @pfn:
|
||||
* @pfn: Page frame number
|
||||
*/
|
||||
static void octeon_flush_cache_page(struct vm_area_struct *vma,
|
||||
unsigned long page, unsigned long pfn)
|
||||
|
|
@ -160,7 +159,7 @@ static void octeon_flush_kernel_vmap_range(unsigned long vaddr, int size)
|
|||
BUG();
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Probe Octeon's caches
|
||||
*
|
||||
*/
|
||||
|
|
@ -256,7 +255,7 @@ static void octeon_cache_error_setup(void)
|
|||
set_handler(0x100, &except_vec2_octeon, 0x80);
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Setup the Octeon cache flush routines
|
||||
*
|
||||
*/
|
||||
|
|
@ -341,7 +340,7 @@ asmlinkage void cache_parity_error_octeon_recoverable(void)
|
|||
co_cache_error_call_notifiers(0);
|
||||
}
|
||||
|
||||
/**
|
||||
/*
|
||||
* Called when the the exception is not recoverable
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -22,7 +22,7 @@
|
|||
#define ROCIT_CONFIG_GEN1_MEMMAP_SHIFT 8
|
||||
#define ROCIT_CONFIG_GEN1_MEMMAP_MASK (0xf << 8)
|
||||
|
||||
static unsigned char fdt_buf[16 << 10] __initdata;
|
||||
static unsigned char fdt_buf[16 << 10] __initdata __aligned(8);
|
||||
|
||||
/* determined physical memory size, not overridden by command line args */
|
||||
extern unsigned long physical_memsize;
|
||||
|
|
|
|||
|
|
@ -103,18 +103,19 @@ static void check_credit_distribution(void)
|
|||
}
|
||||
|
||||
/**
|
||||
* Configure bucket size and credits for a device. 'size' is the size of
|
||||
* the buckets for the device. This size is distributed among all the CPUs
|
||||
* so that all of them can send messages to the device.
|
||||
*
|
||||
* The device is also given 'cpu_credits' to send messages to the CPUs
|
||||
*
|
||||
* setup_fmn_cc - Configure bucket size and credits for a device.
|
||||
* @dev_info: FMN information structure for each devices
|
||||
* @start_stn_id: Starting station id of dev_info
|
||||
* @end_stn_id: End station id of dev_info
|
||||
* @num_buckets: Total number of buckets for den_info
|
||||
* @cpu_credits: Allowed credits to cpu for each devices pointing by dev_info
|
||||
* @size: Size of the each buckets in the device station
|
||||
*
|
||||
* 'size' is the size of the buckets for the device. This size is
|
||||
* distributed among all the CPUs
|
||||
* so that all of them can send messages to the device.
|
||||
*
|
||||
* The device is also given 'cpu_credits' to send messages to the CPUs
|
||||
*/
|
||||
static void setup_fmn_cc(struct xlr_fmn_info *dev_info, int start_stn_id,
|
||||
int end_stn_id, int num_buckets, int cpu_credits, int size)
|
||||
|
|
@ -174,6 +175,8 @@ static void setup_cpu_fmninfo(struct xlr_fmn_info *cpu, int num_core)
|
|||
}
|
||||
|
||||
/**
|
||||
* xlr_board_info_setup - Setup FMN details
|
||||
*
|
||||
* Setup the FMN details for each devices according to the device available
|
||||
* in each variant of XLR/XLS processor
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -1,14 +0,0 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
config PISTACHIO_GPTIMER_CLKSRC
|
||||
bool "Enable General Purpose Timer based clocksource"
|
||||
depends on MACH_PISTACHIO
|
||||
select CLKSRC_PISTACHIO
|
||||
select MIPS_EXTERNAL_TIMER
|
||||
help
|
||||
This option enables a clocksource driver based on a Pistachio
|
||||
SoC General Purpose external timer.
|
||||
|
||||
If you want to enable the CPUFreq, you need to enable
|
||||
this option.
|
||||
|
||||
If you don't want to enable CPUFreq, you can leave this disabled.
|
||||
|
|
@ -1,2 +0,0 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
obj-y += init.o irq.o time.o
|
||||
|
|
@ -1,6 +0,0 @@
|
|||
#
|
||||
# IMG Pistachio SoC
|
||||
#
|
||||
load-$(CONFIG_MACH_PISTACHIO) += 0xffffffff80400000
|
||||
zload-$(CONFIG_MACH_PISTACHIO) += 0xffffffff81000000
|
||||
all-$(CONFIG_MACH_PISTACHIO) := uImage.gz
|
||||
|
|
@ -1,125 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Pistachio platform setup
|
||||
*
|
||||
* Copyright (C) 2014 Google, Inc.
|
||||
* Copyright (C) 2016 Imagination Technologies
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_fdt.h>
|
||||
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/fw/fw.h>
|
||||
#include <asm/mips-boards/generic.h>
|
||||
#include <asm/mips-cps.h>
|
||||
#include <asm/prom.h>
|
||||
#include <asm/smp-ops.h>
|
||||
#include <asm/traps.h>
|
||||
|
||||
/*
|
||||
* Core revision register decoding
|
||||
* Bits 23 to 20: Major rev
|
||||
* Bits 15 to 8: Minor rev
|
||||
* Bits 7 to 0: Maintenance rev
|
||||
*/
|
||||
#define PISTACHIO_CORE_REV_REG 0xB81483D0
|
||||
#define PISTACHIO_CORE_REV_A1 0x00100006
|
||||
#define PISTACHIO_CORE_REV_B0 0x00100106
|
||||
|
||||
const char *get_system_type(void)
|
||||
{
|
||||
u32 core_rev;
|
||||
const char *sys_type;
|
||||
|
||||
core_rev = __raw_readl((const void *)PISTACHIO_CORE_REV_REG);
|
||||
|
||||
switch (core_rev) {
|
||||
case PISTACHIO_CORE_REV_B0:
|
||||
sys_type = "IMG Pistachio SoC (B0)";
|
||||
break;
|
||||
|
||||
case PISTACHIO_CORE_REV_A1:
|
||||
sys_type = "IMG Pistachio SoC (A1)";
|
||||
break;
|
||||
|
||||
default:
|
||||
sys_type = "IMG Pistachio SoC";
|
||||
break;
|
||||
}
|
||||
|
||||
return sys_type;
|
||||
}
|
||||
|
||||
void __init *plat_get_fdt(void)
|
||||
{
|
||||
if (fw_arg0 != -2)
|
||||
panic("Device-tree not present");
|
||||
return (void *)fw_arg1;
|
||||
}
|
||||
|
||||
void __init plat_mem_setup(void)
|
||||
{
|
||||
__dt_setup_arch(plat_get_fdt());
|
||||
}
|
||||
|
||||
#define DEFAULT_CPC_BASE_ADDR 0x1bde0000
|
||||
#define DEFAULT_CDMM_BASE_ADDR 0x1bdd0000
|
||||
|
||||
phys_addr_t mips_cpc_default_phys_base(void)
|
||||
{
|
||||
return DEFAULT_CPC_BASE_ADDR;
|
||||
}
|
||||
|
||||
phys_addr_t mips_cdmm_phys_base(void)
|
||||
{
|
||||
return DEFAULT_CDMM_BASE_ADDR;
|
||||
}
|
||||
|
||||
static void __init mips_nmi_setup(void)
|
||||
{
|
||||
void *base;
|
||||
|
||||
base = cpu_has_veic ?
|
||||
(void *)(CAC_BASE + 0xa80) :
|
||||
(void *)(CAC_BASE + 0x380);
|
||||
memcpy(base, except_vec_nmi, 0x80);
|
||||
flush_icache_range((unsigned long)base,
|
||||
(unsigned long)base + 0x80);
|
||||
}
|
||||
|
||||
static void __init mips_ejtag_setup(void)
|
||||
{
|
||||
void *base;
|
||||
extern char except_vec_ejtag_debug[];
|
||||
|
||||
base = cpu_has_veic ?
|
||||
(void *)(CAC_BASE + 0xa00) :
|
||||
(void *)(CAC_BASE + 0x300);
|
||||
memcpy(base, except_vec_ejtag_debug, 0x80);
|
||||
flush_icache_range((unsigned long)base,
|
||||
(unsigned long)base + 0x80);
|
||||
}
|
||||
|
||||
void __init prom_init(void)
|
||||
{
|
||||
board_nmi_handler_setup = mips_nmi_setup;
|
||||
board_ejtag_handler_setup = mips_ejtag_setup;
|
||||
|
||||
mips_cm_probe();
|
||||
mips_cpc_probe();
|
||||
register_cps_smp_ops();
|
||||
|
||||
pr_info("SoC Type: %s\n", get_system_type());
|
||||
}
|
||||
|
||||
void __init device_tree_init(void)
|
||||
{
|
||||
if (!initial_boot_params)
|
||||
return;
|
||||
|
||||
unflatten_and_copy_device_tree();
|
||||
}
|
||||
|
|
@ -1,24 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Pistachio IRQ setup
|
||||
*
|
||||
* Copyright (C) 2014 Google, Inc.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/irqchip.h>
|
||||
#include <linux/kernel.h>
|
||||
|
||||
#include <asm/cpu-features.h>
|
||||
#include <asm/irq_cpu.h>
|
||||
|
||||
void __init arch_init_irq(void)
|
||||
{
|
||||
pr_info("EIC is %s\n", cpu_has_veic ? "on" : "off");
|
||||
pr_info("VINT is %s\n", cpu_has_vint ? "on" : "off");
|
||||
|
||||
if (!cpu_has_veic)
|
||||
mips_cpu_irq_init();
|
||||
|
||||
irqchip_init();
|
||||
}
|
||||
|
|
@ -1,55 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Pistachio clocksource/timer setup
|
||||
*
|
||||
* Copyright (C) 2014 Google, Inc.
|
||||
*/
|
||||
|
||||
#include <linux/clk.h>
|
||||
#include <linux/clocksource.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_clk.h>
|
||||
|
||||
#include <asm/mips-cps.h>
|
||||
#include <asm/time.h>
|
||||
|
||||
unsigned int get_c0_compare_int(void)
|
||||
{
|
||||
return gic_get_c0_compare_int();
|
||||
}
|
||||
|
||||
int get_c0_perfcount_int(void)
|
||||
{
|
||||
return gic_get_c0_perfcount_int();
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(get_c0_perfcount_int);
|
||||
|
||||
int get_c0_fdc_int(void)
|
||||
{
|
||||
return gic_get_c0_fdc_int();
|
||||
}
|
||||
|
||||
void __init plat_time_init(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
struct clk *clk;
|
||||
|
||||
of_clk_init(NULL);
|
||||
timer_probe();
|
||||
|
||||
np = of_get_cpu_node(0, NULL);
|
||||
if (!np) {
|
||||
pr_err("Failed to get CPU node\n");
|
||||
return;
|
||||
}
|
||||
|
||||
clk = of_clk_get(np, 0);
|
||||
if (IS_ERR(clk)) {
|
||||
pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk));
|
||||
return;
|
||||
}
|
||||
|
||||
mips_hpt_frequency = clk_get_rate(clk) / 2;
|
||||
clk_put(clk);
|
||||
}
|
||||
|
|
@ -36,8 +36,7 @@ void copy_from_user_page(struct vm_area_struct *vma, struct page *page,
|
|||
void flush_anon_page(struct vm_area_struct *vma,
|
||||
struct page *page, unsigned long vaddr);
|
||||
|
||||
#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
|
||||
void flush_kernel_dcache_page(struct page *page);
|
||||
#define ARCH_IMPLEMENTS_FLUSH_KERNEL_VMAP_RANGE 1
|
||||
void flush_kernel_vmap_range(void *addr, int size);
|
||||
void invalidate_kernel_vmap_range(void *addr, int size);
|
||||
#define flush_dcache_mmap_lock(mapping) xa_lock_irq(&(mapping)->i_pages)
|
||||
|
|
|
|||
|
|
@ -318,15 +318,6 @@ void flush_anon_page(struct vm_area_struct *vma,
|
|||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
void flush_kernel_dcache_page(struct page *page)
|
||||
{
|
||||
unsigned long flags;
|
||||
local_irq_save(flags);
|
||||
cpu_dcache_wbinval_page((unsigned long)page_address(page));
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
EXPORT_SYMBOL(flush_kernel_dcache_page);
|
||||
|
||||
void flush_kernel_vmap_range(void *addr, int size)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
|
|
|||
|
|
@ -41,10 +41,10 @@ pic: pic {
|
|||
interrupt-controller;
|
||||
};
|
||||
|
||||
serial0: serial@e0002000 {
|
||||
serial0: serial@e0006800 {
|
||||
device_type = "serial";
|
||||
compatible = "litex,liteuart";
|
||||
reg = <0xe0002000 0x100>;
|
||||
reg = <0xe0006800 0x100>;
|
||||
};
|
||||
|
||||
soc_ctrl0: soc_controller@e0000000 {
|
||||
|
|
@ -52,4 +52,13 @@ soc_ctrl0: soc_controller@e0000000 {
|
|||
reg = <0xe0000000 0xc>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ethernet@e0001000 {
|
||||
compatible = "litex,liteeth";
|
||||
reg = <0xe0001000 0x7c>,
|
||||
<0xe0001800 0x0a>,
|
||||
<0x80000000 0x2000>;
|
||||
reg-names = "mac", "mdio", "buffer";
|
||||
interrupts = <2>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,18 +1,24 @@
|
|||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
|
||||
CONFIG_BUG_ON_DATA_CORRUPTION=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_EMBEDDED=y
|
||||
CONFIG_OPENRISC_BUILTIN_DTB="or1klitex"
|
||||
CONFIG_HZ_100=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
CONFIG_EMBEDDED=y
|
||||
CONFIG_HZ_100=y
|
||||
CONFIG_INITRAMFS_SOURCE="openrisc-rootfs.cpio.gz"
|
||||
CONFIG_OF_OVERLAY=y
|
||||
CONFIG_OPENRISC_BUILTIN_DTB="or1klitex"
|
||||
CONFIG_PANIC_ON_OOPS=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_LITEX_SOC_CONTROLLER=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_LITEX_LITEETH=y
|
||||
CONFIG_SERIAL_LITEUART=y
|
||||
CONFIG_SERIAL_LITEUART_CONSOLE=y
|
||||
CONFIG_SOFTLOCKUP_DETECTOR=y
|
||||
CONFIG_TTY_PRINTK=y
|
||||
CONFIG_LITEX_SOC_CONTROLLER=y
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_PANIC_ON_OOPS=y
|
||||
CONFIG_SOFTLOCKUP_DETECTOR=y
|
||||
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
|
||||
CONFIG_BUG_ON_DATA_CORRUPTION=y
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
* et al.
|
||||
*/
|
||||
|
||||
/* or32 pgtable.h - macros and functions to manipulate page tables
|
||||
/* or1k pgtable.h - macros and functions to manipulate page tables
|
||||
*
|
||||
* Based on:
|
||||
* include/asm-cris/pgtable.h
|
||||
|
|
@ -29,14 +29,14 @@
|
|||
|
||||
/*
|
||||
* The Linux memory management assumes a three-level page table setup. On
|
||||
* or32, we use that, but "fold" the mid level into the top-level page
|
||||
* or1k, we use that, but "fold" the mid level into the top-level page
|
||||
* table. Since the MMU TLB is software loaded through an interrupt, it
|
||||
* supports any page table structure, so we could have used a three-level
|
||||
* setup, but for the amounts of memory we normally use, a two-level is
|
||||
* probably more efficient.
|
||||
*
|
||||
* This file contains the functions and defines necessary to modify and use
|
||||
* the or32 page table tree.
|
||||
* the or1k page table tree.
|
||||
*/
|
||||
|
||||
extern void paging_init(void);
|
||||
|
|
|
|||
|
|
@ -0,0 +1,15 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Copyright (C) 2021 Stafford Horne
|
||||
*/
|
||||
#ifndef _ASM_OR1K_SETUP_H
|
||||
#define _ASM_OR1K_SETUP_H
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <asm-generic/setup.h>
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
void __init or1k_early_setup(void *fdt);
|
||||
#endif
|
||||
|
||||
#endif /* _ASM_OR1K_SETUP_H */
|
||||
|
|
@ -25,7 +25,7 @@
|
|||
|
||||
/* THREAD_SIZE is the size of the task_struct/kernel_stack combo.
|
||||
* normally, the stack is found by doing something like p + THREAD_SIZE
|
||||
* in or32, a page is 8192 bytes, which seems like a sane size
|
||||
* in or1k, a page is 8192 bytes, which seems like a sane size
|
||||
*/
|
||||
|
||||
#define THREAD_SIZE_ORDER 0
|
||||
|
|
|
|||
|
|
@ -326,7 +326,7 @@ EXCEPTION_ENTRY(_data_page_fault_handler)
|
|||
1: l.ori r6,r0,0x0 // !write access
|
||||
2:
|
||||
|
||||
/* call fault.c handler in or32/mm/fault.c */
|
||||
/* call fault.c handler in openrisc/mm/fault.c */
|
||||
l.jal do_page_fault
|
||||
l.nop
|
||||
l.j _ret_from_exception
|
||||
|
|
@ -348,7 +348,7 @@ EXCEPTION_ENTRY(_insn_page_fault_handler)
|
|||
/* r4 set be EXCEPTION_HANDLE */ // effective address of fault
|
||||
l.ori r6,r0,0x0 // !write access
|
||||
|
||||
/* call fault.c handler in or32/mm/fault.c */
|
||||
/* call fault.c handler in openrisc/mm/fault.c */
|
||||
l.jal do_page_fault
|
||||
l.nop
|
||||
l.j _ret_from_exception
|
||||
|
|
@ -547,6 +547,7 @@ EXCEPTION_ENTRY(_external_irq_handler)
|
|||
l.bnf 1f // ext irq enabled, all ok.
|
||||
l.nop
|
||||
|
||||
#ifdef CONFIG_PRINTK
|
||||
l.addi r1,r1,-0x8
|
||||
l.movhi r3,hi(42f)
|
||||
l.ori r3,r3,lo(42f)
|
||||
|
|
@ -560,6 +561,7 @@ EXCEPTION_ENTRY(_external_irq_handler)
|
|||
.string "\n\rESR interrupt bug: in _external_irq_handler (ESR %x)\n\r"
|
||||
.align 4
|
||||
.previous
|
||||
#endif
|
||||
|
||||
l.ori r4,r4,SPR_SR_IEE // fix the bug
|
||||
// l.sw PT_SR(r1),r4
|
||||
|
|
|
|||
|
|
@ -599,7 +599,7 @@ flush_tlb:
|
|||
l.jal _flush_tlb
|
||||
l.nop
|
||||
|
||||
/* The MMU needs to be enabled before or32_early_setup is called */
|
||||
/* The MMU needs to be enabled before or1k_early_setup is called */
|
||||
|
||||
enable_mmu:
|
||||
/*
|
||||
|
|
@ -641,9 +641,9 @@ enable_mmu:
|
|||
/* magic number mismatch, set fdt pointer to null */
|
||||
l.or r25,r0,r0
|
||||
_fdt_found:
|
||||
/* pass fdt pointer to or32_early_setup in r3 */
|
||||
/* pass fdt pointer to or1k_early_setup in r3 */
|
||||
l.or r3,r0,r25
|
||||
LOAD_SYMBOL_2_GPR(r24, or32_early_setup)
|
||||
LOAD_SYMBOL_2_GPR(r24, or1k_early_setup)
|
||||
l.jalr r24
|
||||
l.nop
|
||||
|
||||
|
|
|
|||
|
|
@ -209,7 +209,8 @@ void __init setup_cpuinfo(void)
|
|||
}
|
||||
|
||||
/**
|
||||
* or32_early_setup
|
||||
* or1k_early_setup
|
||||
* @fdt: pointer to the start of the device tree in memory or NULL
|
||||
*
|
||||
* Handles the pointer to the device tree that this kernel is to use
|
||||
* for establishing the available platform devices.
|
||||
|
|
@ -217,7 +218,7 @@ void __init setup_cpuinfo(void)
|
|||
* Falls back on built-in device tree in case null pointer is passed.
|
||||
*/
|
||||
|
||||
void __init or32_early_setup(void *fdt)
|
||||
void __init or1k_early_setup(void *fdt)
|
||||
{
|
||||
if (fdt)
|
||||
pr_info("FDT at %p\n", fdt);
|
||||
|
|
@ -243,21 +244,6 @@ static inline unsigned long extract_value(unsigned long reg, unsigned long mask)
|
|||
return mask & reg;
|
||||
}
|
||||
|
||||
void __init detect_unit_config(unsigned long upr, unsigned long mask,
|
||||
char *text, void (*func) (void))
|
||||
{
|
||||
if (text != NULL)
|
||||
printk("%s", text);
|
||||
|
||||
if (upr & mask) {
|
||||
if (func != NULL)
|
||||
func();
|
||||
else
|
||||
printk("present\n");
|
||||
} else
|
||||
printk("not present\n");
|
||||
}
|
||||
|
||||
/*
|
||||
* calibrate_delay
|
||||
*
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
#
|
||||
# Makefile for or32 specific library files..
|
||||
# Makefile for or1k specific library files..
|
||||
#
|
||||
|
||||
obj-y := delay.o string.o memset.o memcpy.o
|
||||
|
|
|
|||
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Reference in New Issue