net/mlx4_en: Add dynamic variable to hold the number of user priorities (UP)
Until this patch, the number of UPs was hard coded for eight. Replace this with a variable in struct "mlx4_en_port_profile". Currently, the variable will hold the maximum number of UP, as before. The patch creates an infrastructure to add an option for dynamic change of the actual number of TCs. Signed-off-by: Inbar Karmy <inbark@mellanox.com> Signed-off-by: Tariq Toukan <tariqt@mellanox.com> Cc: Tarick Bedeir <tarick@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -303,7 +303,7 @@ static int mlx4_en_ets_validate(struct mlx4_en_priv *priv, struct ieee_ets *ets)
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int has_ets_tc = 0;
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int has_ets_tc = 0;
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for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
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for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
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if (ets->prio_tc[i] >= MLX4_EN_NUM_UP) {
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if (ets->prio_tc[i] >= priv->prof->num_up) {
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en_err(priv, "Bad priority in UP <=> TC mapping. TC: %d, UP: %d\n",
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en_err(priv, "Bad priority in UP <=> TC mapping. TC: %d, UP: %d\n",
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i, ets->prio_tc[i]);
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i, ets->prio_tc[i]);
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return -EINVAL;
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return -EINVAL;
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@ -1750,7 +1750,8 @@ static void mlx4_en_get_channels(struct net_device *dev,
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channel->max_tx = MLX4_EN_MAX_TX_RING_P_UP;
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channel->max_tx = MLX4_EN_MAX_TX_RING_P_UP;
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channel->rx_count = priv->rx_ring_num;
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channel->rx_count = priv->rx_ring_num;
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channel->tx_count = priv->tx_ring_num[TX] / MLX4_EN_NUM_UP;
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channel->tx_count = priv->tx_ring_num[TX] /
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priv->prof->num_up;
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}
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}
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static int mlx4_en_set_channels(struct net_device *dev,
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static int mlx4_en_set_channels(struct net_device *dev,
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@ -1773,18 +1774,19 @@ static int mlx4_en_set_channels(struct net_device *dev,
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mutex_lock(&mdev->state_lock);
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mutex_lock(&mdev->state_lock);
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xdp_count = priv->tx_ring_num[TX_XDP] ? channel->rx_count : 0;
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xdp_count = priv->tx_ring_num[TX_XDP] ? channel->rx_count : 0;
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if (channel->tx_count * MLX4_EN_NUM_UP + xdp_count > MAX_TX_RINGS) {
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if (channel->tx_count * priv->prof->num_up + xdp_count >
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MAX_TX_RINGS) {
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err = -EINVAL;
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err = -EINVAL;
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en_err(priv,
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en_err(priv,
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"Total number of TX and XDP rings (%d) exceeds the maximum supported (%d)\n",
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"Total number of TX and XDP rings (%d) exceeds the maximum supported (%d)\n",
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channel->tx_count * MLX4_EN_NUM_UP + xdp_count,
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channel->tx_count * priv->prof->num_up + xdp_count,
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MAX_TX_RINGS);
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MAX_TX_RINGS);
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goto out;
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goto out;
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}
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}
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memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
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memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
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new_prof.num_tx_rings_p_up = channel->tx_count;
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new_prof.num_tx_rings_p_up = channel->tx_count;
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new_prof.tx_ring_num[TX] = channel->tx_count * MLX4_EN_NUM_UP;
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new_prof.tx_ring_num[TX] = channel->tx_count * priv->prof->num_up;
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new_prof.tx_ring_num[TX_XDP] = xdp_count;
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new_prof.tx_ring_num[TX_XDP] = xdp_count;
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new_prof.rx_ring_num = channel->rx_count;
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new_prof.rx_ring_num = channel->rx_count;
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@ -1803,7 +1805,7 @@ static int mlx4_en_set_channels(struct net_device *dev,
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netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
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netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
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if (netdev_get_num_tc(dev))
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if (netdev_get_num_tc(dev))
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mlx4_en_setup_tc(dev, MLX4_EN_NUM_UP);
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mlx4_en_setup_tc(dev, priv->prof->num_up);
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en_warn(priv, "Using %d TX rings\n", priv->tx_ring_num[TX]);
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en_warn(priv, "Using %d TX rings\n", priv->tx_ring_num[TX]);
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en_warn(priv, "Using %d RX rings\n", priv->rx_ring_num);
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en_warn(priv, "Using %d RX rings\n", priv->rx_ring_num);
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@ -169,8 +169,9 @@ static int mlx4_en_get_profile(struct mlx4_en_dev *mdev)
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params->prof[i].tx_ppp = pfctx;
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params->prof[i].tx_ppp = pfctx;
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params->prof[i].tx_ring_size = MLX4_EN_DEF_TX_RING_SIZE;
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params->prof[i].tx_ring_size = MLX4_EN_DEF_TX_RING_SIZE;
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params->prof[i].rx_ring_size = MLX4_EN_DEF_RX_RING_SIZE;
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params->prof[i].rx_ring_size = MLX4_EN_DEF_RX_RING_SIZE;
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params->prof[i].num_up = MLX4_EN_NUM_UP_HIGH;
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params->prof[i].tx_ring_num[TX] = params->num_tx_rings_p_up *
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params->prof[i].tx_ring_num[TX] = params->num_tx_rings_p_up *
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MLX4_EN_NUM_UP;
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params->prof[i].num_up;
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params->prof[i].rss_rings = 0;
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params->prof[i].rss_rings = 0;
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params->prof[i].inline_thold = inline_thold;
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params->prof[i].inline_thold = inline_thold;
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}
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}
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@ -60,7 +60,7 @@ int mlx4_en_setup_tc(struct net_device *dev, u8 up)
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int i;
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int i;
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unsigned int offset = 0;
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unsigned int offset = 0;
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if (up && up != MLX4_EN_NUM_UP)
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if (up && up != MLX4_EN_NUM_UP_HIGH)
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return -EINVAL;
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return -EINVAL;
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netdev_set_num_tc(dev, up);
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netdev_set_num_tc(dev, up);
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@ -2780,7 +2780,7 @@ static int mlx4_xdp_set(struct net_device *dev, struct bpf_prog *prog)
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if (priv->tx_ring_num[TX] + xdp_ring_num > MAX_TX_RINGS) {
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if (priv->tx_ring_num[TX] + xdp_ring_num > MAX_TX_RINGS) {
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tx_changed = 1;
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tx_changed = 1;
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new_prof.tx_ring_num[TX] =
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new_prof.tx_ring_num[TX] =
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MAX_TX_RINGS - ALIGN(xdp_ring_num, MLX4_EN_NUM_UP);
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MAX_TX_RINGS - ALIGN(xdp_ring_num, priv->prof->num_up);
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en_warn(priv, "Reducing the number of TX rings, to not exceed the max total rings number.\n");
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en_warn(priv, "Reducing the number of TX rings, to not exceed the max total rings number.\n");
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}
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}
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@ -3271,7 +3271,7 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
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priv->flags |= MLX4_EN_DCB_ENABLED;
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priv->flags |= MLX4_EN_DCB_ENABLED;
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priv->cee_config.pfc_state = false;
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priv->cee_config.pfc_state = false;
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for (i = 0; i < MLX4_EN_NUM_UP; i++)
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for (i = 0; i < MLX4_EN_NUM_UP_HIGH; i++)
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priv->cee_config.dcb_pfc[i] = pfc_disabled;
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priv->cee_config.dcb_pfc[i] = pfc_disabled;
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if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) {
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if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) {
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@ -115,11 +115,11 @@
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#define MLX4_EN_SMALL_PKT_SIZE 64
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#define MLX4_EN_SMALL_PKT_SIZE 64
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#define MLX4_EN_MIN_TX_RING_P_UP 1
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#define MLX4_EN_MIN_TX_RING_P_UP 1
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#define MLX4_EN_MAX_TX_RING_P_UP 32
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#define MLX4_EN_MAX_TX_RING_P_UP 32
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#define MLX4_EN_NUM_UP 8
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#define MLX4_EN_NUM_UP_HIGH 8
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#define MLX4_EN_DEF_RX_RING_SIZE 1024
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#define MLX4_EN_DEF_RX_RING_SIZE 1024
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#define MLX4_EN_DEF_TX_RING_SIZE MLX4_EN_DEF_RX_RING_SIZE
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#define MLX4_EN_DEF_TX_RING_SIZE MLX4_EN_DEF_RX_RING_SIZE
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#define MAX_TX_RINGS (MLX4_EN_MAX_TX_RING_P_UP * \
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#define MAX_TX_RINGS (MLX4_EN_MAX_TX_RING_P_UP * \
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MLX4_EN_NUM_UP)
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MLX4_EN_NUM_UP_HIGH)
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#define MLX4_EN_DEFAULT_TX_WORK 256
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#define MLX4_EN_DEFAULT_TX_WORK 256
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@ -386,6 +386,7 @@ struct mlx4_en_port_profile {
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u8 rx_ppp;
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u8 rx_ppp;
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u8 tx_pause;
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u8 tx_pause;
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u8 tx_ppp;
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u8 tx_ppp;
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u8 num_up;
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int rss_rings;
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int rss_rings;
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int inline_thold;
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int inline_thold;
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struct hwtstamp_config hwtstamp_config;
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struct hwtstamp_config hwtstamp_config;
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@ -485,7 +486,7 @@ enum dcb_pfc_type {
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struct mlx4_en_cee_config {
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struct mlx4_en_cee_config {
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bool pfc_state;
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bool pfc_state;
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enum dcb_pfc_type dcb_pfc[MLX4_EN_NUM_UP];
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enum dcb_pfc_type dcb_pfc[MLX4_EN_NUM_UP_HIGH];
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};
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};
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#endif
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#endif
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