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hwmon: (zl6100) Enable interval between chip accesses for all chips 

Intersil reports that all chips supported by the zl6100 driver require
an interval between chip accesses, even ZL2004 and ZL6105 which were thought
to be safe.

Reported-by: Vivek Gani <vgani@intersil.com>
Cc: stable@vger.kernel.org # 3.2+
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
This commit is contained in:
Guenter Roeck 2012-03-13 09:05:14 -07:00
parent c43524b580
commit fecfb64422
2 changed files with 9 additions and 17 deletions
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14
Documentation/hwmon/zl6100
View File

@ -88,14 +88,12 @@ Module parameters
delay delay
----- -----
Some Intersil/Zilker Labs DC-DC controllers require a minimum interval between Intersil/Zilker Labs DC-DC controllers require a minimum interval between I2C
I2C bus accesses. According to Intersil, the minimum interval is 2 ms, though bus accesses. According to Intersil, the minimum interval is 2 ms, though 1 ms
1 ms appears to be sufficient and has not caused any problems in testing. appears to be sufficient and has not caused any problems in testing. The problem
The problem is known to affect ZL6100, ZL2105, and ZL2008. It is known not to is known to affect all currently supported chips. For manual override, the
affect ZL2004 and ZL6105. The driver automatically sets the interval to 1 ms driver provides a writeable module parameter, 'delay', which can be used to set
except for ZL2004 and ZL6105. To enable manual override, the driver provides a the interval to a value between 0 and 65,535 microseconds.
writeable module parameter, 'delay', which can be used to set the interval to
a value between 0 and 65,535 microseconds.
Sysfs entries Sysfs entries

12
drivers/hwmon/pmbus/zl6100.c
View File

@ -200,17 +200,11 @@ static int zl6100_probe(struct i2c_client *client,
data->id = mid->driver_data; data->id = mid->driver_data;
/* /*
* ZL2005, ZL2008, ZL2105, and ZL6100 are known to require a wait time * According to information from the chip vendor, all currently
* between I2C accesses. ZL2004 and ZL6105 are known to be safe. * supported chips are known to require a wait time between I2C
* Other chips have not yet been tested. * accesses.
*
* Only clear the wait time for chips known to be safe. The wait time
* can be cleared later for additional chips if tests show that it
* is not needed (in other words, better be safe than sorry).
*/ */
data->delay = delay; data->delay = delay;
if (data->id == zl2004 || data->id == zl6105)
data->delay = 0;
/* /*
* Since there was a direct I2C device access above, wait before * Since there was a direct I2C device access above, wait before