2013-03-01 02:32:03 +08:00
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/*
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* Copyright (C) 2013 The Android Open Source Project
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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2014-01-22 12:12:28 +08:00
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#ifndef ANDROID_ARMTOARM64ASSEMBLER_H
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#define ANDROID_ARMTOARM64ASSEMBLER_H
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2013-03-01 02:32:03 +08:00
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#include <stdint.h>
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#include <sys/types.h>
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#include "tinyutils/smartpointer.h"
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2015-08-28 19:59:48 +08:00
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#include "utils/Vector.h"
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#include "utils/KeyedVector.h"
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2013-03-01 02:32:03 +08:00
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#include "tinyutils/smartpointer.h"
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#include "codeflinger/ARMAssemblerInterface.h"
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#include "codeflinger/CodeCache.h"
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namespace android {
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// ----------------------------------------------------------------------------
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2014-01-22 12:12:28 +08:00
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class ArmToArm64Assembler : public ARMAssemblerInterface
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2013-03-01 02:32:03 +08:00
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{
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public:
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2014-01-22 12:12:28 +08:00
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ArmToArm64Assembler(const sp<Assembly>& assembly);
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ArmToArm64Assembler(void *base);
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virtual ~ArmToArm64Assembler();
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2013-03-01 02:32:03 +08:00
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uint32_t* base() const;
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uint32_t* pc() const;
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void disassemble(const char* name);
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// ------------------------------------------------------------------------
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// ARMAssemblerInterface...
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// ------------------------------------------------------------------------
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virtual void reset();
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virtual int generate(const char* name);
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virtual int getCodegenArch();
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virtual void prolog();
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virtual void epilog(uint32_t touched);
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virtual void comment(const char* string);
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// -----------------------------------------------------------------------
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// shifters and addressing modes
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// -----------------------------------------------------------------------
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// shifters...
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virtual bool isValidImmediate(uint32_t immed);
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virtual int buildImmediate(uint32_t i, uint32_t& rot, uint32_t& imm);
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virtual uint32_t imm(uint32_t immediate);
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virtual uint32_t reg_imm(int Rm, int type, uint32_t shift);
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virtual uint32_t reg_rrx(int Rm);
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virtual uint32_t reg_reg(int Rm, int type, int Rs);
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// addressing modes...
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virtual uint32_t immed12_pre(int32_t immed12, int W=0);
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virtual uint32_t immed12_post(int32_t immed12);
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virtual uint32_t reg_scale_pre(int Rm, int type=0, uint32_t shift=0, int W=0);
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virtual uint32_t reg_scale_post(int Rm, int type=0, uint32_t shift=0);
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virtual uint32_t immed8_pre(int32_t immed8, int W=0);
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virtual uint32_t immed8_post(int32_t immed8);
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virtual uint32_t reg_pre(int Rm, int W=0);
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virtual uint32_t reg_post(int Rm);
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virtual void dataProcessing(int opcode, int cc, int s,
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int Rd, int Rn,
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uint32_t Op2);
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virtual void MLA(int cc, int s,
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int Rd, int Rm, int Rs, int Rn);
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virtual void MUL(int cc, int s,
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int Rd, int Rm, int Rs);
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virtual void UMULL(int cc, int s,
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int RdLo, int RdHi, int Rm, int Rs);
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virtual void UMUAL(int cc, int s,
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int RdLo, int RdHi, int Rm, int Rs);
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virtual void SMULL(int cc, int s,
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int RdLo, int RdHi, int Rm, int Rs);
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virtual void SMUAL(int cc, int s,
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int RdLo, int RdHi, int Rm, int Rs);
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virtual void B(int cc, uint32_t* pc);
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virtual void BL(int cc, uint32_t* pc);
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virtual void BX(int cc, int Rn);
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virtual void label(const char* theLabel);
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virtual void B(int cc, const char* label);
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virtual void BL(int cc, const char* label);
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virtual uint32_t* pcForLabel(const char* label);
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virtual void ADDR_LDR(int cc, int Rd,
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int Rn, uint32_t offset = 0);
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virtual void ADDR_ADD(int cc, int s, int Rd,
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int Rn, uint32_t Op2);
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virtual void ADDR_SUB(int cc, int s, int Rd,
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int Rn, uint32_t Op2);
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virtual void ADDR_STR (int cc, int Rd,
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int Rn, uint32_t offset = 0);
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virtual void LDR (int cc, int Rd,
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int Rn, uint32_t offset = 0);
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virtual void LDRB(int cc, int Rd,
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int Rn, uint32_t offset = 0);
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virtual void STR (int cc, int Rd,
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int Rn, uint32_t offset = 0);
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virtual void STRB(int cc, int Rd,
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int Rn, uint32_t offset = 0);
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virtual void LDRH (int cc, int Rd,
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int Rn, uint32_t offset = 0);
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virtual void LDRSB(int cc, int Rd,
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int Rn, uint32_t offset = 0);
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virtual void LDRSH(int cc, int Rd,
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int Rn, uint32_t offset = 0);
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virtual void STRH (int cc, int Rd,
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int Rn, uint32_t offset = 0);
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virtual void LDM(int cc, int dir,
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int Rn, int W, uint32_t reg_list);
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virtual void STM(int cc, int dir,
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int Rn, int W, uint32_t reg_list);
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virtual void SWP(int cc, int Rn, int Rd, int Rm);
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virtual void SWPB(int cc, int Rn, int Rd, int Rm);
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virtual void SWI(int cc, uint32_t comment);
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virtual void PLD(int Rn, uint32_t offset);
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virtual void CLZ(int cc, int Rd, int Rm);
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virtual void QADD(int cc, int Rd, int Rm, int Rn);
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virtual void QDADD(int cc, int Rd, int Rm, int Rn);
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virtual void QSUB(int cc, int Rd, int Rm, int Rn);
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virtual void QDSUB(int cc, int Rd, int Rm, int Rn);
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virtual void SMUL(int cc, int xy,
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int Rd, int Rm, int Rs);
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virtual void SMULW(int cc, int y,
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int Rd, int Rm, int Rs);
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virtual void SMLA(int cc, int xy,
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int Rd, int Rm, int Rs, int Rn);
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virtual void SMLAL(int cc, int xy,
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int RdHi, int RdLo, int Rs, int Rm);
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virtual void SMLAW(int cc, int y,
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int Rd, int Rm, int Rs, int Rn);
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virtual void UXTB16(int cc, int Rd, int Rm, int rotate);
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virtual void UBFX(int cc, int Rd, int Rn, int lsb, int width);
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private:
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2014-01-22 12:12:28 +08:00
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ArmToArm64Assembler(const ArmToArm64Assembler& rhs);
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ArmToArm64Assembler& operator = (const ArmToArm64Assembler& rhs);
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2013-03-01 02:32:03 +08:00
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// -----------------------------------------------------------------------
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// helper functions
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// -----------------------------------------------------------------------
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void dataTransfer(int operation, int cc, int Rd, int Rn,
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uint32_t operand_type, uint32_t size = 32);
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void dataProcessingCommon(int opcode, int s,
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int Rd, int Rn, uint32_t Op2);
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// -----------------------------------------------------------------------
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2014-01-22 12:12:28 +08:00
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// Arm64 instructions
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2013-03-01 02:32:03 +08:00
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// -----------------------------------------------------------------------
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uint32_t A64_B_COND(uint32_t cc, uint32_t offset);
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uint32_t A64_RET(uint32_t Rn);
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uint32_t A64_LDRSTR_Wm_SXTW_0(uint32_t operation,
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uint32_t size, uint32_t Rt,
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uint32_t Rn, uint32_t Rm);
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uint32_t A64_STR_IMM_PreIndex(uint32_t Rt, uint32_t Rn, int32_t simm);
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uint32_t A64_LDR_IMM_PostIndex(uint32_t Rt,uint32_t Rn, int32_t simm);
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uint32_t A64_ADD_X_Wm_SXTW(uint32_t Rd, uint32_t Rn, uint32_t Rm,
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uint32_t amount);
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uint32_t A64_SUB_X_Wm_SXTW(uint32_t Rd, uint32_t Rn, uint32_t Rm,
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uint32_t amount);
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uint32_t A64_ADD_IMM_X(uint32_t Rd, uint32_t Rn,
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uint32_t imm, uint32_t shift = 0);
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uint32_t A64_SUB_IMM_X(uint32_t Rd, uint32_t Rn,
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uint32_t imm, uint32_t shift = 0);
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uint32_t A64_ADD_X(uint32_t Rd, uint32_t Rn,
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uint32_t Rm, uint32_t shift = 0, uint32_t amount = 0);
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uint32_t A64_ADD_W(uint32_t Rd, uint32_t Rn, uint32_t Rm,
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uint32_t shift = 0, uint32_t amount = 0);
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uint32_t A64_SUB_W(uint32_t Rd, uint32_t Rn, uint32_t Rm,
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uint32_t shift = 0, uint32_t amount = 0,
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uint32_t setflag = 0);
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uint32_t A64_AND_W(uint32_t Rd, uint32_t Rn,
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uint32_t Rm, uint32_t shift = 0, uint32_t amount = 0);
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uint32_t A64_ORR_W(uint32_t Rd, uint32_t Rn,
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uint32_t Rm, uint32_t shift = 0, uint32_t amount = 0);
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uint32_t A64_ORN_W(uint32_t Rd, uint32_t Rn,
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uint32_t Rm, uint32_t shift = 0, uint32_t amount = 0);
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uint32_t A64_MOVZ_W(uint32_t Rd, uint32_t imm, uint32_t shift);
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uint32_t A64_MOVZ_X(uint32_t Rd, uint32_t imm, uint32_t shift);
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uint32_t A64_MOVK_W(uint32_t Rd, uint32_t imm, uint32_t shift);
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uint32_t A64_SMADDL(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t Ra);
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uint32_t A64_MADD_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t Ra);
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uint32_t A64_SBFM_W(uint32_t Rd, uint32_t Rn,
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uint32_t immr, uint32_t imms);
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uint32_t A64_UBFM_W(uint32_t Rd, uint32_t Rn,
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uint32_t immr, uint32_t imms);
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uint32_t A64_UBFM_X(uint32_t Rd, uint32_t Rn,
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uint32_t immr, uint32_t imms);
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uint32_t A64_EXTR_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t lsb);
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uint32_t A64_CSEL_X(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t cond);
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uint32_t A64_CSEL_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t cond);
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uint32_t* mBase;
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uint32_t* mPC;
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uint32_t* mPrologPC;
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int64_t mDuration;
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uint32_t mTmpReg1, mTmpReg2, mTmpReg3, mZeroReg;
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struct branch_target_t {
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inline branch_target_t() : label(0), pc(0) { }
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inline branch_target_t(const char* l, uint32_t* p)
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: label(l), pc(p) { }
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const char* label;
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uint32_t* pc;
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};
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sp<Assembly> mAssembly;
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Vector<branch_target_t> mBranchTargets;
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KeyedVector< const char*, uint32_t* > mLabels;
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KeyedVector< uint32_t*, const char* > mLabelsInverseMapping;
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KeyedVector< uint32_t*, const char* > mComments;
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enum operand_type_t
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{
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OPERAND_REG = 0x20,
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OPERAND_IMM,
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OPERAND_REG_IMM,
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OPERAND_REG_OFFSET,
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OPERAND_UNSUPPORTED
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};
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struct addr_mode_t {
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int32_t immediate;
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bool writeback;
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bool preindex;
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bool postindex;
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int32_t reg_imm_Rm;
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int32_t reg_imm_type;
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uint32_t reg_imm_shift;
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int32_t reg_offset;
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} mAddrMode;
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};
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}; // namespace android
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2014-01-22 12:12:28 +08:00
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#endif //ANDROID_ARM64ASSEMBLER_H
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