[MIPSR6] Skip pixelflinger, memset assembler code on mips32r6
Temporarily use generic C-coded libpixelflinger & memset on mips32r6. Change-Id: I629b11ba955eaba323cba1df96c39f75f4d24d62
This commit is contained in:
parent
cddc97cb3a
commit
734f50c2fe
|
@ -190,7 +190,7 @@ inline int64_t gglMulii(int32_t x, int32_t y)
|
|||
);
|
||||
return res;
|
||||
}
|
||||
#elif defined(__mips__)
|
||||
#elif defined(__mips__) && __mips_isa_rev < 6
|
||||
|
||||
/*inline MIPS implementations*/
|
||||
inline GGLfixed gglMulx(GGLfixed a, GGLfixed b, int shift) CONST;
|
||||
|
|
|
@ -124,9 +124,17 @@ LOCAL_SRC_FILES_arm += \
|
|||
LOCAL_SRC_FILES_arm64 += \
|
||||
arch-arm64/android_memset.S \
|
||||
|
||||
ifndef ARCH_MIPS_REV6
|
||||
LOCAL_SRC_FILES_mips += \
|
||||
arch-mips/android_memset.c \
|
||||
|
||||
LOCAL_CFLAGS_mips += -DHAVE_MEMSET16 -DHAVE_MEMSET32
|
||||
endif
|
||||
|
||||
# TODO: switch mips64 back to using arch-mips/android_memset.c
|
||||
LOCAL_SRC_FILES_mips64 += \
|
||||
# arch-mips/android_memset.c \
|
||||
|
||||
LOCAL_SRC_FILES_x86 += \
|
||||
arch-x86/android_memset16.S \
|
||||
arch-x86/android_memset32.S \
|
||||
|
@ -137,7 +145,7 @@ LOCAL_SRC_FILES_x86_64 += \
|
|||
|
||||
LOCAL_CFLAGS_arm += -DHAVE_MEMSET16 -DHAVE_MEMSET32
|
||||
LOCAL_CFLAGS_arm64 += -DHAVE_MEMSET16 -DHAVE_MEMSET32
|
||||
LOCAL_CFLAGS_mips += -DHAVE_MEMSET16 -DHAVE_MEMSET32
|
||||
#LOCAL_CFLAGS_mips64 += -DHAVE_MEMSET16 -DHAVE_MEMSET32
|
||||
LOCAL_CFLAGS_x86 += -DHAVE_MEMSET16 -DHAVE_MEMSET32
|
||||
LOCAL_CFLAGS_x86_64 += -DHAVE_MEMSET16 -DHAVE_MEMSET32
|
||||
|
||||
|
|
|
@ -44,11 +44,13 @@ PIXELFLINGER_SRC_FILES_arm64 := \
|
|||
arch-arm64/col32cb16blend.S \
|
||||
arch-arm64/t32cb16blend.S \
|
||||
|
||||
ifndef ARCH_MIPS_REV6
|
||||
PIXELFLINGER_SRC_FILES_mips := \
|
||||
codeflinger/MIPSAssembler.cpp \
|
||||
codeflinger/mips_disassem.c \
|
||||
arch-mips/t32cb16blend.S \
|
||||
|
||||
endif
|
||||
#
|
||||
# Shared library
|
||||
#
|
||||
|
|
|
@ -39,7 +39,7 @@
|
|||
#include "codeflinger/ARMAssembler.h"
|
||||
#elif defined(__aarch64__)
|
||||
#include "codeflinger/Arm64Assembler.h"
|
||||
#elif defined(__mips__) && !defined(__LP64__)
|
||||
#elif defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6
|
||||
#include "codeflinger/MIPSAssembler.h"
|
||||
#endif
|
||||
//#include "codeflinger/ARMAssemblerOptimizer.h"
|
||||
|
@ -59,7 +59,7 @@
|
|||
# define ANDROID_CODEGEN ANDROID_CODEGEN_GENERATED
|
||||
#endif
|
||||
|
||||
#if defined(__arm__) || (defined(__mips__) && !defined(__LP64__)) || defined(__aarch64__)
|
||||
#if defined(__arm__) || (defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6) || defined(__aarch64__)
|
||||
# define ANDROID_ARM_CODEGEN 1
|
||||
#else
|
||||
# define ANDROID_ARM_CODEGEN 0
|
||||
|
@ -73,7 +73,7 @@
|
|||
*/
|
||||
#define DEBUG_NEEDS 0
|
||||
|
||||
#if defined( __mips__) && !defined(__LP64__)
|
||||
#if defined( __mips__) && !defined(__LP64__) && __mips_isa_rev < 6
|
||||
#define ASSEMBLY_SCRATCH_SIZE 4096
|
||||
#elif defined(__aarch64__)
|
||||
#define ASSEMBLY_SCRATCH_SIZE 8192
|
||||
|
@ -134,7 +134,7 @@ extern "C" void scanline_col32cb16blend_arm(uint16_t *dst, uint32_t col, size_t
|
|||
#elif defined(__aarch64__)
|
||||
extern "C" void scanline_t32cb16blend_arm64(uint16_t*, uint32_t*, size_t);
|
||||
extern "C" void scanline_col32cb16blend_arm64(uint16_t *dst, uint32_t col, size_t ct);
|
||||
#elif defined(__mips__) && !defined(__LP64__)
|
||||
#elif defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6
|
||||
extern "C" void scanline_t32cb16blend_mips(uint16_t*, uint32_t*, size_t);
|
||||
#endif
|
||||
|
||||
|
@ -286,7 +286,7 @@ static const needs_filter_t fill16noblend = {
|
|||
|
||||
#if ANDROID_ARM_CODEGEN
|
||||
|
||||
#if defined(__mips__)
|
||||
#if defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6
|
||||
static CodeCache gCodeCache(32 * 1024);
|
||||
#elif defined(__aarch64__)
|
||||
static CodeCache gCodeCache(48 * 1024);
|
||||
|
@ -2175,7 +2175,7 @@ last_one:
|
|||
|
||||
void scanline_t32cb16blend(context_t* c)
|
||||
{
|
||||
#if ((ANDROID_CODEGEN >= ANDROID_CODEGEN_ASM) && (defined(__arm__) || (defined(__mips__) && !defined(__LP64__)) || defined(__aarch64__)))
|
||||
#if ((ANDROID_CODEGEN >= ANDROID_CODEGEN_ASM) && (defined(__arm__) || (defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6) || defined(__aarch64__)))
|
||||
int32_t x = c->iterators.xl;
|
||||
size_t ct = c->iterators.xr - x;
|
||||
int32_t y = c->iterators.y;
|
||||
|
|
|
@ -9,16 +9,18 @@
|
|||
#include "codeflinger/CodeCache.h"
|
||||
#include "codeflinger/GGLAssembler.h"
|
||||
#include "codeflinger/ARMAssembler.h"
|
||||
#if defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6
|
||||
#include "codeflinger/MIPSAssembler.h"
|
||||
#endif
|
||||
#include "codeflinger/Arm64Assembler.h"
|
||||
|
||||
#if defined(__arm__) || defined(__mips__) || defined(__aarch64__)
|
||||
#if defined(__arm__) || (defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6) || defined(__aarch64__)
|
||||
# define ANDROID_ARM_CODEGEN 1
|
||||
#else
|
||||
# define ANDROID_ARM_CODEGEN 0
|
||||
#endif
|
||||
|
||||
#if defined (__mips__)
|
||||
#if defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6
|
||||
#define ASSEMBLY_SCRATCH_SIZE 4096
|
||||
#elif defined(__aarch64__)
|
||||
#define ASSEMBLY_SCRATCH_SIZE 8192
|
||||
|
@ -52,7 +54,7 @@ static void ggl_test_codegen(uint32_t n, uint32_t p, uint32_t t0, uint32_t t1)
|
|||
GGLAssembler assembler( new ARMAssembler(a) );
|
||||
#endif
|
||||
|
||||
#if defined(__mips__) && !defined(__LP64__)
|
||||
#if defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6
|
||||
GGLAssembler assembler( new ArmToMipsAssembler(a) );
|
||||
#endif
|
||||
|
||||
|
|
Loading…
Reference in New Issue