Merge "Add definitions for store barrier."
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b32007c54b
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@ -28,18 +28,30 @@ extern inline void android_compiler_barrier(void)
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#if ANDROID_SMP == 0
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extern inline void android_memory_barrier(void)
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{
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android_compiler_barrier();
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android_compiler_barrier();
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}
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extern inline void android_memory_store_barrier(void)
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{
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android_compiler_barrier();
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}
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#elif defined(__ARM_HAVE_DMB)
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extern inline void android_memory_barrier(void)
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{
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__asm__ __volatile__ ("dmb" : : : "memory");
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}
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extern inline void android_memory_store_barrier(void)
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{
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/* TODO: use "dmb st" once the toolchain understands it */
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__asm__ __volatile__ ("dmb" : : : "memory");
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}
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#elif defined(__ARM_HAVE_LDREX_STREX)
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extern inline void android_memory_barrier(void)
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{
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__asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5"
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: : "r" (0) : "memory");
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__asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" : : "r" (0) : "memory");
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}
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extern inline void android_memory_store_barrier(void)
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{
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android_memory_barrier();
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}
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#else
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extern inline void android_memory_barrier(void)
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@ -47,6 +59,10 @@ extern inline void android_memory_barrier(void)
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typedef void (kuser_memory_barrier)(void);
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(*(kuser_memory_barrier *)0xffff0fa0)();
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}
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extern inline void android_memory_store_barrier(void)
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{
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android_memory_barrier();
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}
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#endif
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extern inline int32_t android_atomic_acquire_load(volatile int32_t *ptr)
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@ -55,4 +55,10 @@
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#define ANDROID_MEMBAR_FULL android_memory_barrier
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#endif
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#if ANDROID_SMP == 0
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#define ANDROID_MEMBAR_STORE android_compiler_barrier
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#else
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#define ANDROID_MEMBAR_STORE android_memory_store_barrier
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#endif
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#endif /* ANDROID_CUTILS_ATOMIC_INLINE_H */
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@ -29,11 +29,19 @@ extern inline void android_memory_barrier(void)
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{
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android_compiler_barrier();
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}
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extern inline void android_memory_store_barrier(void)
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{
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android_compiler_barrier();
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}
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#else
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extern inline void android_memory_barrier(void)
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{
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__asm__ __volatile__ ("mfence" : : : "memory");
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}
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extern inline void android_memory_store_barrier(void)
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{
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android_compiler_barrier();
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}
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#endif
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extern inline int32_t android_atomic_acquire_load(volatile int32_t *ptr) {
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