am 54c90a14: am 752115dd: Merge "Add Silvermont architecture cache sizes"
* commit '54c90a1415a5dd1bd81e3994ff586adb5cda56b2': Add Silvermont architecture cache sizes
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@ -17,8 +17,15 @@
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* Contributed by: Intel Corporation
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*/
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#if defined(__slm__)
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/* Values are optimized for Silvermont */
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#define SHARED_CACHE_SIZE (1024*1024) /* Silvermont L2 Cache */
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#define DATA_CACHE_SIZE (24*1024) /* Silvermont L1 Data Cache */
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#else
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/* Values are optimized for Atom */
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#define SHARED_CACHE_SIZE (512*1024) /* Atom L2 Cache */
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#define DATA_CACHE_SIZE (24*1024) /* Atom L1 Data Cache */
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#define SHARED_CACHE_SIZE (512*1024) /* Atom L2 Cache */
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#define DATA_CACHE_SIZE (24*1024) /* Atom L1 Data Cache */
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#endif
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#define SHARED_CACHE_SIZE_HALF (SHARED_CACHE_SIZE / 2)
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#define DATA_CACHE_SIZE_HALF (DATA_CACHE_SIZE / 2)
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