Use correct memory ordering.
Start the reference count at zero instead of one, thus giving us a
chance to actually deallocate something.
Remove remaining (unused) inclusions of cutils/atomic.h from
libpixelflinger.
Bug: 30838047
Change-Id: I3c6fd4a4861b3635cf398ca2aa3e915118100b10
The feature is not implemented anymore (and has been for a very long time).
Moreover, this will allow us to cleanup hardware/ from any QEMU-specific
items.
BUG=25875346
Change-Id: I71488f4128c737dedf2b28433499fa6ffd29dcb5
GGLAssembler inherits a reset method from two parent classes, but it
provides a separate reset method with a different signature, thus hiding
the inherited reset methods.
The fix is to explicitly hide the inherited reset methods as private.
Bug: 27346663
Change-Id: Ic64b00acb6d77fb791cfdeade9ef7e20148817c1
* The literals are signed negative int and got warnings about
.... cannot be narrowed to type uint64_t [-Wc++11-narrowing]
Change-Id: I88c2fc328dfe5c7e2f9ade32bcba273e4a74a84c
* The literals are signed int type and got warnings about
.... cannot be narrowed to type int16_t [-Wc++11-narrowing]
Change-Id: I156d8e456c70840953aebb24739f94256248b810
This reverts commit ab5265ebe6.
This broke the mips64 build (which, stupidly, I hadn't tested):
system/core/libpixelflinger/codeflinger/MIPS64Assembler.h:24:35: fatal error: tinyutils/KeyedVector.h: No such file or directory
#include "tinyutils/KeyedVector.h"
Change-Id: I4fa1c04e196592fd1ef893a83c75261a55d32290
Added ARMtoMips64Assembler class that translates ARM instructions to MIPS64r6
instructions.
Added MIPS64r6 assembly implementations for col32cb16_blend and t32cb16_blend
functions.
Added MIPS32r2 assembly implementation for col32cb16_blend function.
Added tests for MIPS64r6 (assembler, disassembler and assembly implementation
functions).
Added MIPS32 tests for assembly implementation functions.
Minor bug fixes for MIPS32r2 branch.
Change-Id: I69e49622117be5b8167628e9702db6aafb1849d7
Use external/safe-iop to check for overflows on arithmetic
operations.
Also remove an unnecessary copy of Vector/SharedBuffer from
codeflinger and use the copy from libutils instead.
Note that some of the unit tests are somewhat useless due to
test-runner limitations : gtest's ability to filter on abort message
doesn't work when combined with messages formatted by android's logging
system.
bug: 22953624
Change-Id: I46b1ae8ca1f3a010be13aca36a091e76a97a7b70
* Explicitly specify default .align 0.
* Use standard ldmfdlo instruction.
* Before and after gas outputs are identical,
with align 0 sections.
* Objdump showed .text/.data/.bss section alignment
attributes are 2^0 from gas and 2^2 from llvm
assembler. These .S files might be working when
compiled by gas, but llvm assembler's output should
be more correct or conservative.
Change-Id: I4e578dbc8155c0d06d1bbc1c33ec4cc851a18479
pixelflinger should not be used for new projects and should be moved out
of system/core at some point. As the first step, move all its headers
under system/core/libpixelflinger/include and update its Android.mk
files so they're not referring to the absolute system/core path anymore.
Change-Id: Idead273ab2c0450409d770f5402c4dba916192a9
Signed-off-by: Greg Hackmann <ghackmann@google.com>
libagl is now the only remaining pixelflinger client in the Android
tree, and it links with pixelflinger dynamically.
Change-Id: Ic5f8af57a88ceaeb25bf890cd6be8bc5a893fc10
Signed-off-by: Greg Hackmann <ghackmann@google.com>
pixelflinger should not be used for new projects and should be moved out
of system/core at some point. As the first step, move all its headers
under system/core/libpixelflinger/include and update its Android.mk
files so they're not referring to the absolute system/core path anymore.
Change-Id: I7acc3ef5b2e21d8ba6fe939ea8d3ec4c41959591
Signed-off-by: Greg Hackmann <ghackmann@google.com>
Intel accidentally made this dead code in 2010 with commit
2bef93cc20, and no one's ever noticed.
Since no one noticing for so long implies that it doesn't matter,
let's just kill the supposedly optimized code.
Change-Id: Id5b37056cb8884c20bfe2db362e19b46f02e337d
Use expected inline behavior with clang.
GCC defaults to -std=gnu90, giving C89 inline semantics with GNU
extensions. Clang defaults to C99. Explicitly use gnu90.
Mark an unused parameter as __unused.
Fix some incorrect casts.
Change-Id: I05b95585d5e3688eda71769b63b6b8a9237bcaf4
CodeCache casts base address to long and then adds size (of type
ssize_t) to get end address. This can cause sign-extension problems.
This patch instead uses simple pointer arithmetic.
Change-Id: Ib71d515a6fd6a7f4762cf974d6cf4eba9a601fa8
Signed-off-by: Ashok Bhat <ashok.bhat@arm.com>
For now, use generic C code instead of generated mips instructions,
in the same manner as used on x86 and x86_64 targets.
Change-Id: If3607484e0a446a755c62c030b3069d46ab5beb2
ARCH_ARM_HAVE_NEON is only ever defined to true, so test for that.
For the NEON function to be used, the file has to include
machine/cpu-features.h so that __ARM_HAVE_NEON is defined.
Change-Id: I0db196b39c493092415859e009531fcff6fc1e8b
Signed-off-by: Kévin PETIT <kevin.petit@arm.com>
The error condition was not correctly detected: an error was
reported by checking that the index returned by CodeCache::cache
was non-zero. This did not work because this function can return
a positive value on success.
Change-Id: I1f90125ee62ab277b80da4dfb341733cd6e8e86a
Signed-off-by: Kévin PETIT <kevin.petit@arm.com>
cacheflush doesn't exist on LP64 any more, and gcc's
__builtin___clear_cache is better in every way. Use it instead.
Change-Id: Ibbf6facbdefc15b6dda51d014e1c44fb7aa2b17d
Hans Boehm