mirror of https://gitee.com/openkylin/qemu.git
94 lines
2.4 KiB
C
94 lines
2.4 KiB
C
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/*
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* QEMU PowerPC XIVE interrupt controller model
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*
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* Copyright (c) 2017-2019, IBM Corporation.
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*
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* This code is licensed under the GPL version 2 or later. See the
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* COPYING file in the top-level directory.
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*/
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#ifndef PPC_PNV_XIVE_H
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#define PPC_PNV_XIVE_H
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#include "hw/ppc/xive.h"
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struct PnvChip;
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#define TYPE_PNV_XIVE "pnv-xive"
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#define PNV_XIVE(obj) OBJECT_CHECK(PnvXive, (obj), TYPE_PNV_XIVE)
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#define XIVE_BLOCK_MAX 16
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#define XIVE_TABLE_BLK_MAX 16 /* Block Scope Table (0-15) */
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#define XIVE_TABLE_MIG_MAX 16 /* Migration Register Table (1-15) */
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#define XIVE_TABLE_VDT_MAX 16 /* VDT Domain Table (0-15) */
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#define XIVE_TABLE_EDT_MAX 64 /* EDT Domain Table (0-63) */
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typedef struct PnvXive {
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XiveRouter parent_obj;
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/* Owning chip */
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struct PnvChip *chip;
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/* XSCOM addresses giving access to the controller registers */
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MemoryRegion xscom_regs;
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/* Main MMIO regions that can be configured by FW */
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MemoryRegion ic_mmio;
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MemoryRegion ic_reg_mmio;
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MemoryRegion ic_notify_mmio;
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MemoryRegion ic_lsi_mmio;
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MemoryRegion tm_indirect_mmio;
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MemoryRegion vc_mmio;
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MemoryRegion pc_mmio;
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MemoryRegion tm_mmio;
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/*
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* IPI and END address spaces modeling the EDT segmentation in the
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* VC region
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*/
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AddressSpace ipi_as;
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MemoryRegion ipi_mmio;
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MemoryRegion ipi_edt_mmio;
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AddressSpace end_as;
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MemoryRegion end_mmio;
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MemoryRegion end_edt_mmio;
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/* Shortcut values for the Main MMIO regions */
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hwaddr ic_base;
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uint32_t ic_shift;
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hwaddr vc_base;
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uint32_t vc_shift;
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hwaddr pc_base;
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uint32_t pc_shift;
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hwaddr tm_base;
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uint32_t tm_shift;
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/* Our XIVE source objects for IPIs and ENDs */
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XiveSource ipi_source;
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XiveENDSource end_source;
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/* Interrupt controller registers */
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uint64_t regs[0x300];
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/* Can be configured by FW */
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uint32_t tctx_chipid;
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/*
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* Virtual Structure Descriptor tables : EAT, SBE, ENDT, NVTT, IRQ
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* These are in a SRAM protected by ECC.
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*/
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uint64_t vsds[5][XIVE_BLOCK_MAX];
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/* Translation tables */
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uint64_t blk[XIVE_TABLE_BLK_MAX];
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uint64_t mig[XIVE_TABLE_MIG_MAX];
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uint64_t vdt[XIVE_TABLE_VDT_MAX];
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uint64_t edt[XIVE_TABLE_EDT_MAX];
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} PnvXive;
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void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon);
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#endif /* PPC_PNV_XIVE_H */
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