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qemu/hw/intc/gic_internal.h

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hw/armv7m_nvic: Make the NVIC a freestanding class Rearrange the GIC and NVIC so both are straightforward subclasses of a common class, rather than having the NVIC source file textually include arm_gic.c. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-05-03 00:49:42 +08:00
/*
* ARM GIC support - internal interfaces
*
* Copyright (c) 2012 Linaro Limited
* Written by Peter Maydell
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#ifndef QEMU_ARM_GIC_INTERNAL_H
#define QEMU_ARM_GIC_INTERNAL_H
arm_gic: Extract headers hw/intc/arm_gic{,_common}.h Rename NCPU to GIC_NCPU and move GICState away from gic_internal.h. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-23 09:37:49 +08:00
#include "hw/intc/arm_gic.h"
hw/armv7m_nvic: Make the NVIC a freestanding class Rearrange the GIC and NVIC so both are straightforward subclasses of a common class, rather than having the NVIC source file textually include arm_gic.c. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-05-03 00:49:42 +08:00
arm_gic: Extract headers hw/intc/arm_gic{,_common}.h Rename NCPU to GIC_NCPU and move GICState away from gic_internal.h. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-23 09:37:49 +08:00
#define ALL_CPU_MASK ((unsigned)(((1 << GIC_NCPU) - 1)))
hw/armv7m_nvic: Make the NVIC a freestanding class Rearrange the GIC and NVIC so both are straightforward subclasses of a common class, rather than having the NVIC source file textually include arm_gic.c. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-05-03 00:49:42 +08:00
/* The NVIC has 16 internal vectors. However these are not exposed
through the normal GIC interface. */
#define GIC_BASE_IRQ ((s->revision == REV_NVIC) ? 32 : 0)
#define GIC_SET_ENABLED(irq, cm) s->irq_state[irq].enabled |= (cm)
#define GIC_CLEAR_ENABLED(irq, cm) s->irq_state[irq].enabled &= ~(cm)
#define GIC_TEST_ENABLED(irq, cm) ((s->irq_state[irq].enabled & (cm)) != 0)
#define GIC_SET_PENDING(irq, cm) s->irq_state[irq].pending |= (cm)
#define GIC_CLEAR_PENDING(irq, cm) s->irq_state[irq].pending &= ~(cm)
#define GIC_TEST_PENDING(irq, cm) ((s->irq_state[irq].pending & (cm)) != 0)
#define GIC_SET_ACTIVE(irq, cm) s->irq_state[irq].active |= (cm)
#define GIC_CLEAR_ACTIVE(irq, cm) s->irq_state[irq].active &= ~(cm)
#define GIC_TEST_ACTIVE(irq, cm) ((s->irq_state[irq].active & (cm)) != 0)
arm_gic: Fix sizes of state fields in preparation for vmstate support In preparation for switching to vmstate for migration support, fix the sizes of various GIC state fields. In particular, we replace all the bitfields (which VMState can't deal with) with straightforward uint8_t values which we do bit operations on. (The bitfields made more sense when NCPU was set differently in different situations, but we now always model at the architectural limit of 8.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Igor Mitsyanko <i.mitsyanko@gmail.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Message-id: 1363975375-3166-3-git-send-email-peter.maydell@linaro.org
2013-04-05 23:17:59 +08:00
#define GIC_SET_MODEL(irq) s->irq_state[irq].model = true
#define GIC_CLEAR_MODEL(irq) s->irq_state[irq].model = false
hw/armv7m_nvic: Make the NVIC a freestanding class Rearrange the GIC and NVIC so both are straightforward subclasses of a common class, rather than having the NVIC source file textually include arm_gic.c. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-05-03 00:49:42 +08:00
#define GIC_TEST_MODEL(irq) s->irq_state[irq].model
#define GIC_SET_LEVEL(irq, cm) s->irq_state[irq].level = (cm)
#define GIC_CLEAR_LEVEL(irq, cm) s->irq_state[irq].level &= ~(cm)
#define GIC_TEST_LEVEL(irq, cm) ((s->irq_state[irq].level & (cm)) != 0)
arm_gic: Rename GIC_X_TRIGGER to GIC_X_EDGE_TRIGGER TRIGGER can really mean mean anything (e.g. was it triggered, is it level-triggered, is it edge-triggered, etc.). Rename to EDGE_TRIGGER to make the code comprehensible without looking up the data structure. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Message-id: 1387606179-22709-2-git-send-email-christoffer.dall@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-21 14:09:32 +08:00
#define GIC_SET_EDGE_TRIGGER(irq) s->irq_state[irq].edge_trigger = true
#define GIC_CLEAR_EDGE_TRIGGER(irq) s->irq_state[irq].edge_trigger = false
#define GIC_TEST_EDGE_TRIGGER(irq) (s->irq_state[irq].edge_trigger)
hw/armv7m_nvic: Make the NVIC a freestanding class Rearrange the GIC and NVIC so both are straightforward subclasses of a common class, rather than having the NVIC source file textually include arm_gic.c. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-05-03 00:49:42 +08:00
#define GIC_GET_PRIORITY(irq, cpu) (((irq) < GIC_INTERNAL) ? \
s->priority1[irq][cpu] : \
s->priority2[(irq) - GIC_INTERNAL])
#define GIC_TARGET(irq) s->irq_target[irq]
/* The special cases for the revision property: */
#define REV_11MPCORE 0
#define REV_NVIC 0xffffffff
arm_gic: Rename gic_state to GICState Rename the gic_state struct to match QEMU's coding style conventions for structure names, since the impending KVM-for-ARM patches will create another subclass of it. This patch was created using: sed -i 's/gic_state/GICState/g' hw/arm_gic.c hw/arm_gic_common.c \ hw/arm_gic_internal.h hw/armv7m_nvic.c Acked-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-10-12 18:54:39 +08:00
void gic_set_pending_private(GICState *s, int cpu, int irq);
uint32_t gic_acknowledge_irq(GICState *s, int cpu);
void gic_complete_irq(GICState *s, int cpu, int irq);
void gic_update(GICState *s);
void gic_init_irqs_and_distributor(GICState *s, int num_irq);
hw: arm_gic: Introduce gic_set_priority function To make the code slightly cleaner to look at and make the save/restore code easier to understand, introduce this function to set the priority of interrupts. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Message-id: 1387606179-22709-3-git-send-email-christoffer.dall@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-21 14:09:33 +08:00
void gic_set_priority(GICState *s, int cpu, int irq, uint8_t val);
hw/armv7m_nvic: Make the NVIC a freestanding class Rearrange the GIC and NVIC so both are straightforward subclasses of a common class, rather than having the NVIC source file textually include arm_gic.c. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-05-03 00:49:42 +08:00
#endif /* !QEMU_ARM_GIC_INTERNAL_H */