2008-08-30 17:51:20 +08:00
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#ifndef HW_ISA_H
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#define HW_ISA_H
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2009-07-31 18:30:14 +08:00
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2007-11-18 01:14:51 +08:00
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/* ISA bus */
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2009-07-02 18:32:06 +08:00
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#include "ioport.h"
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2009-07-31 18:30:14 +08:00
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#include "qdev.h"
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typedef struct ISABus ISABus;
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typedef struct ISADevice ISADevice;
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typedef struct ISADeviceInfo ISADeviceInfo;
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struct ISADevice {
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DeviceState qdev;
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uint32_t iobase[2];
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2009-08-14 17:36:14 +08:00
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uint32_t isairq[2];
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2009-07-31 18:30:14 +08:00
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qemu_irq *irqs[2];
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int nirqs;
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};
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typedef void (*isa_qdev_initfn)(ISADevice *dev);
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struct ISADeviceInfo {
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DeviceInfo qdev;
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isa_qdev_initfn init;
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};
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ISABus *isa_bus_new(DeviceState *dev);
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2009-08-14 17:36:14 +08:00
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void isa_bus_irqs(qemu_irq *irqs);
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void isa_connect_irq(ISADevice *dev, int devirq, int isairq);
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2009-08-14 17:36:15 +08:00
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qemu_irq isa_reserve_irq(int isairq);
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2009-07-31 18:30:14 +08:00
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void isa_init_irq(ISADevice *dev, qemu_irq *p);
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void isa_qdev_register(ISADeviceInfo *info);
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ISADevice *isa_create_simple(const char *name, uint32_t iobase, uint32_t iobase2);
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2007-11-18 01:14:51 +08:00
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2009-07-02 18:32:06 +08:00
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extern target_phys_addr_t isa_mem_base;
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2007-11-18 01:14:51 +08:00
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void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
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/* dma.c */
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int DMA_get_channel_mode (int nchan);
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int DMA_read_memory (int nchan, void *buf, int pos, int size);
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int DMA_write_memory (int nchan, void *buf, int pos, int size);
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void DMA_hold_DREQ (int nchan);
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void DMA_release_DREQ (int nchan);
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void DMA_schedule(int nchan);
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void DMA_init (int high_page_enable);
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void DMA_register_channel (int nchan,
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DMA_transfer_handler transfer_handler,
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void *opaque);
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2008-08-30 17:51:20 +08:00
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#endif
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